arch/arm/src/stm32f0l0g0/stm32_pwm.c: Add missing logic for PWM stop for TIM14-15.
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d022b56b84
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@ -1822,48 +1822,70 @@ static int stm32pwm_stop(FAR struct pwm_lowerhalf_s *dev)
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resetbit = RCC_APB2RSTR_TIM1RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM2_PWM
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case 2:
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regaddr = STM32_RCC_APB1RSTR;
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resetbit = RCC_APB1RSTR_TIM2RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM3_PWM
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case 3:
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regaddr = STM32_RCC_APB1RSTR;
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resetbit = RCC_APB1RSTR_TIM3RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM4_PWM
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case 4:
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regaddr = STM32_RCC_APB1RSTR;
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resetbit = RCC_APB1RSTR_TIM4RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM5_PWM
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case 5:
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regaddr = STM32_RCC_APB1RSTR;
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resetbit = RCC_APB1RSTR_TIM5RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM8_PWM
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case 8:
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regaddr = STM32_RCC_APB2RSTR;
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resetbit = RCC_APB2RSTR_TIM8RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM14_PWM
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case 14:
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regaddr = STM32_RCC_APB2RSTR;
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resetbit = RCC_APB2RSTR_TIM14RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM15_PWM
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case 15:
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regaddr = STM32_RCC_APB2RSTR;
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resetbit = RCC_APB2RSTR_TIM15RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM16_PWM
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case 16:
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regaddr = STM32_RCC_APB2RSTR;
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resetbit = RCC_APB2RSTR_TIM16RST;
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break;
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM17_PWM
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case 17:
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regaddr = STM32_RCC_APB2RSTR;
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resetbit = RCC_APB2RSTR_TIM17RST;
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break;
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#endif
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default:
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return -EINVAL;
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}
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