diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ff60f3c826..5db696bb6d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -223,6 +223,13 @@ config ARCH_CHIP_STR71X ---help--- STMicro STR71x architectures (ARM7TDMI). +config ARCH_CHIP_MOXART + bool "MoxART" + select ARCH_HAVE_RAMVECTORS + select ARCH_HAVE_RESET + ---help--- + MoxART family + endchoice config ARCH_ARM7TDMI @@ -319,6 +326,7 @@ config ARCH_CHIP default "stm32" if ARCH_CHIP_STM32 default "stm32f7" if ARCH_CHIP_STM32F7 default "str71x" if ARCH_CHIP_STR71X + default "moxart" if ARCH_CHIP_MOXART config ARMV7M_USEBASEPRI bool "Use BASEPRI Register" @@ -529,5 +537,8 @@ endif if ARCH_CHIP_STR71X source arch/arm/src/str71x/Kconfig endif +if ARCH_CHIP_MOXART +source arch/arm/src/moxart/Kconfig +endif endif diff --git a/arch/arm/include/moxart/irq.h b/arch/arm/include/moxart/irq.h new file mode 100644 index 0000000000..f5a0443612 --- /dev/null +++ b/arch/arm/include/moxart/irq.h @@ -0,0 +1,87 @@ +/**************************************************************************** + * arch/arm/include/moxart/irq.h + * + * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, + * only indirectly through nuttx/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_MOXART_IRQ_H +#define __ARCH_ARM_INCLUDE_MOXART_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +/**************************************************************************** + * Public Variables + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#define IRQ_SYSTIMER 19 + +#define NR_IRQS 32 + +#endif /* __ARCH_ARM_INCLUDE_MOXART_IRQ_H */ + diff --git a/arch/arm/src/moxart/Kconfig b/arch/arm/src/moxart/Kconfig new file mode 100644 index 0000000000..d520506785 --- /dev/null +++ b/arch/arm/src/moxart/Kconfig @@ -0,0 +1,6 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +comment "MoxART Configuration Options" diff --git a/arch/arm/src/moxart/Make.defs b/arch/arm/src/moxart/Make.defs new file mode 100644 index 0000000000..42d1dc7084 --- /dev/null +++ b/arch/arm/src/moxart/Make.defs @@ -0,0 +1,59 @@ +############################################################################ +# calypso/Make.defs +# +# Copyright (C) 2007, 2013-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Copyright (C) 2011 Stefan Richter. All rights reserved. +# Author: Stefan Richter +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name Gregory Nutt nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +HEAD_ASRC = moxart_head.S + +CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_vectors.S +CMN_ASRCS += up_nommuhead.S vfork.S +CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copyfullstate.c +CMN_CSRCS += up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c +CMN_CSRCS += up_exit.c up_initialstate.c up_initialize.c +CMN_CSRCS += up_interruptcontext.c up_prefetchabort.c up_releasepending.c +CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c +CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c +CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c up_etherstub.c + +ifeq ($(CONFIG_ELF),y) +CMN_CSRCS += up_elf.c +endif + +CHIP_ASRCS = moxart_lowputc.S + +CHIP_CSRCS = moxart_16550.c moxart_irq.c moxart_timer.c moxart_idle.c +CHIP_CSRCS += moxart_systemreset.c + diff --git a/arch/arm/src/moxart/chip.h b/arch/arm/src/moxart/chip.h new file mode 100644 index 0000000000..d9a70112b7 --- /dev/null +++ b/arch/arm/src/moxart/chip.h @@ -0,0 +1,145 @@ +/************************************************************************************ + * arch/arm/src/moxa/chip.h + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_MOXART_CHIP_H +#define __ARCH_ARM_SRC_MOXART_CHIP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#define UART0_BASE 0x98200000 + +#define UART_THR 0x00 +#define UART_LSR 0x14 +#define UART_LSR_THRE 0x20 + +/* Common UART Registers. Expressed as offsets from the BASE address */ + +#define UART_RHR_OFFS 0x00000000 /* Rcv Holding Register */ +#define UART_THR_OFFS 0x00000000 /* Xmit Holding Register */ +#define UART_FCR_OFFS 0x00000002 /* FIFO Control Register */ +#define UART_RFCR_OFFS 0x00000002 /* Rcv FIFO Control Register */ +#define UART_TFCR_OFFS 0x00000002 /* Xmit FIFO Control Register */ +#define UART_SCR_OFFS 0x00000010 /* Status Control Register */ +#define UART_LCR_OFFS 0x00000003 /* Line Control Register */ +#define UART_LSR_OFFS 0x00000005 /* Line Status Register */ +#define UART_SSR_OFFS 0x00000011 /* Supplementary Status Register */ +#define UART_MCR_OFFS 0x00000004 /* Modem Control Register */ +#define UART_MSR_OFFS 0x00000006 /* Modem Status Register */ +#define UART_IER_OFFS 0x00000001 /* Interrupt Enable Register */ +#define UART_ISR_OFFS 0x00000002 /* Interrupt Status Register */ +#define UART_EFR_OFFS 0x00000002 /* Enhanced Feature Register */ +#define UART_XON1_OFFS 0x00000004 /* XON1 Character Register */ +#define UART_XON2_OFFS 0x00000005 /* XON2 Character Register */ +#define UART_XOFF1_OFFS 0x00000006 /* XOFF1 Character Register */ +#define UART_XOFF2_OFFS 0x00000007 /* XOFF2 Character Register */ +#define UART_SPR_OFFS 0x00000007 /* Scratch-pad Register */ +#define UART_DIV_LOW_OFFS 0x00000000 /* Divisor for baud generation */ +#define UART_DIV_HIGH_OFFS 0x00000001 +#define UART_TCR_OFFS 0x00000006 /* Transmission Control Register */ +#define UART_TLR_OFFS 0x00000007 /* Trigger Level Register */ +#define UART_MDR_OFFS 0x00000008 /* Mode Definition Register */ + +/* UART Settings ************************************************************/ + +/* Miscellaneous UART settings. */ + +#define IRQ_UART 1 +#define UART_REGISTER_BITS 8 +#define UART_IRQ IRQ_UART + +#define UART_RX_FIFO_NOEMPTY 0x00000001 +#define UART_SSR_TXFULL 0x00000001 +#define UART_LSR_TREF 0x00000020 + +#define UART_XMIT_FIFO_SIZE 64 +#define UART_IRDA_XMIT_FIFO_SIZE 64 + +/* UART_LCR Register */ + /* Bits 31-7: Reserved */ +#define UART_LCR_BOC 0x00000040 /* Bit 6: Break Control */ + /* Bit 5: Parity Type 2 */ +#define UART_LCR_PAREVEN 0x00000010 /* Bit 4: Parity Type 1 */ +#define UART_LCR_PARODD 0x00000000 +#define UART_LCR_PARMARK 0x00000010 +#define UART_LCR_PARSPACE 0x00000011 +#define UART_LCR_PAREN 0x00000008 /* Bit 3: Paity Enable */ +#define UART_LCR_PARDIS 0x00000000 +#define UART_LCR_2STOP 0x00000004 /* Bit 2: Number of stop bits */ +#define UART_LCR_1STOP 0x00000000 +#define UART_LCR_5BITS 0x00000000 /* Bits 0-1: Word-length */ +#define UART_LCR_6BITS 0x00000001 +#define UART_LCR_7BITS 0x00000002 +#define UART_LCR_8BITS 0x00000003 + +#define UART_FCR_FTL 0x000000f0 +#define UART_FCR_FIFO_EN 0x00000001 +#define UART_FCR_TX_CLR 0x00000002 +#define UART_FCR_RX_CLR 0x00000004 + +#define UART_IER_RECVINT 0x00000001 +#define UART_IER_XMITINT 0x00000002 +#define UART_IER_LINESTSINT 0x00000004 +#define UART_IER_MODEMSTSINT 0x00000008 /* IrDA UART only */ +#define UART_IER_XOFFINT 0x00000020 +#define UART_IER_RTSINT 0x00000040 /* IrDA UART only */ +#define UART_IER_CTSINT 0x00000080 /* IrDA UART only */ +#define UART_IER_INTMASK 0x000000ff + +#define BAUD_115200 0x00000007 +#define BAUD_57600 0x00000014 +#define BAUD_38400 0x00000021 +#define BAUD_19200 0x00000006 +#define BAUD_9600 0x0000000C +#define BAUD_4800 0x00000018 +#define BAUD_2400 0x00000030 +#define BAUD_1200 0x00000060 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_MOXART_CHIP_H */ diff --git a/arch/arm/src/moxart/moxart_16550.c b/arch/arm/src/moxart/moxart_16550.c new file mode 100644 index 0000000000..fb943db0b8 --- /dev/null +++ b/arch/arm/src/moxart/moxart_16550.c @@ -0,0 +1,24 @@ +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "arm.h" +#include "up_arch.h" + +uart_datawidth_t uart_getreg(uart_addrwidth_t base, unsigned int offset) +{ + return *((volatile uart_addrwidth_t *)base + offset); +} + +void uart_putreg(uart_addrwidth_t base, unsigned int offset, uart_datawidth_t value) +{ + *((volatile uart_addrwidth_t *)base + offset) = value; +} diff --git a/arch/arm/src/moxart/moxart_head.S b/arch/arm/src/moxart/moxart_head.S new file mode 100644 index 0000000000..eb83b68516 --- /dev/null +++ b/arch/arm/src/moxart/moxart_head.S @@ -0,0 +1,23 @@ +/* Place a branch to the real head at the entry point */ +.section .text.start + b __start + + +/* Exception Vectors like they are needed for the exception vector + indirection of the internal boot ROM. The following section must + be liked to appear at 0x80001c */ +.section .text.exceptions +_undef_instr: + b up_vectorundefinsn +_sw_interr: + b up_vectorswi +_prefetch_abort: + b up_vectorprefetch +_data_abort: + b up_vectordata +_reserved: + b _reserved +_irq: + b up_vectorirq +_fiq: + b up_vectorfiq diff --git a/arch/arm/src/moxart/moxart_idle.c b/arch/arm/src/moxart/moxart_idle.c new file mode 100644 index 0000000000..ca6d848a79 --- /dev/null +++ b/arch/arm/src/moxart/moxart_idle.c @@ -0,0 +1,95 @@ +/**************************************************************************** + * arch/arm/src/common/up_idle.c + * + * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +#define BEGIN_IDLE (*(volatile uint32_t *)0x98700000) &= ~0x10 +#define END_IDLE (*(volatile uint32_t *)0x98700000) |= 0x10 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idle + * + * Description: + * up_idle() is the logic that will be executed when their is no other + * ready-to-run task. This is processor idle time and will continue until + * some interrupt occurs to cause a context switch from the idle task. + * + * Processing in this state may be processor-specific. e.g., this is where + * power management operations might be performed. + * + ****************************************************************************/ + +void up_idle(void) +{ +#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS) + /* If the system is idle and there are no timer interrupts, then process + * "fake" timer interrupts. Hopefully, something will wake up. + */ + + sched_process_timer(); +#else + uint32_t i; + + /* Sleep until an interrupt occurs to save power */ + + BEGIN_IDLE; + //asm("nop\nnop\nmcr p15, 0, r0, c7, c0, 4\n"); + for (i=0; i<0x40000; i++) asm("nop"); + END_IDLE; + for (i=0; i<0x40000; i++) asm("nop"); +#endif +} diff --git a/arch/arm/src/moxart/moxart_irq.c b/arch/arm/src/moxart/moxart_irq.c new file mode 100644 index 0000000000..9b1837e215 --- /dev/null +++ b/arch/arm/src/moxart/moxart_irq.c @@ -0,0 +1,293 @@ +/**************************************************************************** + * arch/arm/src/moxart/moxart_irq.c + * Driver for MoxaRT IRQ controller + * + * (C) 2010 by Harald Welte + * (C) 2011 by Stefan Richter + * + * This source code is derivated from Osmocom-BB project and was + * relicensed as BSD with permission from original authors. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "arm.h" +#include "up_arch.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define IRQ_ADDR 0x98800000 +#define IRQ_REG(x) (IRQ_ADDR + x) + +#define IRQ__SRC 0x00 +#define IRQ__MASK 0x04 +#define IRQ__CLEAR 0x08 +#define IRQ__MODE 0x0C +#define IRQ__LEVEL 0x10 +#define IRQ__STATUS 0x14 + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +volatile uint32_t *current_regs; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_irqinitialize + * + * Description: + * Setup the IRQ and FIQ controllers + * + ****************************************************************************/ + +void up_irqinitialize(void) +{ + /* Prepare hardware */ + (*(volatile uint32_t *)0x98100008) &= ~0x9; + + while (!((*(volatile uint32_t *)0x98100008) & 0x2)) { ; } + + (*(volatile uint32_t *)0x98100008) |= 0x4; + + (*(volatile uint32_t *)0x98800100) = 0xDFF8003F; + + /* Mask all interrupts off */ + putreg32(0, IRQ_REG(IRQ__MASK)); + putreg32(0, IRQ_REG(IRQ__MASK+0x20)); + putreg32(0xffffffff, IRQ_REG(IRQ__CLEAR)); + putreg32(0xffffffff, IRQ_REG(IRQ__CLEAR+0x20)); + + /* Initial trigger mode and level */ + putreg32(0, IRQ_REG(IRQ__MODE)); + putreg32(0, IRQ_REG(IRQ__LEVEL)); + putreg32(0, IRQ_REG(IRQ__MODE+0x20)); + putreg32(0, IRQ_REG(IRQ__LEVEL+0x20)); + + /* currents_regs is non-NULL only while processing an interrupt */ + + current_regs = NULL; + + /* And finally, enable interrupts */ + +#if 1 +#define REG(x) (*(volatile uint32_t *)(x)) + lldbg("\n=============================================================\n"); + lldbg("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n", REG(0x98400030), REG(0x98400034), REG(0x98400038), REG(0x98400004), REG(0x98400000), REG(0x98400008)); + lldbg("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n", REG(0x98800014), REG(0x98800004), REG(0x9880000C), REG(0x98800010)); + lldbg("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n", REG(0x98800034), REG(0x98800024), REG(0x9880002C), REG(0x98800020)); + lldbg("=============================================================\n"); +#endif + +#ifndef CONFIG_SUPPRESS_INTERRUPTS + irqrestore(SVC_MODE | PSR_F_BIT); +#endif +} + +static inline void ftintc010_mask_irq(int irq) +{ + /* + * 0: masked + * 1: unmasked + */ + uint32_t mask; + + mask = getreg32(IRQ_REG(IRQ__MASK)); + mask &= ~(1 << irq); + putreg32(mask, IRQ_REG(IRQ__MASK)); +} + +static inline void ftintc010_unmask_irq(int irq) +{ + /* + * 0: masked + * 1: unmasked + */ + uint32_t mask; + + mask = getreg32(IRQ_REG(IRQ__MASK)); + mask |= 1 << irq; + putreg32(mask, IRQ_REG(IRQ__MASK)); +} + +static inline void ftintc010_set_trig_mode(int irq, int mode) +{ + uint32_t irqmode; + + irqmode = getreg32(IRQ_REG(IRQ__MODE)); + + /* + * 0: level trigger + * 1: edge trigger + */ + if (mode) + irqmode |= (1 << irq); + else + irqmode &= ~(1 << irq); + + putreg32(irqmode, IRQ_REG(IRQ__MODE)); +} + +static inline void ftintc010_set_trig_level(int irq, int level) +{ + uint32_t irqlevel; + + irqlevel = getreg32(IRQ_REG(IRQ__MODE)); + + /* + * 0: active-high level trigger / rising edge trigger + * 1: active-low level trigger / falling edge trigger + */ + if (level) + irqlevel |= (1 << irq); + else + irqlevel &= ~(1 << irq); + + putreg32(irqlevel, IRQ_REG(IRQ__MODE)); +} + +/**************************************************************************** + * Name: up_disable_irq + * + * Description: + * Disable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_disable_irq(int irq) +{ + if ((unsigned)irq < NR_IRQS) + { + ftintc010_mask_irq(irq); + ftintc010_set_trig_mode(irq, 0); + ftintc010_set_trig_level(irq, 1); + } +} + +/**************************************************************************** + * Name: up_enable_irq + * + * Description: + * Enable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_enable_irq(int irq) +{ + if ((unsigned)irq < NR_IRQS) + { + ftintc010_unmask_irq(irq); + ftintc010_set_trig_mode(irq, 1); + ftintc010_set_trig_level(irq, 0); + } +} + +static int ffs(uint32_t word) +{ + int t, r; + + if (word == 0) + return 0; + + t = r = 1; + + while (!(word & t)) + { + t <<= 1; + r++; + } + + return r; +} + +/************************************************************************ + * Name: up_ack_irq + * + * Description: + * Acknowledge the interrupt + * + ************************************************************************/ + +void up_ack_irq(int irq) +{ + putreg32((1 << irq), IRQ_REG(IRQ__CLEAR)); +} + +/**************************************************************************** + * Entry point for interrupts + ****************************************************************************/ + +void up_decodeirq(uint32_t *regs) +{ + uint32_t num, status; + + /* Detect & deliver the IRQ */ + status = getreg32(IRQ_REG(IRQ__STATUS)); + if (!status) + return; + + /* Ack IRQ */ + num = ffs(status) - 1; + up_ack_irq(num); + + DEBUGASSERT(current_regs == NULL); + current_regs = regs; + + irq_dispatch(num, regs); + + current_regs = NULL; + up_lowputc('+'); +} diff --git a/arch/arm/src/moxart/moxart_lowputc.S b/arch/arm/src/moxart/moxart_lowputc.S new file mode 100644 index 0000000000..7ae6f217d5 --- /dev/null +++ b/arch/arm/src/moxart/moxart_lowputc.S @@ -0,0 +1,129 @@ +/************************************************************************** + * moxart/moxart_lowputc.S + * + * Copyright (C) 2011 Stefan Richter. All rights reserved. + * Author: Stefan Richter + * + * based on: c5471/c5471_lowputc.S + * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +/************************************************************************** + * Included Files + **************************************************************************/ + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/************************************************************************** + * Pre-processor Definitions + **************************************************************************/ + +/************************************************************************** + * Private Types + **************************************************************************/ + +/************************************************************************** + * Private Function Prototypes + **************************************************************************/ + +/************************************************************************** + * Global Variables + **************************************************************************/ + +/************************************************************************** + * Private Variables + **************************************************************************/ + +/************************************************************************** + * Private Functions + **************************************************************************/ + +/************************************************************************** + * Public Functions + **************************************************************************/ + +/************************************************************************** + * Name: up_lowputc + **************************************************************************/ + +/* This assembly language version has the advantage that it can does not + * require a C stack and uses only r0-r1. Hence it can be used during + * early boot phases. + */ + + .text + .global up_lowputc + .type up_lowputc, function +up_lowputc: + /* On entry, r0 holds the character to be printed */ + + ldr r2, =UART0_BASE /* r2=UART0 base */ + + /* Poll bit 0 of the UART_SSR register. When the bit + * is clear, the TX FIFO is no longer full + */ + +1: ldrb r1, [r2, #UART_LSR] + tst r1, #UART_LSR_THRE + beq 1b + + /* Send the character by writing it into the UART_THR + * register. + */ + + strb r0, [r2, #UART_THR] + + /* Wait for the tranmsit holding regiser (THR) to be + * emptied. This is detemined when bit 6 of the LSR + * is set. + */ + +2: ldrb r1, [r2, #UART_LSR] + tst r1, #UART_LSR_THRE + beq 2b + + /* If the character that we just sent was a linefeed, + * then send a carriage return as well. + */ + + teq r0, #'\n' + moveq r0, #'\r' + beq 1b + + /* And return */ + + mov pc, lr + diff --git a/arch/arm/src/moxart/moxart_systemreset.c b/arch/arm/src/moxart/moxart_systemreset.c new file mode 100644 index 0000000000..160e19e517 --- /dev/null +++ b/arch/arm/src/moxart/moxart_systemreset.c @@ -0,0 +1,105 @@ +/**************************************************************************** + * arch/arm/src/moxart/moxart_systemreset.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" + +#define FTWDT010_LOAD 0x98500004 +#define FTWDT010_RESTART 0x98500008 +#define FTWDT010_CR 0x9850000C + +/**************************************************************************** + * Public functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_systemreset + * + * Description: + * Internal, reset logic. + * + ****************************************************************************/ + +void up_systemreset(void) +{ + putreg32(0, FTWDT010_CR); + putreg32(0, FTWDT010_LOAD); + putreg32(0x5ab9, FTWDT010_RESTART); // Magic + + putreg32(0x11, FTWDT010_CR); + putreg32(0x13, FTWDT010_CR); + + /* Wait for the reset */ + + for (;;); +} + + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. This function may or may not be supported by a + * particular board architecture. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not used by + * a board, the value zero may be provided in calls to board_reset. + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value int this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARDCTL_RESET +int board_reset(int status) +{ + up_systemreset(); + return 0; +} +#endif diff --git a/arch/arm/src/moxart/moxart_timer.c b/arch/arm/src/moxart/moxart_timer.c new file mode 100644 index 0000000000..fea1a3ce45 --- /dev/null +++ b/arch/arm/src/moxart/moxart_timer.c @@ -0,0 +1,151 @@ +/**************************************************************************** + * arch/arm/src/moxart/moxart_timer.c + * MoxaRT internal Timer Driver + * + * (C) 2010 by Harald Welte + * (C) 2011 by Stefan Richter + * + * This source code is derivated from Osmocom-BB project and was + * relicensed as BSD with permission from original authors. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +#include +#include +#include +#include + +#include "up_arch.h" + +#define TM1_ADDR 0x98400000 + +enum timer_reg { + COUNTER_TIMER = 0x00, + CNTL_TIMER = 0x30, + LOAD_TIMER = 0x04, + MATCH1_TIMER = 0x08, + MATCH2_TIMER = 0x0C, + INTR_STATE_TIMER= 0x34, + INTR_MASK_TIMER = 0x38, +}; + +enum timer_ctl { + TM1_ENABLE = (1 << 0), + TM1_CLOCK = (1 << 1), + TM1_OFENABLE = (1 << 5), + TM1_UPDOWN = (1 << 9), +}; + +enum timer_int { + TM1_MATCH1 = (1 << 0), + TM1_MATCH2 = (1 << 1), + TM1_OVERFLOW = (1 << 2), +}; + +/************************************************************ + * Global Functions + ************************************************************/ + +/************************************************************ + * Function: up_timerisr + * + * Description: + * The timer ISR will perform a variety of services for + * various portions of the systems. + * + ************************************************************/ + +uint32_t inside = 0; +static uint32_t cmp = BOARD_32KOSC_FREQUENCY / 1000; + +int up_timerisr(int irq, uint32_t *regs) +{ + uint32_t state; + + inside++; + /* Process timer interrupt */ + state = getreg32(TM1_ADDR + INTR_STATE_TIMER); + state &= ~0x7; + putreg32(state, TM1_ADDR + INTR_STATE_TIMER); + +// *(volatile int *)0x98700000 ^= 0x8; + *(volatile int *)0x98700000 |= 0x2; + + /* Ready for the next interrupt */ + cmp = BOARD_32KOSC_FREQUENCY / 1000; + putreg32(cmp, TM1_ADDR + COUNTER_TIMER); + + sched_process_timer(); + + *(volatile int *)0x98700000 &= ~0x2; + return 0; +} + +/************************************************************ + * Function: up_timer_initialize + * + * Description: + * Setup MoxaRT timer 0 to cause system ticks. + * + * This function is called during start-up to initialize + * the timer interrupt. + * + ************************************************************/ + +void up_timer_initialize(void) +{ + uint32_t tmp; + +// up_disable_irq(IRQ_SYSTIMER); + + *(volatile int *)0x98700000 = 0x3f; + + putreg32(0, TM1_ADDR + CNTL_TIMER); + putreg32(0, TM1_ADDR + INTR_STATE_TIMER); + putreg32(0x1ff, TM1_ADDR + INTR_MASK_TIMER); + + /* Initialize to a known state */ + putreg32(cmp, TM1_ADDR + COUNTER_TIMER); + putreg32(0, TM1_ADDR + LOAD_TIMER); + putreg32(0, TM1_ADDR + MATCH1_TIMER); + + /* Attach and enable the timer interrupt */ + irq_attach(IRQ_SYSTIMER, (xcpt_t)up_timerisr); + up_enable_irq(IRQ_SYSTIMER); + + /* Unmask IRQ */ + tmp = getreg32(TM1_ADDR + INTR_MASK_TIMER); + tmp &= ~TM1_MATCH1; + putreg32(tmp, TM1_ADDR + INTR_MASK_TIMER); + + tmp = getreg32(TM1_ADDR + CNTL_TIMER); + tmp |= TM1_CLOCK | TM1_ENABLE; + putreg32(tmp, TM1_ADDR + CNTL_TIMER); +}