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arch/arm/stm32: Updates to last timer-related changes.

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This commit is contained in:
Maximilian Kriegleder 2019-03-22 11:02:12 -06:00 committed by Gregory Nutt
parent c266f53199
commit 75858219fb
3 changed files with 7 additions and 7 deletions
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10
arch/arm/src/stm32/stm32_oneshot.c
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@ -100,9 +100,9 @@ static int stm32_oneshot_handler(int irg_num, void * context, void *arg)
*/
STM32_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
STM32_TIM_DISABLEINT(oneshot->tch, ATIM_DIER_UIE);
STM32_TIM_DISABLEINT(oneshot->tch, GTIM_DIER_UIE);
STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_DISABLED);
STM32_TIM_ACKINT(oneshot->tch, ATIM_SR_UIF);
STM32_TIM_ACKINT(oneshot->tch, GTIM_SR_UIF);
/* The timer is no longer running */
@ -326,8 +326,8 @@ int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_PULSE);
STM32_TIM_ACKINT(oneshot->tch, ATIM_SR_UIF);
STM32_TIM_ENABLEINT(oneshot->tch, ATIM_DIER_UIE);
STM32_TIM_ACKINT(oneshot->tch, GTIM_SR_UIF);
STM32_TIM_ENABLEINT(oneshot->tch, GTIM_DIER_UIE);
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
@ -407,7 +407,7 @@ int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
/* Now we can disable the interrupt and stop the timer. */
STM32_TIM_DISABLEINT(oneshot->tch, 0);
STM32_TIM_DISABLEINT(oneshot->tch, GTIM_DIER_UIE);
STM32_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
STM32_TIM_SETMODE(oneshot->tch, STM32_TIM_MODE_DISABLED);

2
configs/maple/src/stm32_lcd.c
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@ -86,7 +86,7 @@ static int up_lcdextcominisr(int irq, void *context, void *arg)
if (g_isr == NULL)
{
lcderr("ERROR: error, irq not attached, disabled\n");
STM32_TIM_DISABLEINT(tim, 0);
STM32_TIM_DISABLEINT(tim, ATIM_DIER_UIE);
return OK;
}

2
configs/viewtool-stm32f107/src/stm32_highpri.c
View File

@ -218,7 +218,7 @@ int highpri_main(int argc, char *argv[])
/* Enable the timer interrupt at the NVIC and at TIM6 */
up_enable_irq(STM32_IRQ_TIM6);
STM32_TIM_ENABLEINT(dev, ATIM_SR_UIF);
STM32_TIM_ENABLEINT(dev, ATIM_DIER_UIE);
/* Monitor interrupts */