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A10: Correct handling of the serial busy interrupt

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This commit is contained in:
Gregory Nutt 2013-12-08 08:51:19 -06:00
parent 126bec4e55
commit 764e117965
2 changed files with 15 additions and 2 deletions
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2
ChangeLog
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@ -6381,4 +6381,6 @@
* arch/arm/src/armv7-a/arm_head.S and arm_pghead.S: Add more nop's
after enabling the MMU. The cortex-a8 seems to need these
(2014-1-7).
* arch/arm/src/a1x/a1x_serial.c: Correct handling of the BUSY
interrupt (2014-1-7).

15
arch/arm/src/a1x/a1x_serial.c
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@ -1176,11 +1176,22 @@ static int uart_interrupt(struct uart_dev_s *dev)
/* Busy detect. Just ignore. Cleared by reading the status register */
case UART_IIR_IID_BUSY:
break;
{
/* Read from the UART status register to clear the BUSY condition */
/* Otherwise, there is no (handled) interrupt pending */
status = up_serialin(priv, A1X_UART_USR_OFFSET);
break;
}
/* No further interrupts pending... return now */
case UART_IIR_IID_NONE:
{
return OK;
}
/* Otherwise we have received an interrupt that we cannot handle */
default:
{
lldbg("Unexpected IIR: %02x\n", status);