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ARMv7-M: Add MPU support for strongly couple memory regions

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This commit is contained in:
Gregory Nutt 2015-11-06 11:50:57 -06:00
parent 1c79e77811
commit 771095e25f
1 changed files with 42 additions and 0 deletions
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42
arch/arm/src/armv7-m/mpu.h
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@ -247,6 +247,48 @@ static inline void mpu_control(bool enable, bool hfnmiena, bool privdefena)
putreg32(regval, MPU_CTRL);
}
/****************************************************************************
* Name: mpu_priv_stronglyordered
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
****************************************************************************/
#if defined(CONFIG_ARMV7M_HAVE_ICACHE) || defined(CONFIG_ARMV7M_DCACHE)
static inline void mpu_priv_stronglyordered(uintptr_t base, size_t size)
{
unsigned int region = mpu_allocregion();
uint32_t regval;
uint8_t l2size;
uint8_t subregions;
/* Select the region */
putreg32(region, MPU_RNR);
/* Select the region base address */
putreg32((base & MPU_RBAR_ADDR_MASK) | region | MPU_RBAR_VALID, MPU_RBAR);
/* Select the region size and the sub-region map */
l2size = mpu_log2regionceil(size);
subregions = mpu_subregion(base, size, l2size);
/* The configure the region */
regval = MPU_RASR_ENABLE | /* Enable region */
MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */
((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */
/* Not Cacheable */
/* Not Bufferable */
MPU_RASR_S | /* Shareable */
MPU_RASR_AP_RWNO; /* P:RW U:None */
putreg32(regval, MPU_RASR);
}
#endif
/****************************************************************************
* Name: mpu_user_flash
*