diff --git a/arch/mips/include/pic32mx/cp0.h b/arch/mips/include/pic32mx/cp0.h
index d0feadb6b9..167704304a 100755
--- a/arch/mips/include/pic32mx/cp0.h
+++ b/arch/mips/include/pic32mx/cp0.h
@@ -160,14 +160,14 @@
/* Register Number: 12 Sel: 1 Name: IntCtl */
-#define CP0_CONFIG_VS_SHIFT (5) /* Bits 5-9: Vector spacing bits */
-#define CP0_CONFIG_VS_MASK (0x1f << CP0_CONFIG_VS_SHIFT)
-# define CP0_CONFIG_VS_0BYTES (0x00 << CP0_CONFIG_VS_SHIFT)
-# define CP0_CONFIG_VS_32BYTES (0x01 << CP0_CONFIG_VS_SHIFT)
-# define CP0_CONFIG_VS_64BYTES (0x02 << CP0_CONFIG_VS_SHIFT)
-# define CP0_CONFIG_VS_128BYTES (0x04 << CP0_CONFIG_VS_SHIFT)
-# define CP0_CONFIG_VS_256BYTES (0x08 << CP0_CONFIG_VS_SHIFT)
-# define CP0_CONFIG_VS_512BYTES (0x10 << CP0_CONFIG_VS_SHIFT)
+#define CP0_INTCTL_VS_SHIFT (5) /* Bits 5-9: Vector spacing bits */
+#define CP0_INTCTL_VS_MASK (0x1f << CP0_INTCTL_VS_SHIFT)
+# define CP0_INTCTL_VS_0BYTES (0x00 << CP0_INTCTL_VS_SHIFT)
+# define CP0_INTCTL_VS_32BYTES (0x01 << CP0_INTCTL_VS_SHIFT)
+# define CP0_INTCTL_VS_64BYTES (0x02 << CP0_INTCTL_VS_SHIFT)
+# define CP0_INTCTL_VS_128BYTES (0x04 << CP0_INTCTL_VS_SHIFT)
+# define CP0_INTCTL_VS_256BYTES (0x08 << CP0_INTCTL_VS_SHIFT)
+# define CP0_INTCTL_VS_512BYTES (0x10 << CP0_INTCTL_VS_SHIFT)
/* Register Number: 12 Sel: 2 Name: SRSCtl */
diff --git a/arch/mips/src/pic32mx/pic32mx-head.S b/arch/mips/src/pic32mx/pic32mx-head.S
index c9224e7aca..e474d57e70 100644
--- a/arch/mips/src/pic32mx/pic32mx-head.S
+++ b/arch/mips/src/pic32mx/pic32mx-head.S
@@ -46,6 +46,19 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifdef CONFIG_PIC32MX_MVEC0
+# error "Multi-vectors not supported"
+# ifndef CONFIG_PIC32MX_EBASE
+# error "EBASE address provided" /* Should come from the linker script */
+# endif
+# ifndef CONFIG_PIC32MX_VECTORSPACING
+# error "No vector spacing provided"
+# endif
+#endif
+
+/* Linker memory organization ***********************************************/
/* Data memory is organized as follows:
*
* 1) Possible space reserved for debug data
@@ -261,15 +274,17 @@ __start:
/* Initialize EBase register */
- la t1, _ebase_address
+#ifdef CONFIG_PIC32MX_MVEC
+ la t1, CONFIG_PIC32MX_EBASE
mtc0 t1, PIC32MX_CP0_EBASE
/* Initialize IntCtl register */
- la t1, _vector_spacing
- li t2, 0 /* Clear t2 */
- ins t2, t1, 5, 5 /* Shift value to VS field */
+ li t1, CONFIG_PIC32MX_VECTORSPACING
+ li t2, 0
+ ins t2, t1, CP0_INTCTL_VS_SHIFT, 5
mtc0 t2, PIC32MX_CP0_INTCTL
+#endif
/* Initialize CAUSE registers
* - Enable counting of Count register (DC = 0)
@@ -296,17 +311,17 @@ __start:
*/
mfc0 t0, PIC32MX_CP0_CONFIG
- ext t1, t0, 22,1 /* Extract UDI from Config register */
- sll t1, t1, 17 /* Move UDI to Status.CEE location */
+ ext t1, t0, 22,1 /* Extract UDI from Config register */
+ sll t1, t1, 17 /* Move UDI to Status.CEE location */
mfc0 t0, PIC32MX_CP0_STATUS
- and t0, t0, 0x00580000 /* Preserve SR, NMI, and BEV */
- or t0, t1, t0 /* Include Status.CEE (from UDI) */
+ and t0, t0, 0x00580000 /* Preserve SR, NMI, and BEV */
+ or t0, t1, t0 /* Include Status.CEE (from UDI) */
mtc0 t0, PIC32MX_CP0_STATUS
/* Initialize Status BEV for normal exception vectors */
mfc0 t0, PIC32MX_CP0_STATUS
- and t0, t0, 0xffbfffff # Clear BEV
+ and t0, t0, ~CP0_STATUS_BEV /* Clear BEV */
mtc0 t0, PIC32MX_CP0_STATUS
/* Start NuttX. We do this via a thunk in the text section so that
@@ -364,11 +379,11 @@ halt:
nop
.end __start_nuttx
- /* This global variable is unsigned long g_heapbase and is exported
+ /* This global variable is unsigned int g_heapbase and is exported
* here only because of its coupling to idle thread stack.
*/
- .data
+ .sdata
.align 4
.globl g_heapbase
.type g_heapbase, object
diff --git a/configs/pcblogic-pic32mx/ostest/ld.script b/configs/pcblogic-pic32mx/ostest/ld.script
index 7c8f11a1f1..3781cd567f 100644
--- a/configs/pcblogic-pic32mx/ostest/ld.script
+++ b/configs/pcblogic-pic32mx/ostest/ld.script
@@ -48,18 +48,18 @@ MEMORY
*
* REGION PHYSICAL KSEG SIZE
* DESCRIPTION START ADDR (BYTES)
- * ------------- ---------- ------ ---------------
+ * ------------- ---------- ------ ----------------------
* Exceptions:*
- * Reset 0x1fc00000 KSEG1 512
- * TLB Refill 0x1fc00200 KSEG1 256
- * Cache Error 0x1fc00300 KSEG1 256
- * Others 0x1fc00380 KSEG1 256
- * Interrupt 0x1fc00400 KSEG1 128
- * JTAG 0x1fc00480 KSEG1 16
- * Startup logic 0x1fc00490 KSEG0 4096-896-256-16
- * Exceptions 0x1fc01000 KSEG0 4096
- * Debug code 0x1fc02000 KSEG1 4096-16
- * DEVCFG3-0 0x1fc02ff0 KSEG1 16
+ * Reset 0x1fc00000 KSEG1 512 512
+ * TLB Refill 0x1fc00200 KSEG1 256 768
+ * Cache Error 0x1fc00300 KSEG1 128 896
+ * Others 0x1fc00380 KSEG1 128 1024 (1Kb)
+ * Interrupt 0x1fc00400 KSEG1 128 1152
+ * JTAG 0x1fc00480 KSEG1 16 1168
+ * Startup logic 0x1fc00490 KSEG0 4096-1168 4096 (4Kb)
+ * Exceptions 0x1fc01000 KSEG0 4096 8192 (8Kb)
+ * Debug code 0x1fc02000 KSEG1 4096-16 12272
+ * DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
*
* Exceptions assme:
*
@@ -70,9 +70,9 @@ MEMORY
*/
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 896
- kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 256
- kseg1_intexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
- kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
+ kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
+ kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
+ kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 4096-1168
kseg0_excptmem (rx) : ORIGIN = 0x9fc01000, LENGTH = 4096
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
@@ -194,7 +194,7 @@ SECTIONS
/* RAM functions are positioned at the beginning of RAM so that
* they can be guaranteed to satisfy the 2Kb alignment requirement.
*/
-
+/*
.ramfunc ALIGN(2K) :
{
_sramfunc = ABSOLUTE(.);
@@ -207,7 +207,7 @@ SECTIONS
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
_bmxdudba_address = LENGTH(kseg1_datamem) ;
_bmxdupba_address = LENGTH(kseg1_datamem) ;
-
+*/
.dbg_data (NOLOAD) :
{
. += (DEFINED (_DEBUGGER) ? 0x200 : 0x0);