SIM: Add a simulated I/O Expander driver
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@ -211,8 +211,33 @@ config SIM_TCNWAITERS
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default 4
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depends on !POLL_DISABLE && SIM_TOUCHSCREEN
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---help---
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The maximum number of threads that can be waiting on poll() for a touchscreen event.
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Default: 4
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The maximum number of threads that can be waiting on poll() for a
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touchscreen event. Default: 4
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config SIM_IOEXPANDER
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bool "Simulated I/O Expander"
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default n
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depends on IOEXPANDER
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select IOEXPANDER_INT_ENABLE
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---help---
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Build a simple, simulated I/O Expander chip simulation (for testing
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purposes only).
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if SIM_IOEXPANDER
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config SIM_INT_NCALLBACKS
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int "Max number of interrupt callbacks"
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default 4
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---help---
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This is the maximum number of interrupt callbacks supported
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config SIM_INT_POLLDELAY
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int "Interrupt poll delay (used)"
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default 500000
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---help---
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This microsecond delay defines the polling rate for missed interrupts.
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endif # SIM_IOEXPANDER
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config SIM_SPIFLASH
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bool "Simulated SPI FLASH with SMARTFS"
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@ -395,4 +420,4 @@ config SIM_QSPIFLASH_PAGESIZE
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"wrap" causing the initial data sent to be overwritten.
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This is consistent with standard SPI FLASH operation.
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endif
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endif # ARCH_SIM
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@ -103,6 +103,10 @@ endif
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endif
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endif
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ifeq ($(CONFIG_SIM_IOEXPANDER),y)
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CSRCS += up_ioexpander.c
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endif
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ifeq ($(CONFIG_ELF),y)
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CSRCS += up_elf.c
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endif
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@ -296,6 +296,13 @@ int up_buttonevent(int x, int y, int buttons);
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int sim_ajoy_initialize(void);
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#endif
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/* up_ioexpander.c ********************************************************/
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#ifdef CONFIG_SIM_IOEXPANDER
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struct ioexpander_dev_s;
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FAR struct ioexpander_dev_s *sim_initialize(void);
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#endif
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/* up_tapdev.c ************************************************************/
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#if defined(CONFIG_NET_ETHERNET) && !defined(__CYGWIN__)
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arch/sim/src/up_ioexpander.c
Normal file
794
arch/sim/src/up_ioexpander.c
Normal file
@ -0,0 +1,794 @@
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/****************************************************************************
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* include/nuttx/ioexpander/up_ioexpander.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <semaphore.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/wdog.h>
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#include <nuttx/wqueue.h>
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#include <nuttx/ioexpander/ioexpander.h>
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#include "up_internal.h"
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#ifdef CONFIG_SIM_IOEXPANDER
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define SIM_POLLDELAY (CONFIG_SIM_INT_POLLDELAY / USEC_PER_TICK)
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#define SIM_LEVEL_SENSITIVE(d,p) \
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(((d)->trigger & ((ioe_pinset_t)1 << (p))) == 0)
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#define SIM_LEVEL_HIGH(d,p) \
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(((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
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#define SIM_LEVEL_LOW(d,p) \
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(((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
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#define SIM_EDGE_SENSITIVE(d,p) \
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(((d)->trigger & ((ioe_pinset_t)1 << (p))) != 0)
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#define SIM_EDGE_RISING(d,p) \
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(((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0)
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#define SIM_EDGE_FALLING(d,p) \
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(((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0)
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#define SIM_EDGE_BOTH(d,p) \
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(SIM_LEVEL_RISING(d,p) && SIM_LEVEL_FALLING(d,p))
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This type represents on registered pin interrupt callback */
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struct sim_callback_s
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{
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ioe_pinset_t pinset; /* Set of pin interrupts that will generate
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* the callback. */
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ioe_callback_t cbfunc; /* The saved callback function pointer */
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FAR void *cbarg; /* Callback argument */
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};
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/* This structure represents the state of the I/O Expander driver */
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struct sim_dev_s
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{
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struct ioexpander_dev_s dev; /* Nested structure to allow casting as public gpio
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* expander. */
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ioe_pinset_t inpins; /* Pins select as inputs */
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ioe_pinset_t invert; /* Pin value inversion */
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ioe_pinset_t outval; /* Value of output pins */
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ioe_pinset_t inval; /* Simulated input register */
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ioe_pinset_t last; /* Last pin inputs (for detection of changes) */
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ioe_pinset_t trigger; /* Bit encoded: 0=level 1=edge */
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ioe_pinset_t level[2]; /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */
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WDOG_ID wdog; /* Timer used to poll for interrupt simulation */
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struct work_s work; /* Supports the interrupt handling "bottom half" */
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/* Saved callback information for each I/O expander client */
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struct sim_callback_s cb[CONFIG_SIM_INT_NCALLBACKS];
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* I/O Expander Methods */
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static int sim_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int dir);
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static int sim_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, void *regval);
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static int sim_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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bool value);
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static int sim_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value);
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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static int sim_multiwritepin(FAR struct ioexpander_dev_s *dev,
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FAR uint8_t *pins, FAR bool *values, int count);
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static int sim_multireadpin(FAR struct ioexpander_dev_s *dev,
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FAR uint8_t *pins, FAR bool *values, int count);
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#endif
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static FAR void *sim_attach(FAR struct ioexpander_dev_s *dev,
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ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg);
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static int sim_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle);
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static ioe_pinset_t sim_int_update(FAR struct sim_dev_s *priv);
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static void sim_interrupt_work(void *arg);
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static void sim_interrupt(int argc, wdparm_t arg1, ...);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* Since only single device is supported, the driver state structure may as
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* well be pre-allocated.
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*/
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static struct sim_dev_s g_ioexpander;
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/* I/O expander vtable */
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static const struct ioexpander_ops_s g_sim_ops =
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{
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sim_direction,
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sim_option,
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sim_writepin,
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sim_readpin,
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sim_readpin
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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, sim_multiwritepin
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, sim_multireadpin
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, sim_multireadpin
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#endif
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, sim_attach
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, sim_detach
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sim_direction
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*
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* Description:
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* Set the direction of an ioexpander pin. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* dir - One of the IOEXPANDER_DIRECTION_ macros
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int sim_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int direction)
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{
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FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
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DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS &&
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(direction == IOEXPANDER_DIRECTION_IN ||
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direction == IOEXPANDER_DIRECTION_OUT));
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gpioinfo("pin=%u direction=%s\n",
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pin, (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT");
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/* Set the pin direction */
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if (direction == IOEXPANDER_DIRECTION_IN)
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{
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/* Configure pin as input. */
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priv->inpins |= (1 << pin);
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}
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else /* if (direction == IOEXPANDER_DIRECTION_OUT) */
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{
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/* Configure pin as output. If a bit in this register is cleared to
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* 0, the corresponding port pin is enabled as an output.
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*
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* REVISIT: The value of output has not been selected! This might
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* put a glitch on the output.
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*/
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priv->inpins &= ~(1 << pin);
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}
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return OK;
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}
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/****************************************************************************
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* Name: sim_option
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*
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* Description:
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* Set pin options. Required.
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* Since all IO expanders have various pin options, this API allows setting
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* pin options in a flexible way.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* opt - One of the IOEXPANDER_OPTION_ macros
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* val - The option's value
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int sim_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, FAR void *value)
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{
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FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
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int ret = -ENOSYS;
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DEBUGASSERT(priv != NULL);
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gpioinfo("pin=%u option=%u\n", pin, opt);
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/* Check for pin polarity inversion. The Polarity Inversion Register
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* allows polarity inversion of pins defined as inputs by the
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* Configuration Register. If a bit in this register is set, the
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* corresponding port pin's polarity is inverted. If a bit in this
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* register is cleared, the corresponding port pin's original polarity
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* is retained.
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*/
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if (opt == IOEXPANDER_OPTION_INVERT)
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{
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if ((uintptr_t)value == IOEXPANDER_OPTION_INVERT)
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{
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priv->invert |= (1 << pin);
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}
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else
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{
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priv->invert &= ~(1 << pin);
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}
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}
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/* Interrupt configuration */
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else if (opt == IOEXPANDER_OPTION_INTCFG)
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{
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ioe_pinset_t bit = ((ioe_pinset_t)1 << pin);
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ret = OK;
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switch ((uintptr_t)value)
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{
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case IOEXPANDER_VAL_HIGH: /* Interrupt on high level */
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priv->trigger &= ~bit;
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priv->level[0] |= bit;
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priv->level[1] &= ~bit;
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break;
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case IOEXPANDER_VAL_LOW: /* Interrupt on low level */
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priv->trigger &= ~bit;
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priv->level[0] &= ~bit;
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priv->level[1] |= bit;
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break;
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case IOEXPANDER_VAL_RISING: /* Interrupt on rising edge */
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priv->trigger |= bit;
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priv->level[0] |= bit;
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priv->level[1] &= ~bit;
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break;
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case IOEXPANDER_VAL_FALLING: /* Interrupt on falling edge */
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priv->trigger |= bit;
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priv->level[0] &= ~bit;
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priv->level[1] |= bit;
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break;
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case IOEXPANDER_VAL_BOTH: /* Interrupt on both edges */
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priv->trigger |= bit;
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priv->level[0] |= bit;
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priv->level[1] |= bit;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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}
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return ret;
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}
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/****************************************************************************
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* Name: sim_writepin
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*
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* Description:
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* Set the pin level. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* val - The pin level. Usually TRUE will set the pin high,
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* except if OPTION_INVERT has been set on this pin.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int sim_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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bool value)
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{
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FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
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DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS);
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gpioinfo("pin=%u value=%u\n", pin, value);
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/* Set output pins default value (before configuring it as output) The
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* Output Port Register shows the outgoing logic levels of the pins
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* defined as outputs by the Configuration Register.
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*/
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if (value != 0)
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{
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priv->outval |= (1 << pin);
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}
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else
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{
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priv->outval &= ~(1 << pin);
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}
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return OK;
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}
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/****************************************************************************
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* Name: sim_readpin
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*
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* Description:
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* Read the actual PIN level. This can be different from the last value written
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* to this pin. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin
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* valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
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* if the pin is high, except if OPTION_INVERT has been set on this pin.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int sim_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value)
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{
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FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
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ioe_pinset_t inval;
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DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS && value != NULL);
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gpioinfo("pin=%u\n", pin);
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/* Is this an output pin? */
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if ((priv->inpins & (1 << pin)) != 0)
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{
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inval = priv->inval;
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}
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else
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{
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inval = priv->outval;
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}
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/* Return 0 or 1 to indicate the state of pin */
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return (inval >> pin) & 1;
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}
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/****************************************************************************
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* Name: sim_multiwritepin
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*
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* Description:
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* Set the pin level for multiple pins. This routine may be faster than
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* individual pin accesses. Optional.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pins - The list of pin indexes to alter in this call
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* val - The list of pin levels.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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static int sim_multiwritepin(FAR struct ioexpander_dev_s *dev,
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FAR uint8_t *pins, FAR bool *values,
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int count)
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{
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||||
FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
|
||||
uint8_t pin;
|
||||
int i;
|
||||
|
||||
/* Apply the user defined changes */
|
||||
|
||||
for (i = 0; i < count; i++)
|
||||
{
|
||||
pin = pins[i];
|
||||
DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS);
|
||||
|
||||
if (values[i])
|
||||
{
|
||||
priv->outval |= (1 << pin);
|
||||
}
|
||||
else
|
||||
{
|
||||
priv->outval &= ~(1 << pin);
|
||||
}
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_multireadpin
|
||||
*
|
||||
* Description:
|
||||
* Read the actual level for multiple pins. This routine may be faster than
|
||||
* individual pin accesses. Optional.
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - Device-specific state data
|
||||
* pin - The list of pin indexes to read
|
||||
* valptr - Pointer to a buffer where the pin levels are stored.
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 on success, else a negative error code
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_IOEXPANDER_MULTIPIN
|
||||
static int sim_multireadpin(FAR struct ioexpander_dev_s *dev,
|
||||
FAR uint8_t *pins, FAR bool *values,
|
||||
int count)
|
||||
{
|
||||
FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
|
||||
ioe_pinset_t inval;
|
||||
uint8_t pin;
|
||||
int i;
|
||||
|
||||
DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0);
|
||||
|
||||
gpioinfo("count=%d\n", count);
|
||||
|
||||
/* Update the input status with the 8 bits read from the expander */
|
||||
|
||||
for (i = 0; i < count; i++)
|
||||
{
|
||||
pin = pins[i];
|
||||
DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS);
|
||||
|
||||
/* Is this an output pin? */
|
||||
|
||||
if ((priv->inpins & (1 << pin)) != 0)
|
||||
{
|
||||
inval = priv->inval;
|
||||
}
|
||||
else
|
||||
{
|
||||
inval = priv->outval;
|
||||
}
|
||||
|
||||
values[i] = ((inval & (1 << pin)) != 0);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_attach
|
||||
*
|
||||
* Description:
|
||||
* Attach and enable a pin interrupt callback function.
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - Device-specific state data
|
||||
* pinset - The set of pin events that will generate the callback
|
||||
* callback - The pointer to callback function. NULL will detach the
|
||||
* callback.
|
||||
* arg - User-provided callback argument
|
||||
*
|
||||
* Returned Value:
|
||||
* A non-NULL handle value is returned on success. This handle may be
|
||||
* used later to detach and disable the pin interrupt.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static FAR void *sim_attach(FAR struct ioexpander_dev_s *dev,
|
||||
ioe_pinset_t pinset, ioe_callback_t callback,
|
||||
FAR void *arg)
|
||||
{
|
||||
FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
|
||||
FAR void *handle = NULL;
|
||||
int i;
|
||||
|
||||
/* Find and available in entry in the callback table */
|
||||
|
||||
for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++)
|
||||
{
|
||||
/* Is this entry available (i.e., no callback attached) */
|
||||
|
||||
if (priv->cb[i].cbfunc == NULL)
|
||||
{
|
||||
/* Yes.. use this entry */
|
||||
|
||||
priv->cb[i].pinset = pinset;
|
||||
priv->cb[i].cbfunc = callback;
|
||||
priv->cb[i].cbarg = arg;
|
||||
handle = &priv->cb[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return handle;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_detach
|
||||
*
|
||||
* Description:
|
||||
* Detach and disable a pin interrupt callback function.
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - Device-specific state data
|
||||
* handle - The non-NULL opaque value return by sim_attch()
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 on success, else a negative error code
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int sim_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle)
|
||||
{
|
||||
FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev;
|
||||
FAR struct sim_callback_s *cb = (FAR struct sim_callback_s *)handle;
|
||||
|
||||
DEBUGASSERT(priv != NULL && cb != NULL);
|
||||
DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&priv->cb[0] &&
|
||||
(uintptr_t)cb <= (uintptr_t)&priv->cb[CONFIG_SIM_INT_NCALLBACKS-1]);
|
||||
UNUSED(priv);
|
||||
|
||||
cb->pinset = 0;
|
||||
cb->cbfunc = NULL;
|
||||
cb->cbarg = NULL;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_int_update
|
||||
*
|
||||
* Description:
|
||||
* Check for pending interrupts.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static ioe_pinset_t sim_int_update(FAR struct sim_dev_s *priv)
|
||||
{
|
||||
ioe_pinset_t diff;
|
||||
ioe_pinset_t input;
|
||||
ioe_pinset_t intstat;
|
||||
int pin;
|
||||
|
||||
/* Check the changed bits from last read (Only applies to input pins) */
|
||||
|
||||
input = priv->inval;
|
||||
diff = priv->last ^ input;
|
||||
if (diff == 0)
|
||||
{
|
||||
/* Nothing has changed */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
priv->last = input;
|
||||
intstat = 0;
|
||||
|
||||
/* Check for changes in pins that could generate an interrupt. */
|
||||
|
||||
for (pin = 0; pin < CONFIG_IOEXPANDER_NPINS; pin++)
|
||||
{
|
||||
if (SIM_EDGE_SENSITIVE(priv, pin) && (diff & 1))
|
||||
{
|
||||
/* Edge triggered. Set interrupt in function of edge type */
|
||||
|
||||
if (((input & 1) == 0 && SIM_EDGE_FALLING(priv, pin)) ||
|
||||
((input & 1) != 0 && SIM_EDGE_RISING(priv, pin)))
|
||||
{
|
||||
intstat |= 1 << pin;
|
||||
}
|
||||
}
|
||||
else /* if (SIM_LEVEL_SENSITIVE(priv, pin)) */
|
||||
{
|
||||
/* Level triggered. Set intstat if in match level type. */
|
||||
|
||||
if (((input & 1) != 0 && SIM_LEVEL_HIGH(priv, pin)) ||
|
||||
((input & 1) == 0 && SIM_LEVEL_LOW(priv, pin)))
|
||||
{
|
||||
intstat |= 1 << pin;
|
||||
}
|
||||
}
|
||||
|
||||
diff >>= 1;
|
||||
input >>= 1;
|
||||
}
|
||||
|
||||
return intstat;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_interrupt_work
|
||||
*
|
||||
* Description:
|
||||
* Handle GPIO interrupt events (this function actually executes in the
|
||||
* context of the worker thread).
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void sim_interrupt_work(void *arg)
|
||||
{
|
||||
FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)arg;
|
||||
ioe_pinset_t intstat;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
DEBUGASSERT(priv != NULL);
|
||||
|
||||
/* Update the input status with the 32 bits read from the expander */
|
||||
|
||||
intstat = sim_int_update(priv);
|
||||
|
||||
/* Perform pin interrupt callbacks */
|
||||
|
||||
for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++)
|
||||
{
|
||||
/* Is this entry valid (i.e., callback attached)? */
|
||||
|
||||
if (priv->cb[i].cbfunc != NULL)
|
||||
{
|
||||
/* Did any of the requested pin interrupts occur? */
|
||||
|
||||
ioe_pinset_t match = intstat & priv->cb[i].pinset;
|
||||
if (match != 0)
|
||||
{
|
||||
/* Yes.. perform the callback */
|
||||
|
||||
(void)priv->cb[i].cbfunc(&priv->dev, match,
|
||||
priv->cb[i].cbarg);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Re-start the poll timer */
|
||||
|
||||
ret = wd_start(priv->wdog, SIM_POLLDELAY, (wdentry_t)sim_interrupt,
|
||||
1, (wdparm_t)priv);
|
||||
if (ret < 0)
|
||||
{
|
||||
gpioerr("ERROR: Failed to start poll timer\n");
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_interrupt
|
||||
*
|
||||
* Description:
|
||||
* The poll timer has expired; check for missed interrupts
|
||||
*
|
||||
* Input Parameters:
|
||||
* Standard wdog expiration arguments.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void sim_interrupt(int argc, wdparm_t arg1, ...)
|
||||
{
|
||||
FAR struct sim_dev_s *priv;
|
||||
|
||||
DEBUGASSERT(argc == 1);
|
||||
priv = (FAR struct sim_dev_s *)arg1;
|
||||
DEBUGASSERT(priv != NULL);
|
||||
|
||||
/* Defer interrupt processing to the worker thread. This is not only
|
||||
* much kinder in the use of system resources but is probably necessary
|
||||
* to access the I/O expander device.
|
||||
*
|
||||
* Notice that further GPIO interrupts are disabled until the work is
|
||||
* actually performed. This is to prevent overrun of the worker thread.
|
||||
* Interrupts are re-enabled in sim_interrupt_work() when the work is
|
||||
* completed.
|
||||
*/
|
||||
|
||||
if (work_available(&priv->work))
|
||||
{
|
||||
/* Schedule interrupt related work on the high priority worker thread. */
|
||||
|
||||
work_queue(HPWORK, &priv->work, sim_interrupt_work,
|
||||
(FAR void *)priv, 0);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sim_initialize
|
||||
*
|
||||
* Description:
|
||||
* Instantiate and configure the I/O Expander device driver to use the provided
|
||||
* I2C device instance.
|
||||
*
|
||||
* Input Parameters:
|
||||
* i2c - An I2C driver instance
|
||||
* minor - The device i2c address
|
||||
* config - Persistent board configuration data
|
||||
*
|
||||
* Returned Value:
|
||||
* an ioexpander_dev_s instance on success, NULL on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
FAR struct ioexpander_dev_s *sim_initialize(void)
|
||||
{
|
||||
FAR struct sim_dev_s *priv = &g_ioexpander;
|
||||
int ret;
|
||||
|
||||
/* Initialize the device state structure */
|
||||
|
||||
priv->dev.ops = &g_sim_ops;
|
||||
|
||||
/* Initial interrupt state: Edge triggered on both edges */
|
||||
|
||||
priv->trigger = PINSET_ALL; /* All edge triggered */
|
||||
priv->level[0] = PINSET_ALL; /* All rising edge */
|
||||
priv->level[1] = PINSET_ALL; /* All falling edge */
|
||||
|
||||
/* Set up a timer to poll for simulated interrupts */
|
||||
|
||||
priv->wdog = wd_create();
|
||||
DEBUGASSERT(priv->wdog != NULL);
|
||||
|
||||
ret = wd_start(priv->wdog, SIM_POLLDELAY, (wdentry_t)sim_interrupt,
|
||||
1, (wdparm_t)priv);
|
||||
if (ret < 0)
|
||||
{
|
||||
gpioerr("ERROR: Failed to start poll timer\n");
|
||||
}
|
||||
|
||||
return &priv->dev;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SIM_IOEXPANDER */
|
@ -17,7 +17,7 @@ if IOEXPANDER
|
||||
config IOEXPANDER_PCA9555
|
||||
bool "PCA9555 I2C IO expander"
|
||||
default n
|
||||
select I2C
|
||||
depends on I2C
|
||||
---help---
|
||||
Enable support for the NXP PCA9555 IO Expander
|
||||
|
||||
@ -69,8 +69,7 @@ endif # IOEXPANDER_PCA9555
|
||||
config IOEXPANDER_TCA64XX
|
||||
bool "TCA64XX I2C IO expander"
|
||||
default n
|
||||
select I2C
|
||||
depends on EXPERIMENTAL
|
||||
depends on I2C && EXPERIMENTAL
|
||||
---help---
|
||||
Enable support for the TCA64XX IO Expander
|
||||
|
||||
@ -114,8 +113,7 @@ endif # IOEXPANDER_TCA64XX
|
||||
config IOEXPANDER_PCF8574
|
||||
bool "PCF8574 I2C IO expander"
|
||||
default n
|
||||
select I2C
|
||||
depends on EXPERIMENTAL
|
||||
depends on I2C && EXPERIMENTAL
|
||||
---help---
|
||||
Enable support for the PCF8574 IO Expander
|
||||
|
||||
|
@ -111,8 +111,8 @@ static int tca64_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TCA64XX_INT_ENABLE
|
||||
static void tca64_int_update(void *handle, ioe_pinset_t input,
|
||||
ioe_pinset_t mask);
|
||||
static void tca64_int_update(FAR struct tca64_dev_s *priv,
|
||||
ioe_pinset_t input, ioe_pinset_t mask);
|
||||
static void tca64_register_update(FAR struct tca64_dev_s *priv);
|
||||
static void tca64_irqworker(void *arg);
|
||||
static void tca64_interrupt(FAR void *arg);
|
||||
@ -676,11 +676,11 @@ static int tca64_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||||
|
||||
if (value != 0)
|
||||
{
|
||||
regval |= (1 << (pin % 8));
|
||||
regval |= (1 << (pin & 7));
|
||||
}
|
||||
else
|
||||
{
|
||||
regval &= ~(1 << (pin % 8));
|
||||
regval &= ~(1 << (pin & 7));
|
||||
}
|
||||
|
||||
/* Write the modified output register value */
|
||||
@ -1025,10 +1025,9 @@ static int tca64_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_TCA64XX_INT_ENABLE
|
||||
static void tca64_int_update(void *handle, ioe_pinset_t input,
|
||||
static void tca64_int_update(FAR struct tca64_dev_s *priv, ioe_pinset_t input,
|
||||
ioe_pinset_t mask)
|
||||
{
|
||||
struct tca64_dev_s *priv = handle;
|
||||
ioe_pinset_t diff;
|
||||
irqstate_t flags;
|
||||
int ngios = tca64_ngpios(priv);
|
||||
|
@ -64,6 +64,9 @@
|
||||
#define IOEXPANDER_DIRECTION_IN 0
|
||||
#define IOEXPANDER_DIRECTION_OUT 1
|
||||
|
||||
#define IOEXPANDER_PINMASK (((ioe_pinset_t)1 << CONFIG_IOEXPANDER_NPINS) - 1)
|
||||
#define PINSET_ALL (~((ioe_pinset_t)0))
|
||||
|
||||
/* Pin options */
|
||||
|
||||
#define IOEXPANDER_OPTION_INVERT 1 /* Set the "active" level for a pin */
|
||||
@ -78,8 +81,6 @@
|
||||
# define IOEXPANDER_VAL_FALLING 4 /* 100 Interrupt on falling edge */
|
||||
# define IOEXPANDER_VAL_BOTH 6 /* 110 Interrupt on both edges */
|
||||
|
||||
#define PINSET_ALL (~((ioe_pinset_t)0))
|
||||
|
||||
/* Access macros ************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
|
Loading…
Reference in New Issue
Block a user