diff --git a/arch/risc-v/src/common/riscv_exception_common.S b/arch/risc-v/src/common/riscv_exception_common.S index d30c3f5adb..664c235770 100644 --- a/arch/risc-v/src/common/riscv_exception_common.S +++ b/arch/risc-v/src/common/riscv_exception_common.S @@ -28,6 +28,7 @@ #include #include +#include "chip.h" #include "riscv_macros.S" /**************************************************************************** diff --git a/arch/risc-v/src/esp32c3/Make.defs b/arch/risc-v/src/esp32c3/Make.defs index 74e83b5923..ea8fcae986 100644 --- a/arch/risc-v/src/esp32c3/Make.defs +++ b/arch/risc-v/src/esp32c3/Make.defs @@ -25,7 +25,11 @@ include chip/Bootloader.mk HEAD_ASRC = esp32c3_head.S -CHIP_ASRCS = esp32c3_vectors.S esp32c3_interrupt.S +CHIP_ASRCS = esp32c3_vectors.S + +# Specify our general Assembly files + +CMN_ASRCS = riscv_exception_common.S # Specify C code within the common directory to be included diff --git a/arch/risc-v/src/esp32c3/chip.h b/arch/risc-v/src/esp32c3/chip.h index 67a6bcf303..2ae947ddae 100644 --- a/arch/risc-v/src/esp32c3/chip.h +++ b/arch/risc-v/src/esp32c3/chip.h @@ -28,4 +28,12 @@ #include #include "esp32c3_memorymap.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Section for exception handler. */ + +#define EXCEPTION_SECTION .iram1 + #endif /* __ARCH_RISCV_SRC_ESP32C3_CHIP_H */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_interrupt.S b/arch/risc-v/src/esp32c3/esp32c3_interrupt.S deleted file mode 100644 index d86c61944d..0000000000 --- a/arch/risc-v/src/esp32c3/esp32c3_interrupt.S +++ /dev/null @@ -1,179 +0,0 @@ -/**************************************************************************** - * arch/risc-v/src/esp32c3/esp32c3_interrupt.S - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include - -#include "chip.h" - -/**************************************************************************** - * Public Symbols - ****************************************************************************/ - - .global _interrupt_handler - .global _exception_handler - .global g_intstackalloc - .global g_intstacktop - -/**************************************************************************** - * Section: .noinit - ****************************************************************************/ - - .section .noinit - -#if CONFIG_ARCH_INTERRUPTSTACK > 15 - .balign 16 - .type g_intstackalloc, @object - .type g_intstacktop, @object -g_intstackalloc: - .skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15) -g_intstacktop: - .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15) -#endif - -/**************************************************************************** - * Section: .iram1 - ****************************************************************************/ - - .section .iram1 - -/**************************************************************************** - * Name: _interrupt_handler - ****************************************************************************/ - - .type _interrupt_handler, @function - -_exception_handler: -_interrupt_handler: - addi sp, sp, -XCPTCONTEXT_SIZE - - sw x1, 1*4(sp) /* ra */ - sw x3, 3*4(sp) /* gp (For register dumping on exception handler) */ - sw x4, 4*4(sp) /* tp */ - sw x5, 5*4(sp) /* t0 */ - sw x6, 6*4(sp) /* t1 */ - sw x7, 7*4(sp) /* t2 */ - sw x8, 8*4(sp) /* s0 */ - sw x9, 9*4(sp) /* s1 */ - sw x10, 10*4(sp) /* a0 */ - sw x11, 11*4(sp) /* a1 */ - sw x12, 12*4(sp) /* a2 */ - sw x13, 13*4(sp) /* a3 */ - sw x14, 14*4(sp) /* a4 */ - sw x15, 15*4(sp) /* a5 */ - sw x16, 16*4(sp) /* a6 */ - sw x17, 17*4(sp) /* a7 */ - sw x18, 18*4(sp) /* s2 */ - sw x19, 19*4(sp) /* s3 */ - sw x20, 20*4(sp) /* s4 */ - sw x21, 21*4(sp) /* s5 */ - sw x22, 22*4(sp) /* s6 */ - sw x23, 23*4(sp) /* s7 */ - sw x24, 24*4(sp) /* s8 */ - sw x25, 25*4(sp) /* s9 */ - sw x26, 26*4(sp) /* s10 */ - sw x27, 27*4(sp) /* s11 */ - sw x28, 28*4(sp) /* t3 */ - sw x29, 29*4(sp) /* t4 */ - sw x30, 30*4(sp) /* t5 */ - sw x31, 31*4(sp) /* t6 */ - - addi s0, sp, XCPTCONTEXT_SIZE - sw s0, 2*4(sp) /* Save original SP */ - - /* Save MSTATUS (Machine Status Register) */ - - csrr s0, mstatus - sw s0, 32*4(sp) - - /* Save MEPC (Machine Exception Program Counter) */ - - csrr s0, mepc - sw s0, 0(sp) - - csrr a0, mcause /* Handler arg0: Exception cause */ - mv a1, sp /* Handler arg1: Context (saved registers on stack) */ - -#if CONFIG_ARCH_INTERRUPTSTACK > 15 - lui sp, %hi(g_intstacktop) - addi sp, sp, %lo(g_intstacktop) -#endif - - /* Call interrupt/exception handler in C */ - - jal x1, esp32c3_dispatch_irq - - /* If context switch is needed, return a new SP */ - - mv sp, a0 - - /* Restore MEPC (Machine Exception Program Counter) */ - - lw s0, 0(sp) - csrw mepc, s0 - - /* Restore MSTATUS (Machine Status Register) */ - - lw s0, 32*4(sp) - csrw mstatus, s0 - - lw x1, 1*4(sp) /* ra */ - - /* GP must not be changed after start-up due to relaxing optimization */ - - lw x4, 4*4(sp) /* tp */ - lw x5, 5*4(sp) /* t0 */ - lw x6, 6*4(sp) /* t1 */ - lw x7, 7*4(sp) /* t2 */ - lw x8, 8*4(sp) /* s0 */ - lw x9, 9*4(sp) /* s1 */ - lw x10, 10*4(sp) /* a0 */ - lw x11, 11*4(sp) /* a1 */ - lw x12, 12*4(sp) /* a2 */ - lw x13, 13*4(sp) /* a3 */ - lw x14, 14*4(sp) /* a4 */ - lw x15, 15*4(sp) /* a5 */ - lw x16, 16*4(sp) /* a6 */ - lw x17, 17*4(sp) /* a7 */ - lw x18, 18*4(sp) /* s2 */ - lw x19, 19*4(sp) /* s3 */ - lw x20, 20*4(sp) /* s4 */ - lw x21, 21*4(sp) /* s5 */ - lw x22, 22*4(sp) /* s6 */ - lw x23, 23*4(sp) /* s7 */ - lw x24, 24*4(sp) /* s8 */ - lw x25, 25*4(sp) /* s9 */ - lw x26, 26*4(sp) /* s10 */ - lw x27, 27*4(sp) /* s11 */ - lw x28, 28*4(sp) /* t3 */ - lw x29, 29*4(sp) /* t4 */ - lw x30, 30*4(sp) /* t5 */ - lw x31, 31*4(sp) /* t6 */ - - lw sp, 2*4(sp) /* Restore original SP */ - - /* Return from Machine Interrupt */ - - mret - diff --git a/arch/risc-v/src/esp32c3/esp32c3_irq.c b/arch/risc-v/src/esp32c3/esp32c3_irq.c index 4b990d71cb..63530261ee 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_irq.c +++ b/arch/risc-v/src/esp32c3/esp32c3_irq.c @@ -339,7 +339,7 @@ void esp32c3_free_cpuint(uint8_t periphid) } /**************************************************************************** - * Name: esp32c3_dispatch_irq + * Name: riscv_dispatch_irq * * Description: * Process interrupt and its callback function. @@ -353,7 +353,7 @@ void esp32c3_free_cpuint(uint8_t periphid) * ****************************************************************************/ -IRAM_ATTR uintptr_t *esp32c3_dispatch_irq(uintptr_t mcause, uintptr_t *regs) +IRAM_ATTR uintptr_t *riscv_dispatch_irq(uintptr_t mcause, uintptr_t *regs) { int irq; uint8_t cpuint = mcause & RISCV_IRQ_MASK; diff --git a/arch/risc-v/src/esp32c3/esp32c3_irq.h b/arch/risc-v/src/esp32c3/esp32c3_irq.h index 54cd41003c..3290fbf9d5 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_irq.h +++ b/arch/risc-v/src/esp32c3/esp32c3_irq.h @@ -95,21 +95,4 @@ int esp32c3_request_irq(uint8_t periphid, uint8_t prio, uint32_t flags); void esp32c3_free_cpuint(uint8_t periphid); -/**************************************************************************** - * Name: esp32c3_dispatch_irq - * - * Description: - * Process interrupt and its callback function. - * - * Input Parameters: - * mcause - RISC-V "mcause" register value - * regs - Saved register value array - * - * Returned Value: - * None. - * - ****************************************************************************/ - -uintptr_t *esp32c3_dispatch_irq(uintptr_t mcause, uintptr_t *regs); - #endif /* __ARCH_RISCV_SRC_ESP32C3_ESP32C3_IRQ_H */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_vectors.S b/arch/risc-v/src/esp32c3/esp32c3_vectors.S index d26632c64f..25e1620609 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_vectors.S +++ b/arch/risc-v/src/esp32c3/esp32c3_vectors.S @@ -51,13 +51,7 @@ _vector_table: .option push .option norvc - /* exception handler, entry 0 */ - - j _exception_handler - - /* 31 identical entries, all pointing to the interrupt handler */ - - .rept (31) - j _interrupt_handler + .rept (32) + j exception_common .endr