risc-v/mpfs: introduce IHC driver

This provides an example of Asymmetric Multiprocessing (AMP). The
master from Linux sends pings that this NuttX echoes back. The system
uses RPMsg from OpenAMP.

The Inter-Hart Communication module is present in the vendor's software
stack with the tag "2021.11". The software is present on github at the
polarfire-soc project. The following conditions must be met:

 1. FPGA programmed with 2021.11 software
 2. HSS (Vendor bootloader) with 2021.11 software
 3. U-boot and Linux kernel from 2011.11 software

Currently the IHC works as a slave only on the hart number 4.

On the NuttX side, this patch uses rptun that incorporates rpmsg and
virtio. If it used only rpmsg and virtio, the future maintenance would
likely be much heavier. Using rptun also simplifies many things.

Upon success, the master side from Linux may issue an example test:

root@icicle-kit-es-amp:/opt/microchip/amp/rpmsg-pingpong# ./rpmsg-pingpong

However, the rpmsg-pingpong.c (compiled on target with gcc), may need to
be modified as seen below to match the device id:
 - char *rpmsg_dev="virtio0.rpmsg-amp-demo-channel.-1.0";
 + char *rpmsg_dev="virtio0.rpmsg-amp-demo-channel.-1.1024";

This work uses a separate linker script. Due to a bug yet unknown to date,
a small NuttX, when loaded by the vendor HSS bootloader, will cause the
Linux kernel to hang at boot. Thus, the binary size is increased with
a section 'filler_area' whose only purpose is to increase the image size
so that the Linux kernel will boot up.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
This commit is contained in:
Eero Nurkkala 2022-05-03 07:33:16 +03:00 committed by Xiang Xiao
parent bc61e71b94
commit 77e36d1acc
12 changed files with 1919 additions and 1 deletions

View File

@ -239,6 +239,13 @@ config MPFS_EMMCSD
---help---
Selects the MPFS eMMCSD driver.
config MPFS_IHC
bool "IHC slave"
depends on RPTUN
default n
---help---
Selects and enables the Inter-Hart-Communication (IHC) slave driver.
config MPFS_ETHMAC
bool
default n

View File

@ -143,3 +143,7 @@ endif
ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += mpfs_usb.c
endif
ifeq ($(CONFIG_MPFS_IHC),y)
CHIP_CSRCS += mpfs_ihc.c
endif

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@ -0,0 +1,252 @@
/****************************************************************************
* arch/risc-v/src/mpfs/hardware/mpfs_ihc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_IHC_H
#define __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_IHC_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define MPFS_NUM_HARTS 5
#define UNDEFINED_HART_ID 99
/* My Hart 0 */
#define IHC_LOCAL_H0_REMOTE_H1 0x50000000
#define IHC_LOCAL_H0_REMOTE_H2 0x50000100
#define IHC_LOCAL_H0_REMOTE_H3 0x50000200
#define IHC_LOCAL_H0_REMOTE_H4 0x50000300
#define IHCIA_LOCAL_H0 0x50000400
/* My Hart 0 */
#define IHC_LOCAL_H1_REMOTE_H0 0x50000500
#define IHC_LOCAL_H1_REMOTE_H2 0x50000600
#define IHC_LOCAL_H1_REMOTE_H3 0x50000700
#define IHC_LOCAL_H1_REMOTE_H4 0x50000800
#define IHCIA_LOCAL_H1 0x50000900
/* My Hart 0 */
#define IHC_LOCAL_H2_REMOTE_H0 0x50000a00
#define IHC_LsOCAL_H2_REMOTE_H1 0x50000b00
#define IHC_LOCAL_H2_REMOTE_H3 0x50000c00
#define IHC_LOCAL_H2_REMOTE_H4 0x50000d00
#define IHCIA_LOCAL_H2 0x50000e00
/* My Hart 0 */
#define IHC_LOCAL_H3_REMOTE_H0 0x50000f00
#define IHC_LOCAL_H3_REMOTE_H1 0x50001000
#define IHC_LOCAL_H3_REMOTE_H2 0x50001100
#define IHC_LOCAL_H3_REMOTE_H4 0x50001200
#define IHCIA_LOCAL_H3 0x50001300
/* My Hart 0 */
#define IHC_LOCAL_H4_REMOTE_H0 0x50001400
#define IHC_LOCAL_H4_REMOTE_H1 0x50001500
#define IHC_LOCAL_H4_REMOTE_H2 0x50001600
#define IHC_LOCAL_H4_REMOTE_H3 0x50001700
#define IHCIA_LOCAL_H4 0x50001800
#define MPFS_IHC_VERSION_OFFSET 0x00
#define MPFS_IHC_CTRL_OFFSET 0x04
#define MPFS_IHC_LOCAL_HARTID_OFFSET 0x08
#define MPFS_IHC_MSG_SIZE_OFFSET 0x0c
#define MPFS_IHC_MSG_UNUSED_OFFSET 0x10
#define MPFS_IHC_MSG_IN_OFFSET 0x20
#define MPFS_IHC_MSG_OUT_OFFSET 0x30
#define MPFS_IHC_INT_EN_OFFSET 0x04
#define MPFS_IHC_MSG_AVAIL_OFFSET 0x08
#define MPFS_LOCAL_REMOTE_OFFSET(l, r) (0x500 * l + 0x100 * r)
#define MPFS_IHC_VERSION(l, r) (IHC_LOCAL_H0_REMOTE_H1 + MPFS_IHC_VERSION_OFFSET + MPFS_LOCAL_REMOTE_OFFSET(l, r))
#define MPFS_IHC_CTRL(l, r) (IHC_LOCAL_H0_REMOTE_H1 + MPFS_IHC_CTRL_OFFSET + MPFS_LOCAL_REMOTE_OFFSET(l, r))
#define MPFS_IHC_LOCAL_HARTID(l, r) (IHC_LOCAL_H0_REMOTE_H1 + MPFS_IHC_LOCAL_HARTID_OFFSET + MPFS_LOCAL_REMOTE_OFFSET(l, r))
#define MPFS_IHC_MSG_SIZE(l, r) (IHC_LOCAL_H0_REMOTE_H1 + MPFS_IHC_MSG_SIZE_OFFSET + MPFS_LOCAL_REMOTE_OFFSET(l, r))
#define MPFS_IHC_MSG_IN(l, r) (IHC_LOCAL_H0_REMOTE_H1 + MPFS_IHC_MSG_IN_OFFSET + MPFS_LOCAL_REMOTE_OFFSET(l, r))
#define MPFS_IHC_MSG_OUT(l, r) (IHC_LOCAL_H0_REMOTE_H1 + MPFS_IHC_MSG_OUT_OFFSET + MPFS_LOCAL_REMOTE_OFFSET(l, r))
#define MPFS_IHC_INT_EN(l) (IHCIA_LOCAL_H0 + MPFS_IHC_INT_EN_OFFSET + 0x500 * l)
#define MPFS_IHC_MSG_AVAIL(l) (IHCIA_LOCAL_H0 + MPFS_IHC_MSG_AVAIL_OFFSET + 0x500 * l)
/* Hart mask defines */
#define HART0_ID 0
#define HART1_ID 1
#define HART2_ID 2
#define HART3_ID 3
#define HART4_ID 4
#define HART0_MASK 1
#define HART1_MASK 2
#define HART2_MASK 4
#define HART3_MASK 8
#define HART4_MASK 0x10
/* Monitor hart (HSS hart) used in our system */
#define HSS_HART_MASK HART0_MASK
#define HSS_HART_ID HART0_ID
/* HSS_REMOTE_HARTS_MASK: This is used to define the harts the HSS is
* communicating with
*/
#define HSS_REMOTE_HARTS_MASK (HART1_MASK | HART2_MASK | HART3_MASK | HART4_MASK)
/* Contex A and B hart ID's used in this system. Context A is the master. */
#define CONTEXTA_HARTID 0x01
#define CONTEXTB_HARTID 0x04
/* Define which harts are connected via comms channels to a particular hart
* user defined.
*/
#define IHCIA_H0_REMOTE_HARTS ((~HSS_HART_MASK) & HSS_REMOTE_HARTS_MASK)
/* HSS and Context B connected */
#define IHCIA_H1_REMOTE_HARTS (HSS_HART_MASK | (HART4_MASK))
#define IHCIA_H2_REMOTE_HARTS (HSS_HART_MASK)
#define IHCIA_H3_REMOTE_HARTS (HSS_HART_MASK)
/* HSS and Context A connected */
#define IHCIA_H4_REMOTE_HARTS (HSS_HART_MASK | (HART1_MASK))
#define HSS_HART_DEFAULT_INT_EN (0 << 0)
#define HSS_HART_MP_INT_EN (1 << 0)
#define HSS_HART_ACK_INT_EN (1 << 1)
#define HART1_MP_INT_EN (1 << 2)
#define HART1_ACK_INT_EN (1 << 3)
#define HART2_MP_INT_EN (1 << 4)
#define HART2_ACK_INT_EN (1 << 5)
#define HART3_MP_INT_EN (1 << 6)
#define HART3_ACK_INT_EN (1 << 7)
#define HART4_MP_INT_EN (1 << 8)
#define HART4_ACK_INT_EN (1 << 9)
/* Connected to all harts */
#define IHCIA_H0_REMOTE_HARTS_INTS HSS_HART_DEFAULT_INT_EN
/* HSS and Context B connected */
#define IHCIA_H1_REMOTE_HARTS_INTS (HSS_HART_MP_INT_EN | \
HSS_HART_ACK_INT_EN | \
HART4_MP_INT_EN | \
HART4_ACK_INT_EN)
#define IHCIA_H2_REMOTE_HARTS_INTS HSS_HART_DEFAULT_INT_EN
#define IHCIA_H3_REMOTE_HARTS_INTS HSS_HART_DEFAULT_INT_EN
/* HSS and Context A connected */
#define IHCIA_H4_REMOTE_HARTS_INTS (HSS_HART_MP_INT_EN | \
HSS_HART_ACK_INT_EN | \
HART1_MP_INT_EN | \
HART1_ACK_INT_EN)
/* MiV-IHCC register bit definitions */
#define RMP_MESSAGE_PRESENT (1 << 0) /* Remote side message present */
#define MP_MESSAGE_PRESENT (1 << 1) /* Local side message present */
#define MPIE_EN (1 << 2) /* Enable MP interrupt */
#define ACK_INT (1 << 3) /* Incoming ACK */
#define ACK_CLR (1 << 4) /* Clear ACK */
#define ACKIE_EN (1 << 5) /* Enable Ack Interrupt */
/* Control register bit MASKS */
#define RMP_MASK (1 << 0)
#define MP_MASK (1 << 1)
#define MPIE_MASK (1 << 2)
#define ACK_INT_MASK (1 << 3)
#define IHC_MAX_MESSAGE_SIZE 4
#define LIBERO_SETTING_CONTEXT_A_HART_EN 0x0000000eul /* Harts 1 to 3 */
#define LIBERO_SETTING_CONTEXT_B_HART_EN 0x00000010ul /* Hart 4 */
typedef union ihca_ip_int_en_t_
{
uint32_t int_en;
struct
{
uint32_t mp_h0_en : 1;
uint32_t ack_h0_en : 1;
uint32_t mp_h1_en : 1;
uint32_t ack_h1_en : 1;
uint32_t mp_h2_en : 1;
uint32_t ack_h2_en : 1;
uint32_t mp_h3_en : 1;
uint32_t ack_h3_en : 1;
uint32_t mp_h4_en : 1;
uint32_t ack_h4_en : 1;
uint32_t reserved : 22;
} bitfield;
} ihca_ip_int_en_t;
typedef union ihca_ip_msg_avail_stat_t_
{
uint32_t msg_avail;
struct
{
uint32_t mp_h0 : 1;
uint32_t ack_h0 : 1;
uint32_t mp_h1 : 1;
uint32_t ack_h1 : 1;
uint32_t mp_h2 : 1;
uint32_t ack_h2 : 1;
uint32_t mp_h3 : 1;
uint32_t ack_h3 : 1;
uint32_t mp_h4 : 1;
uint32_t ack_h4 : 1;
uint32_t reserved : 22;
} bitfield;
} ihca_ip_msg_avail_stat_t;
typedef union
{
uint32_t ctl_reg;
struct
{
uint32_t rpm :1; /* Remote message present */
uint32_t mp :1; /* Message present */
uint32_t mpie :1; /* Message present interrupt enable */
uint32_t ack :1;
uint32_t clr_ack :1;
uint32_t ackie :1; /* Ack interrupt enable */
uint32_t reserved :26;
} bitfield;
} miv_ihcc_ctl_reg_t;
#endif /* __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_IHC_H */

1276
arch/risc-v/src/mpfs/mpfs_ihc.c Executable file

File diff suppressed because it is too large Load Diff

74
arch/risc-v/src/mpfs/mpfs_ihc.h Executable file
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@ -0,0 +1,74 @@
/****************************************************************************
* arch/risc-v/src/mpfs/mpfs_ihc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_MPFS_MPFS_IHC_H
#define __ARCH_RISCV_SRC_MPFS_MPFS_IHC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdbool.h>
#include "chip.h"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: mpfs_ihc_init
*
* Description:
* This initializes the Inter-Hart Communication (IHC) module. Rptun is
* used to simplify the integration of rpmsg and virtio. This function
* installs the proper interrupt handlers, installs a thread, and performs
* all the required initialization tasks.
*
* Input Parameters:
* None
*
* Returned Value:
* OK on success, a nagated errno on error
*
****************************************************************************/
int mpfs_ihc_init(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_MPFS_MPFS_IHC_H */

View File

@ -42,6 +42,10 @@ ifeq ($(CONFIG_USBDEV),y)
CSRCS += mpfs_usb.c
endif
ifeq ($(CONFIG_MPFS_IHC),y)
CSRCS += mpfs_ihc.c
endif
DEPPATH += --dep-path src
VPATH += :src
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src)

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@ -0,0 +1,62 @@
/****************************************************************************
* boards/risc-v/mpfs/common/src/mpfs_ihc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <errno.h>
#include "mpfs_ihc.h"
#include "board_config.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: mpfs_board_ihc_init
*
* Description:
* Starts the Inter-Hart Communication (IHC) driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate any failure.
*
****************************************************************************/
int mpfs_board_ihc_init(void)
{
int ret;
ret = mpfs_ihc_init();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to initialize the IHC driver: %d\n",
ret);
}
return ret;
}

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@ -0,0 +1,101 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_NSH_DISABLE_DATE is not set
# CONFIG_NSH_DISABLE_LOSMART is not set
# CONFIG_NSH_DISABLE_MB is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="icicle"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ICICLE_MPFS=y
CONFIG_ARCH_CHIP="mpfs"
CONFIG_ARCH_CHIP_MPFS250T_FCVG484=y
CONFIG_ARCH_CHIP_MPFS=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_MKRD=y
CONFIG_BOARD_LOOPSPERMSEC=54000
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_WARN=y
CONFIG_DEV_ZERO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_FS_ROMFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=3072
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_NBUFFERS=24
CONFIG_IOB_NCHAINS=24
CONFIG_LIBC_HOSTNAME="icicle"
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_MEMSET_64BIT=y
CONFIG_MEMSET_OPTSPEED=y
CONFIG_MM_CIRCBUF=y
CONFIG_MM_IOB=y
CONFIG_MPFS_IHC=y
CONFIG_MPFS_UART2=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_BASENAME=y
CONFIG_NSH_DISABLE_DF=y
CONFIG_NSH_DISABLE_DIRNAME=y
CONFIG_NSH_DISABLE_EXIT=y
CONFIG_NSH_DISABLE_EXPORT=y
CONFIG_NSH_DISABLE_FREE=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_HEXDUMP=y
CONFIG_NSH_DISABLE_MKFATFS=y
CONFIG_NSH_DISABLE_MKRD=y
CONFIG_NSH_DISABLE_MOUNT=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_PWD=y
CONFIG_NSH_DISABLE_RM=y
CONFIG_NSH_DISABLE_RMDIR=y
CONFIG_NSH_DISABLE_SET=y
CONFIG_NSH_DISABLE_SLEEP=y
CONFIG_NSH_DISABLE_SOURCE=y
CONFIG_NSH_DISABLE_TEST=y
CONFIG_NSH_DISABLE_TIME=y
CONFIG_NSH_DISABLE_TRUNCATE=y
CONFIG_NSH_DISABLE_UMOUNT=y
CONFIG_NSH_DISABLE_UNAME=y
CONFIG_NSH_DISABLE_UNSET=y
CONFIG_NSH_DISABLE_USLEEP=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_DISABLE_XD=y
CONFIG_NSH_LINELEN=160
CONFIG_OPENAMP=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=1048576
CONFIG_RAM_START=0xa2200000
CONFIG_RAW_BINARY=y
CONFIG_RPTUN=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_MONTH=4
CONFIG_START_YEAR=2021
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_TIME64=y
CONFIG_TASK_NAME_SIZE=20
CONFIG_UART2_SERIAL_CONSOLE=y

View File

@ -37,7 +37,11 @@ else ifeq ($(CONFIG_BUILD_PROTECTED),y)
else ifeq ($(CONFIG_BUILD_KERNEL),y)
LDSCRIPT = ld-kernel.script
else
LDSCRIPT = ld.script
ifeq ($(CONFIG_MPFS_IHC),y)
LDSCRIPT = ld-ihc.script
else
LDSCRIPT = ld.script
endif
endif
ifneq ($(LDMEMORY),)

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@ -0,0 +1,124 @@
/****************************************************************************
* boards/risc-v/mpfs/icicle/scripts/ld.script
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
MEMORY
{
progmem (rx) : ORIGIN = 0xa2000000, LENGTH = 1M /* w/ cache */
filler (rx) : ORIGIN = 0xa2100000, LENGTH = 524k
sram (rwx) : ORIGIN = 0xa2200000, LENGTH = 1M /* w/ cache */
shared (rwx) : ORIGIN = 0xa4000000, LENGTH = 256k
}
OUTPUT_ARCH("riscv")
__ksram_start = ORIGIN(sram);
__ksram_size = LENGTH(sram);
__ksram_end = ORIGIN(sram) + LENGTH(sram);
ENTRY(_stext)
EXTERN(_vectors)
SECTIONS
{
.filler_area : ALIGN(0x1000)
{
__filler_area_load = LOADADDR(.filler_area);
__filler_area_start = .;
__filler_area_vma_start = .;
*(.filler_area)
KEEP(*(.filler_area))
. = ALIGN(0x1000);
__filler_area_end = .;
__filler_area_vma_end = .;
} > filler
.amp_ihc : ALIGN(0x1000)
{
__amp_ihc_load = LOADADDR(.amp_ihc);
__amp_ihc_start = .;
__amp_ihc_vma_start = .;
*(.amp_ihc)
. = ALIGN(0x1000);
__amp_ihc_end = .;
__amp_ihc_vma_end = .;
} > shared
.text : {
_stext = ABSOLUTE(.);
mpfs_head.o
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.* .srodata .srodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > progmem
.init_section : ALIGN(4) {
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > progmem
_eronly = ABSOLUTE(.);
.data : ALIGN(4) {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.sdata .sdata.* .sdata2.*)
*(.gnu.linkonce.d.*)
*(.gnu.linkonce.s.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > progmem
PROVIDE(__global_pointer$ = _sdata + ((_edata - _sdata) / 2));
.bss : ALIGN(4) {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.sbss .sbss.*)
*(.gnu.linkonce.b.*)
*(.gnu.linkonce.sb.*)
*(COMMON)
. = ALIGN(32);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -47,6 +47,7 @@
int mpfs_bringup(void);
int mpfs_board_spi_init(void);
int mpfs_board_i2c_init(void);
int mpfs_board_ihc_init(void);
int mpfs_board_emmcsd_init(void);
int mpfs_board_usb_init(void);
int mpfs_pwm_setup(void);

View File

@ -145,5 +145,14 @@ int mpfs_bringup(void)
}
#endif
#ifdef CONFIG_MPFS_IHC
ret = mpfs_board_ihc_init();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to init IHC driver: %d\n", ret);
}
#endif
return ret;
}