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arch: cxd56xx: Apply the latest cxd56_dma.c and cxd56_spi from SDK

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See the following commit in SDK:

  commit 62a2fb4fd3001aefad9ec3b2e2e7c47e5b0f21e1
  Author: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
  Date:   Fri Jan 24 13:32:04 2020 +0900

      Enable dummy transfer by SPI using DMA

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This commit is contained in:
Masayuki Ishikawa 2020-05-13 11:41:04 +09:00 committed by Alin Jerpelea
parent 21557ac259
commit 77f15c8b17
2 changed files with 34 additions and 86 deletions
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35
arch/arm/src/cxd56xx/cxd56_dmac.c
View File

@ -290,6 +290,7 @@ struct dma_channel_s
dmac_lli_t * list; /* Link list */ dmac_lli_t * list; /* Link list */
dma_callback_t callback; /* Callback invoked when the DMA completes */ dma_callback_t callback; /* Callback invoked when the DMA completes */
void *arg; /* Argument passed to callback function */ void *arg; /* Argument passed to callback function */
unsigned int dummy; /* Dummy buffer */
}; };
/**************************************************************************** /****************************************************************************
@ -902,10 +903,21 @@ void cxd56_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
uintptr_t dst; uintptr_t dst;
size_t rest; size_t rest;
int peri; int peri;
int di;
DEBUGASSERT(dmach != NULL && dmach->inuse && dmach->list != NULL); DEBUGASSERT(dmach != NULL && dmach->inuse && dmach->list != NULL);
dst = maddr; if (maddr)
{
dst = maddr;
di = 1;
}
else
{
dst = (uintptr_t)&dmach->dummy;
di = 0;
}
rest = nbytes; rest = nbytes;
list_num = (nbytes + CXD56_DMAC_MAX_SIZE - 1) / CXD56_DMAC_MAX_SIZE; list_num = (nbytes + CXD56_DMAC_MAX_SIZE - 1) / CXD56_DMAC_MAX_SIZE;
@ -914,7 +926,7 @@ void cxd56_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
dmach->list[i].src_addr = paddr; dmach->list[i].src_addr = paddr;
dmach->list[i].dest_addr = dst; dmach->list[i].dest_addr = dst;
dmach->list[i].nextlli = (uint32_t)&dmach->list[i + 1]; dmach->list[i].nextlli = (uint32_t)&dmach->list[i + 1];
dmach->list[i].control = DMAC_EX_CTRL_HELPER(0, 1, 0, /* interrupt / Dest inc / Src inc */ dmach->list[i].control = DMAC_EX_CTRL_HELPER(0, di, 0, /* interrupt / Dest inc / Src inc */
CXD56_DMAC_MASTER1, CXD56_DMAC_MASTER2, /* AHB dst master / AHB src master (fixed) */ CXD56_DMAC_MASTER1, CXD56_DMAC_MASTER2, /* AHB dst master / AHB src master (fixed) */
config.dest_width, config.src_width, /* Dest / Src transfer width */ config.dest_width, config.src_width, /* Dest / Src transfer width */
CXD56_DMAC_BSIZE4, CXD56_DMAC_BSIZE4, /* Dest / Src burst size (fixed) */ CXD56_DMAC_BSIZE4, CXD56_DMAC_BSIZE4, /* Dest / Src burst size (fixed) */
@ -927,7 +939,7 @@ void cxd56_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
dmach->list[i].src_addr = paddr; dmach->list[i].src_addr = paddr;
dmach->list[i].dest_addr = dst; dmach->list[i].dest_addr = dst;
dmach->list[i].nextlli = 0; dmach->list[i].nextlli = 0;
dmach->list[i].control = DMAC_EX_CTRL_HELPER(1, 1, 0, /* interrupt / Dest inc / Src inc */ dmach->list[i].control = DMAC_EX_CTRL_HELPER(1, di, 0, /* interrupt / Dest inc / Src inc */
CXD56_DMAC_MASTER1, CXD56_DMAC_MASTER2, /* AHB dst master / AHB src master (fixed) */ CXD56_DMAC_MASTER1, CXD56_DMAC_MASTER2, /* AHB dst master / AHB src master (fixed) */
config.dest_width, config.src_width, /* Dest / Src transfer width */ config.dest_width, config.src_width, /* Dest / Src transfer width */
CXD56_DMAC_BSIZE4, CXD56_DMAC_BSIZE4, /* Dest / Src burst size (fixed) */ CXD56_DMAC_BSIZE4, CXD56_DMAC_BSIZE4, /* Dest / Src burst size (fixed) */
@ -961,10 +973,21 @@ void cxd56_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
uintptr_t src; uintptr_t src;
size_t rest; size_t rest;
int peri; int peri;
int si;
DEBUGASSERT(dmach != NULL && dmach->inuse && dmach->list != NULL); DEBUGASSERT(dmach != NULL && dmach->inuse && dmach->list != NULL);
src = maddr; if (maddr)
{
src = maddr;
si = 1;
}
else
{
src = (uintptr_t)&dmach->dummy;
si = 0;
}
rest = nbytes; rest = nbytes;
list_num = (nbytes + CXD56_DMAC_MAX_SIZE - 1) / CXD56_DMAC_MAX_SIZE; list_num = (nbytes + CXD56_DMAC_MAX_SIZE - 1) / CXD56_DMAC_MAX_SIZE;
@ -973,7 +996,7 @@ void cxd56_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
dmach->list[i].src_addr = src; dmach->list[i].src_addr = src;
dmach->list[i].dest_addr = paddr; dmach->list[i].dest_addr = paddr;
dmach->list[i].nextlli = (uint32_t)&dmach->list[i + 1]; dmach->list[i].nextlli = (uint32_t)&dmach->list[i + 1];
dmach->list[i].control = DMAC_EX_CTRL_HELPER(0, 0, 1, /* interrupt / Dest inc / Src inc */ dmach->list[i].control = DMAC_EX_CTRL_HELPER(0, 0, si, /* interrupt / Dest inc / Src inc */
CXD56_DMAC_MASTER2, CXD56_DMAC_MASTER1, /* AHB dst master / AHB src master (fixed) */ CXD56_DMAC_MASTER2, CXD56_DMAC_MASTER1, /* AHB dst master / AHB src master (fixed) */
config.dest_width, config.src_width, /* Dest / Src transfer width (fixed) */ config.dest_width, config.src_width, /* Dest / Src transfer width (fixed) */
CXD56_DMAC_BSIZE1, CXD56_DMAC_BSIZE1, /* Dest / Src burst size (fixed) */ CXD56_DMAC_BSIZE1, CXD56_DMAC_BSIZE1, /* Dest / Src burst size (fixed) */
@ -986,7 +1009,7 @@ void cxd56_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
dmach->list[i].src_addr = src; dmach->list[i].src_addr = src;
dmach->list[i].dest_addr = paddr; dmach->list[i].dest_addr = paddr;
dmach->list[i].nextlli = 0; dmach->list[i].nextlli = 0;
dmach->list[i].control = DMAC_EX_CTRL_HELPER(1, 0, 1, /* interrupt / Dest inc / Src inc */ dmach->list[i].control = DMAC_EX_CTRL_HELPER(1, 0, si, /* interrupt / Dest inc / Src inc */
CXD56_DMAC_MASTER2, CXD56_DMAC_MASTER1, /* AHB dst master / AHB src master (fixed) */ CXD56_DMAC_MASTER2, CXD56_DMAC_MASTER1, /* AHB dst master / AHB src master (fixed) */
config.dest_width, config.src_width, /* Dest / Src transfer width (fixed) */ config.dest_width, config.src_width, /* Dest / Src transfer width (fixed) */
CXD56_DMAC_BSIZE4, CXD56_DMAC_BSIZE4, /* Dest / Src burst size (fixed) */ CXD56_DMAC_BSIZE4, CXD56_DMAC_BSIZE4, /* Dest / Src burst size (fixed) */

85
arch/arm/src/cxd56xx/cxd56_spi.c
View File

@ -126,8 +126,6 @@ static inline void spi_putreg(FAR struct cxd56_spidev_s *priv,
static void __unused spi_dmaexchange(FAR struct spi_dev_s *dev, static void __unused spi_dmaexchange(FAR struct spi_dev_s *dev,
FAR const void *txbuffer, FAR const void *txbuffer,
FAR void *rxbuffer, size_t nwords); FAR void *rxbuffer, size_t nwords);
static void spi_dmatxwait(FAR struct cxd56_spidev_s *priv);
static void spi_dmarxwait(FAR struct cxd56_spidev_s *priv);
static void spi_dmatrxwait(FAR struct cxd56_spidev_s *priv); static void spi_dmatrxwait(FAR struct cxd56_spidev_s *priv);
static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t status, void *data); static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t status, void *data);
static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t status, void *data); static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t status, void *data);
@ -1438,42 +1436,17 @@ static void spi_dmaexchange(FAR struct spi_dev_s *dev,
/* Setup DMAs */ /* Setup DMAs */
if (txbuffer) spi_dmatxsetup(priv, txbuffer, nwords);
{ spi_dmarxsetup(priv, rxbuffer, nwords);
spi_dmatxsetup(priv, txbuffer, nwords);
}
if (rxbuffer)
{
spi_dmarxsetup(priv, rxbuffer, nwords);
}
/* Start the DMAs */ /* Start the DMAs */
if (rxbuffer) cxd56_dmastart(priv->rxdmach, spi_dmarxcallback, priv);
{ cxd56_dmastart(priv->txdmach, spi_dmatxcallback, priv);
cxd56_dmastart(priv->rxdmach, spi_dmarxcallback, priv);
}
if (txbuffer)
{
cxd56_dmastart(priv->txdmach, spi_dmatxcallback, priv);
}
/* Then wait for each to complete */ /* Then wait for each to complete */
if (txbuffer && rxbuffer) spi_dmatrxwait(priv);
{
spi_dmatrxwait(priv);
}
else if (txbuffer)
{
spi_dmatxwait(priv);
}
else if (rxbuffer)
{
spi_dmarxwait(priv);
}
if (priv->port == 3) if (priv->port == 3)
{ {
@ -1608,54 +1581,6 @@ static void spi_dmarxsetup(FAR struct cxd56_spidev_s *priv,
nwords, priv->rxconfig); nwords, priv->rxconfig);
} }
/****************************************************************************
* Name: spi_dmatxwait
*
* Description:
* Wait for TX DMA to complete.
*
****************************************************************************/
static void spi_dmatxwait(FAR struct cxd56_spidev_s *priv)
{
uint32_t val;
if (nxsem_wait(&priv->dmasem) != OK)
{
spierr("dma error\n");
}
cxd56_dmastop(priv->txdmach);
val = spi_getreg(priv, CXD56_SPI_DMACR_OFFSET);
val &= ~SPI_DMACR_TXDMAE;
spi_putreg(priv, CXD56_SPI_DMACR_OFFSET, val);
}
/****************************************************************************
* Name: spi_dmarxwait
*
* Description:
* Wait for RX DMA to complete.
*
****************************************************************************/
static void spi_dmarxwait(FAR struct cxd56_spidev_s *priv)
{
uint32_t val;
if (nxsem_wait(&priv->dmasem) != OK)
{
spierr("dma error\n");
}
cxd56_dmastop(priv->rxdmach);
val = spi_getreg(priv, CXD56_SPI_DMACR_OFFSET);
val &= ~SPI_DMACR_RXDMAE;
spi_putreg(priv, CXD56_SPI_DMACR_OFFSET, val);
}
/**************************************************************************** /****************************************************************************
* Name: spi_dmatrxwait * Name: spi_dmatrxwait
* *