XMC4xx: Add logic to get the CPU frequency.
This commit is contained in:
Gregory Nutt
parent
772b3cf21b
commit
77f244ed7b
@ -505,10 +505,21 @@
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#define SCU_CLKSET_
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/* Clock clear Control Register */
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#define SCU_CLKCLR_
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/* System Clock Control */
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#define SCU_SYSCLKCR_
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#define SCU_SYSCLKCR_SYSDIV_SHIFT (0) /* Bits 0-7: System Clock Division Value */
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#define SCU_SYSCLKCR_SYSDIV_MASK (0xff << SCU_CLK_SYSCLKCR_SYSDIV_SHIFT)
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# define SCU_SYSCLKCR_SYSDIV(n) ((uint32_t)((n)-1) << SCU_CLK_SYSCLKCR_SYSDIV_SHIFT)
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#define SCU_SYSCLKCR_SYSSEL (1 << 16) /* Bit 16: System Clock Selection Value */
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# define SCU_SYSCLKCR_SYSSEL_OFI (0) /* 0=OFI clock */
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# define SCU_SYSCLKCR_SYSSEL_PLL (1 << 16) /* 1=PLL clock */
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/* CPU Clock Control */
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#define SCU_CPUCLKCR_
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#define SCU_CPUCLKCR_CPUDIV (1 << 0) /* Bit 0: CPU Clock Divider Enable */
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/* Peripheral Bus Clock Control */
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#define SCU_PBCLKCR_
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/* USB Clock Control */
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@ -562,13 +573,44 @@
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/* PLL Control SCU Registers */
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/* System PLL Status Register */
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#define SCU_PLLSTAT_
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#define SCU_PLLSTAT_VCOBYST (1 << 0) /* Bit 0: VCO Bypass Status */
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#define SCU_PLLSTAT_PWDSTAT (1 << 1) /* Bit 1: PLL Power-saving Mode Status */
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#define SCU_PLLSTAT_VCOLOCK (1 << 2) /* Bit 2: PLL LOCK Status */
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#define SCU_PLLSTAT_K1RDY (1 << 4) /* Bit 4: K1 Divider Ready Status */
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#define SCU_PLLSTAT_K2RDY (1 << 5) /* Bit 5: K2 Divider Ready Status */
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#define SCU_PLLSTAT_BY (1 << 6) /* Bit 6: Bypass Mode Status */
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#define SCU_PLLSTAT_PLLLV (1 << 7) /* Bit 7: Oscillator for PLL Valid Low Status */
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#define SCU_PLLSTAT_PLLHV (1 << 8) /* Bit 8: Oscillator for PLL Valid High Status */
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#define SCU_PLLSTAT_PLLSP (1 << 9) /* Bit 9: Oscillator for PLL Valid Spike Status */
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/* System PLL Configuration 0 Register */
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#define SCU_PLLCON0_
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/* System PLL Configuration 1 Register */
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#define SCU_PLLCON1_
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#define SCU_PLLCON1_K1DIV_SHIFT (0) /* Bits 0-6: K1-Divider Value */
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#define SCU_PLLCON1_K1DIV_MASK (0x7f << SCU_PLLCON1_K1DIV_SHIFT)
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# define SCU_PLLCON1_K1DIV(n) ((uint32_t)((n)-1) << SCU_PLLCON1_K1DIV_SHIFT)
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#define SCU_PLLCON1_NDIV_SHIFT (8) /* Bits 8-14: N-Divider Value */
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#define SCU_PLLCON1_NDIV_MASK (0x7f << SCU_PLLCON1_NDIV_SHIFT)
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# define SCU_PLLCON1_NDIV(n) ((uint32_t)((n)-1) << SCU_PLLCON1_NDIV_SHIFT)
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#define SCU_PLLCON1_K2DIV_SHIFT (16) /* Bit 16-22: K2-Divider Value */
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#define SCU_PLLCON1_K2DIV_MASK (0x7f << SCU_PLLCON1_K2DIV_SHIFT)
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# define SCU_PLLCON1_K2DIV(n) ((uint32_t)((n)-1) << SCU_PLLCON1_K2DIV_SHIFT)
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#define SCU_PLLCON1_PDIV_SHIFT (24) /* Bits 24-27: P-Divider Value */
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#define SCU_PLLCON1_PDIV_MASK (0x7f << SCU_PLLCON1_PDIV_SHIFT)
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# define SCU_PLLCON1_PDIV(n) ((uint32_t)((n)-1) << SCU_PLLCON1_PDIV_SHIFT)
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/* System PLL Configuration 2 Register */
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#define SCU_PLLCON2_
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#define SCU_PLLCON2_PINSEL (1 << 0) /* Bit 0: P-Divider Input Selection */
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# define SCU_PLLCON2_PINSEL_PLL (0) /* 0=PLL external oscillator selected */
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# define SCU_PLLCON2_PINSEL_OFI (1 << 0) /* 1=Backup clock source selected */
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#define SCU_PLLCON2_K1INSEL (1 << 8) /* Bit 8: K1-Divider Input */
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# define SCU_PLLCON2_K1INSEL_PLL (0) /* 0=PLL external oscillator selected */
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# define SCU_PLLCON2_K1INSEL_OFI (1 << 8) /* 1=Backup clock source selected */
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/* USB PLL Status Register */
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#define SCU_USBPLLSTAT_
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/* USB PLL Control Register */
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@ -1,9 +1,11 @@
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/****************************************************************************
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* arch/arm/src/xmc4/xmc4_clock_config.c
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* arch/arm/src/xmc4/xmc4_clockconfig.c
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Reference: XMC4500 Reference Manual V1.5 2014-07 Microcontrollers.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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@ -31,6 +33,20 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* May include some logic from sample code provided by Infineon:
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*
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* Copyright (C) 2011-2015 Infineon Technologies AG. All rights reserved.
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*
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* Infineon Technologies AG (Infineon) is supplying this software for use with
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* Infineon's microcontrollers. This file can be freely distributed within
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* development tools that are supporting such microcontrollers.
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*
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* THIS SOFTWARE IS PROVIDED AS IS. NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
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* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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****************************************************************************/
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/****************************************************************************
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@ -47,10 +63,6 @@
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -60,7 +72,7 @@
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****************************************************************************/
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/****************************************************************************
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* Name: xmc4_clock_config
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* Name: xmc4_clock_configure
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*
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* Description:
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* Called to initialize the XMC4xxx chip. This does whatever setup is
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@ -69,6 +81,90 @@
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*
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****************************************************************************/
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void xmc4_clock_config(void)
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void xmc4_clock_configure(void)
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{
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}
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/****************************************************************************
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* Name: xmc4_get_coreclock
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*
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* Description:
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* Return the current core clock frequency (fCPU).
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*
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****************************************************************************/
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uint32_t xmc4_get_coreclock(void)
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{
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uint32_t pdiv;
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uint32_t ndiv;
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uint32_t kdiv;
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uint32_t sysdiv;
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uint32_t regval;
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uint32_t temp;
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if ((getreg32(XMC4_SCU_SYSCLKCR) & SCU_SYSCLKCR_SYSSEL) != 0)
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{
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/* fPLL is clock source for fSYS */
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if ((getreg32(XMC4_SCU_PLLCON2) & SCU_PLLCON2_PINSEL) != 0)
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{
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/* PLL input clock is the backup clock (fOFI) */
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temp = OFI_FREQUENCY;
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}
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else
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{
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/* PLL input clock is the high performance oscillator (fOSCHP);
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* Only board specific logic knows this value.
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*/
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temp = BOARD_XTAL_FREQUENCY;
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}
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/* Check if PLL is locked */
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regval = getreg32(XMC4_SCU_PLLSTAT);
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if ((regval & SCU_PLLSTAT_VCOLOCK) != 0)
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{
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/* PLL normal mode */
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regval = getreg32(XMC4_SCU_PLLCON1);
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pdiv = ((regval & SCU_PLLCON1_PDIV_MASK) >> SCU_PLLCON1_PDIV_SHIFT) + 1;
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ndiv = ((regval & SCU_PLLCON1_NDIV_MASK) >> SCU_PLLCON1_NDIV_SHIFT) + 1;
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kdiv = ((regval & SCU_PLLCON1_K2DIV_MASK) >> SCU_PLLCON1_K2DIV_SHIFT) + 1;
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temp = (temp / (pdiv * kdiv)) * ndiv;
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}
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else
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{
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/* PLL prescalar mode */
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regval = getreg32(XMC4_SCU_PLLCON1);
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kdiv = ((regval & SCU_PLLCON1_K1DIV_MASK) >> SCU_PLLCON1_K1DIV_SHIFT) + 1;
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temp = (temp / kdiv);
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}
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}
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else
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{
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/* fOFI is clock source for fSYS */
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temp = OFI_FREQUENCY;
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}
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/* Divide by SYSDIV to get fSYS */
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regval = getreg32(XMC4_SCU_SYSCLKCR);
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sysdiv = ((regval & SCU_SYSCLKCR_SYSDIV_MASK) >> SCU_SYSCLKCR_SYSDIV_SHIFT) + 1;
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temp = temp / sysdiv;
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/* Check if the fSYS clock is divided by two to produce fCPU clock. */
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regval = getreg32(CPUCLKCR);
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if ((regval & SCU_CPUCLKCR_CPUDIV) != 0)
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{
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temp = temp >> 1;
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}
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return temp;
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}
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79
arch/arm/src/xmc4/xmc4_clockconfig.h
Normal file
79
arch/arm/src/xmc4/xmc4_clockconfig.h
Normal file
@ -0,0 +1,79 @@
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/************************************************************************************
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* arch/arm/src/xmc4/xmc4_clockconfig.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_XMC4_XMC4_CLOCKCONFIG_H
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#define __ARCH_ARM_SRC_XMC4_XMC4_CLOCKCONFIG_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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/************************************************************************************
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* Preprocessor Definitions
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************************************************************************************/
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#define OFI_FREQUENCY 24000000 /* Frequency of internal Backup Clock Source */
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#define OSI_FREQUENCY 32768 /* Frequency of internal Slow Clock Source */
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* Name: xmc4_clock_configure
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*
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* Description:
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* Called to initialize the XMC4xxx chip. This does whatever setup is
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* needed to put the MCU in a usable state. This includes the
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* initialization of clocking using the settings in board.h.
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*
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****************************************************************************/
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void xmc4_clock_configure(void);
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/****************************************************************************
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* Name: xmc4_get_coreclock
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*
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* Description:
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* Return the current core clock frequency.
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*
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****************************************************************************/
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uint32_t xmc4_get_coreclock(void);
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#endif /* __ARCH_ARM_SRC_XMC4_XMC4_CLOCKCONFIG_H */
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@ -279,7 +279,7 @@ void __start(void)
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/* Disable the watchdog timer */
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kinetis_wddisable();
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xmc4_wddisable();
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/* Clear .bss. We'll do this inline (vs. calling memset) just to be
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* certain that there are no issues with the state of global variables.
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@ -318,7 +318,7 @@ void __start(void)
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* RAM functions having been copied to RAM).
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*/
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xmc4_clock_config();
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xmc4_clock_configure();
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/* Configure the uart and perform early serial initialization so that we
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* can get debug output as soon as possible (This depends on clock
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61
arch/arm/src/xmc4/xmc4_start.h
Normal file
61
arch/arm/src/xmc4/xmc4_start.h
Normal file
@ -0,0 +1,61 @@
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/************************************************************************************
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* arch/arm/src/xmc4/xmc4_start.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
|
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* distribution.
|
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* 3. Neither the name NuttX nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
|
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*
|
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
|
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_XMC4_XMC4_CLOCKCONFIG_H
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#define __ARCH_ARM_SRC_XMC4_XMC4_CLOCKCONFIG_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: xmc4_board_initialize
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*
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* Description:
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* All XMC4xxx architectures must provide the following entry point. This entry
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* point is called early in the initialization -- after all memory has been
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* configured and mapped but before any devices have been initialized.
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*
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************************************************************************************/
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void xmc4_board_initialize(void);
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#endif /* __ARCH_ARM_SRC_XMC4_XMC4_CLOCKCONFIG_H */
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150
configs/xmc4500-relax/include/board.h
Normal file
150
configs/xmc4500-relax/include/board.h
Normal file
@ -0,0 +1,150 @@
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/************************************************************************************
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* configs/xmc4500-relax/include/board.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
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* Author: Gregory Nutt <gnutt@nuttx.org>
|
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*
|
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
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* distribution.
|
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* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __CONFIG_XMC4500_RELAX_INCLUDE_BOARD_H
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#define __CONFIG_XMC4500_RELAX_INCLUDE_BOARD_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Clocking *************************************************************************/
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/* Default clock initialization
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* fPLL = 288MHz => fSYS = 288MHz => fCPU = 144MHz
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* => fPB = 144MHz
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* => fCCU = 144MHz
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* => fETH = 72MHz
|
||||
* => fUSB = 48MHz
|
||||
* => fEBU = 72MHz
|
||||
*
|
||||
* fUSBPLL Disabled, only enabled if SCU_CLK_USBCLKCR_USBSEL_USBPLL is selected
|
||||
*
|
||||
* fOFI = 24MHz => fWDT = 24MHz
|
||||
*/
|
||||
|
||||
/* On-board crystals
|
||||
*
|
||||
* NOTE: Only the XMC4500 Relax Kit-V1 provides the 32.768KHz RTC crystal. It
|
||||
* is not available on XMC4500 Relax Lite Kit-V1.
|
||||
*/
|
||||
|
||||
#define BOARD_XTAL_FREQUENCY 12000000 /* 12MHz XTAL */
|
||||
#undef BOARD_RTC_XTAL_FRQUENCY /* 32.768KHz RTC XTAL not available */
|
||||
|
||||
/* Select the external crystal as the PLL clock source */
|
||||
|
||||
#define BOARD_PLL_CLOCKSRC_XTAL 1 /* PLL Clock source == extnernal crystal */
|
||||
#undef BOARD_PLL_CLOCKSRC_OFI /* PLL Clock source != internal fast oscillator */
|
||||
|
||||
/* PLL Configuration:
|
||||
*
|
||||
* fPLL = (fPLLSRC / (pdiv * k2div) * ndiv
|
||||
*
|
||||
* fPLL = (12000000 / (2 * 1)) * 48
|
||||
* = 288MHz
|
||||
*/
|
||||
|
||||
#define BOARD_PLL_PDIV 2
|
||||
#define BOARD_PLL_NDIV 48
|
||||
#define BOARD_PLL_K2DIV 1
|
||||
#define BOARD_PLL_FREQUENCY 288000000
|
||||
|
||||
/* System frequency is divided down from PLL output */
|
||||
|
||||
#define BOARD_SYSDIV 1 /* PLL Output divider to get fSYS */
|
||||
#define BOARD_SYS_FREQUENCY 288000000
|
||||
|
||||
/* CPU frequency may be divided down from system frequency */
|
||||
|
||||
#define BOARD_CPUDIV_ENABLE 1 /* Enable PLL dive by 2 for fCPU */
|
||||
#define BOARD_CPU_FREQUENCY 144000000
|
||||
|
||||
/* Standby clock source selection
|
||||
*
|
||||
* BOARD_STDBY_CLOCKSRC_OSI - Internal slow oscillator (32768Hz)
|
||||
* BOARD_STDBY_CLOCKSRC_OSCULP - External 32.768KHz crystal
|
||||
*/
|
||||
|
||||
#define BOARD_STDBY_CLOCKSRC_OSI 1
|
||||
#undef BOARD_STDBY_CLOCKSRC_OSCULP
|
||||
|
||||
/* USB PLL settings.
|
||||
*
|
||||
* fUSBPLL = 48MHz and fUSBPLLVCO = 384 MHz
|
||||
*
|
||||
* Note: Implicit divider of 2 and fUSBPLLVCO >= 260 MHz and
|
||||
* fUSBPLLVCO <= 520 MHz
|
||||
*/
|
||||
|
||||
#define BOARD_USB_PDIV 2
|
||||
#define BOARD_USB_NDIV 64
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __CONFIG_XMC4500_RELAX_INCLUDE_BOARD_H */
|
||||
Loading…
Reference in New Issue
Block a user