tiva: Fix nxstyle warnings
arch/arm/src/tiva/cc13xx/cc13xx_prcm.h:
* Fix nxstyle warnings. No functional changes.
This commit is contained in:
Nathan Hartman
Xiang Xiao
parent
c67da1d2b5
commit
78049d4081
@ -130,7 +130,9 @@
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#define PRCM_PERIPH_INDEX(a) (((a) >> 5) & 7)
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/* This macro extracts the peripheral instance number and generates bit mask */
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/* This macro extracts the peripheral instance number and generates bit
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* mask
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*/
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#define PRCM_PERIPH_MASKBIT(a) (1 << ((a) & 0x1f))
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@ -203,7 +205,7 @@ static inline void prcm_audioclock_disable(void)
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}
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#endif
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_mcuuldo_configure
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*
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* Description:
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@ -224,7 +226,7 @@ static inline void prcm_audioclock_disable(void)
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* - 0 : Disable uLDO request
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* - 1 : Enable uLDO request
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*
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******************************************************************************/
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****************************************************************************/
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static inline void prcm_mcuuldo_configure(uint32_t enable)
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{
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@ -233,7 +235,7 @@ static inline void prcm_mcuuldo_configure(uint32_t enable)
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putreg32(enable, TIVA_PRCM_VDCTL);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_gptclock_set
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*
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* Description:
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@ -241,8 +243,8 @@ static inline void prcm_mcuuldo_configure(uint32_t enable)
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*
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* Use this function to set up the clock division factor on the GP-Timer.
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*
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* The division rate will be constant and ungated for Run / Sleep / DeepSleep
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* mode when it is slower than PRCM_GPTCLKDIV_RATIO setting.
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* The division rate will be constant and ungated for Run / Sleep /
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* DeepSleep mode when it is slower than PRCM_GPTCLKDIV_RATIO setting.
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* When set faster than PRCM_GPTCLKDIV_RATIO setting PRCM_GPTCLKDIV_RATIO
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* will be used.
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*
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@ -254,40 +256,42 @@ static inline void prcm_mcuuldo_configure(uint32_t enable)
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* Input Parameters:
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* clkdiv - The division factor to set. The argument must be only one of
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* the following values:
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* PRCM_GPTCLKDIV_DIV1, PRCM_GPTCLKDIV_DIV2, PRCM_GPTCLKDIV_DIV4,
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* PRCM_GPTCLKDIV_DIV8, PRCM_GPTCLKDIV_DIV16, PRCM_GPTCLKDIV_DIV32.
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* PRCM_GPTCLKDIV_DIV64, PRCM_GPTCLKDIV_DIV128, PRCM_GPTCLKDIV_DIV256
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* PRCM_GPTCLKDIV_DIV1, PRCM_GPTCLKDIV_DIV2,
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* PRCM_GPTCLKDIV_DIV4, PRCM_GPTCLKDIV_DIV8,
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* PRCM_GPTCLKDIV_DIV16, PRCM_GPTCLKDIV_DIV32.
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* PRCM_GPTCLKDIV_DIV64, PRCM_GPTCLKDIV_DIV128,
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* PRCM_GPTCLKDIV_DIV256
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*
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******************************************************************************/
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****************************************************************************/
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static inline void prcm_gptclock_set(uint32_t clkdiv)
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{
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putreg32(clkdiv, TIVA_PRCM_GPTCLKDIV);
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}
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/******************************************************************************
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/****************************************************************************
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* Name:
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*
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* Description:
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* Get the clock division factor for the GP-Timer domain.
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*
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******************************************************************************/
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****************************************************************************/
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static inline uint32_t prcm_gptclock_get(void)
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{
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return getreg32(TIVA_PRCM_GPTCLKDIV);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_load_set
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*
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* Description:
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* Use this function to synchronize the load settings.
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*
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* Most of the clock settings in the PRCM module should be updated
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* synchronously. This is ensured by the implementation of a load registers
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* that, when written to, will let the previous written update values for all
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* the relevant registers propagate through to hardware.
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* synchronously. This is ensured by the implementation of a load
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* registers that, when written to, will let the previous written update
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* values for all the relevant registers propagate through to hardware.
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*
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* The functions that require a synchronization of the clock settings are:
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* - prcm_audioclock_manual()
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@ -302,7 +306,7 @@ static inline uint32_t prcm_gptclock_get(void)
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* - prcm_periph_deepsleepenable()
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* - prcm_periph_deepsleepdisable()
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*
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******************************************************************************/
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****************************************************************************/
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static inline void prcm_load_set(void)
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{
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@ -311,7 +315,7 @@ static inline void prcm_load_set(void)
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putreg32(PRCM_CLKLOADCTL_LOAD, TIVA_PRCM_CLKLOADCTL);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_load_get
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*
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* Description:
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@ -322,7 +326,7 @@ static inline void prcm_load_set(void)
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* - true : No registers have changed since the last load.
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* - false : Any register has changed.
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*
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******************************************************************************/
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****************************************************************************/
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static inline bool prcm_load_get(void)
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{
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@ -331,16 +335,16 @@ static inline bool prcm_load_get(void)
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return ((getreg32(TIVA_PRCM_CLKLOADCTL) & PRCM_CLKLOADCTL_LOADDONE) != 0);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_domain_enable
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*
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* Description:
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* Enable clock domains in the MCU voltage domain.
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*
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* NOTE: A call to this function will only setup the shadow registers in the
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* MCU domain for the PRCM module. For the changes to propagate to the system
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* controller in the AON domain a call to this function should always be
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* followed by a call to prcm_load_set().
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* NOTE: A call to this function will only setup the shadow registers in
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* the MCU domain for the PRCM module. For the changes to propagate to the
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* system controller in the AON domain a call to this function should
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* always be followed by a call to prcm_load_set().
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*
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* NOTE: Clocks will only be running if the domain is powered.
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*
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@ -350,7 +354,7 @@ static inline bool prcm_load_get(void)
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* - PRCM_DOMAIN_RFCORE
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* - PRCM_DOMAIN_VIMS
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*
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******************************************************************************/
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****************************************************************************/
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static inline void prcm_domain_enable(uint32_t domains)
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{
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@ -370,16 +374,16 @@ static inline void prcm_domain_enable(uint32_t domains)
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}
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_domain_disable
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*
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* Description:
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* Disable clock domains in the MCU voltage domain.
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*
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* NOTE: A call to this function will only setup the shadow registers in the
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* MCU domain for the PRCM module. For the changes to propagate to the system
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* controller in the AON domain a call to this function should always be
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* followed by a call to prcm_load_set().
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* NOTE: A call to this function will only setup the shadow registers in
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* the MCU domain for the PRCM module. For the changes to propagate to the
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* system controller in the AON domain a call to this function should
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* always be followed by a call to prcm_load_set().
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*
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* NOTE: Clocks will only be running if the domain is powered.
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*
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@ -388,7 +392,7 @@ static inline void prcm_domain_enable(uint32_t domains)
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* - PRCM_DOMAIN_RFCORE
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* - PRCM_DOMAIN_VIMS
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*
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******************************************************************************/
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****************************************************************************/
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static inline void prcm_domain_disable(uint32_t domains)
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{
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@ -408,17 +412,17 @@ static inline void prcm_domain_disable(uint32_t domains)
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}
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_rfpowerdown_whenidle
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*
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* Description:
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* Configure RF core to power down when idle.
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*
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* Use this function to configure the RF core to power down when Idle. This
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* is handled automatically in hardware if the RF Core reports that it is
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* idle.
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* Use this function to configure the RF core to power down when Idle.
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* This is handled automatically in hardware if the RF Core reports that
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* it is idle.
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*
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******************************************************************************/
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****************************************************************************/
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static inline void prcm_rfpowerdown_whenidle(void)
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{
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@ -427,21 +431,21 @@ static inline void prcm_rfpowerdown_whenidle(void)
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modifyreg32(TIVA_PRCM_PDCTL0RFC, 0, PRCM_PDCTL0RFC_ON);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_rfready
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*
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* Description:
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* Return the access status of the RF Core.
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*
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* Use this function to check if the RF Core is on and ready to be accessed.
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* Accessing register or memories that are not powered and clocked will
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* cause a bus fault.
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* Use this function to check if the RF Core is on and ready to be
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* accessed. Accessing register or memories that are not powered and
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* clocked will cause a bus fault.
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*
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* Returns access status of the RF Core.
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* - true : RF Core can be accessed.
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* - false : RF Core domain is not ready for access.
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*
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******************************************************************************/
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****************************************************************************/
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static inline bool prcm_rfready(void)
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{
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@ -450,7 +454,7 @@ static inline bool prcm_rfready(void)
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return ((getreg32(TIVA_PRCM_PDSTAT1RFC) & PRCM_PDSTAT1RFC_ON) != 0);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_cacheretention_enable
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*
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* Description:
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@ -458,7 +462,7 @@ static inline bool prcm_rfready(void)
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*
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* Enables CACHE RAM retention on both VIMS_TRAM and VIMS_CRAM
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*
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******************************************************************************/
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****************************************************************************/
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static inline void prcm_cacheretention_enable(void)
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{
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@ -466,7 +470,7 @@ static inline void prcm_cacheretention_enable(void)
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PRCM_RAMRETEN_VIMS_TRAM | PRCM_RAMRETEN_VIMS_CRAM, 0);
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}
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_cacheretention_disable
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*
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* Description:
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@ -474,7 +478,7 @@ static inline void prcm_cacheretention_enable(void)
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*
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* Disables CACHE RAM retention on both VIMS_TRAM and VIMS_CRAM
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*
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*****************************************************************************/
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****************************************************************************/
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static inline void prcm_cacheretention_disable(void)
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{
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@ -485,18 +489,19 @@ static inline void prcm_cacheretention_disable(void)
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* Public Function Prototypes
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****************************************************************************/
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_infclock_configure
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*
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* Description:
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* Configure the infrastructure clock.
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*
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* Each System CPU power mode has its own infrastructure clock division
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* factor. This function can be used for setting up the division factor for
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* the infrastructure clock in the available power modes for the System CPU.
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* The infrastructure clock is used for all internal logic in the PRCM, and
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* is always running as long as power is on in the MCU voltage domain. This
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* can be enabled and disabled from the AON Wake Up Controller.
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* factor. This function can be used for setting up the division factor
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* for the infrastructure clock in the available power modes for the
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* System CPU. The infrastructure clock is used for all internal logic in
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* the PRCM, and is always running as long as power is on in the MCU
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* voltage domain. This can be enabled and disabled from the AON Wake Up
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* Controller.
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*
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* NOTE: If source clock is 48 MHz, minimum clock divider is 2.
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*
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@ -513,18 +518,20 @@ static inline void prcm_cacheretention_disable(void)
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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void prcm_infclock_configure(enum prcm_clkdivider_e clkdiv,
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enum prcm_powermode_e powermode);
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_audioclock_manual
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*
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* Description:
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* Configure the audio clock generation with manual setting of clock divider.
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* Configure the audio clock generation with manual setting of clock
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* divider.
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*
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* NOTE: See hardware documentation before setting audio clock dividers manually.
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* NOTE: See hardware documentation before setting audio clock dividers
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* manually.
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*
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* Input Parameters:
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* clkconfig - The audio clock configuration. The parameter is a bitwise
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@ -542,25 +549,25 @@ void prcm_infclock_configure(enum prcm_clkdivider_e clkdiv,
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_TIVA_I2S
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void prcm_audioclock_manual(uint32_t clkconfig, uint32_t mstdiv,
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uint32_t bitdiv, uint32_t worddiv);
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#endif
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_audioclock_configure
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*
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* Description:
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* Configure the audio clock generation
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*
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* Use this function to set the sample rate when using internal audio clock
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* generation for the I2S module.
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* Use this function to set the sample rate when using internal audio
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* clock generation for the I2S module.
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*
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* NOTE: While other clocks are possible, the stability of the four sample
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* rates defined here are only guaranteed if the clock input to the I2S module
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* is 48MHz.
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* NOTE: While other clocks are possible, the stability of the four
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* sample rates defined here are only guaranteed if the clock input to the
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* I2S module is 48MHz.
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*
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* Input Parameters:
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* clkconfig - The audio clock configuration. The parameter is a bitwise
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@ -579,19 +586,21 @@ void prcm_audioclock_manual(uint32_t clkconfig, uint32_t mstdiv,
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_TIVA_I2S
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void prcm_audioclock_configure(uint32_t clkconfig,
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enum prcm_i2samplerate_e samplerate);
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#endif
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_powerdomain_on
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*
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* Description:
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* Turn power on in power domains in the MCU domain
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* Use this function to turn on power domains inside the MCU voltage domain.
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*
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* Use this function to turn on power domains inside the MCU voltage
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* domain.
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*
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* Power on and power off request has different implications for the
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* different power domains.
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@ -639,11 +648,11 @@ void prcm_audioclock_configure(uint32_t clkconfig,
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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void prcm_powerdomain_on(uint32_t domains);
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_powerdomain_off
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*
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* Description:
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@ -667,11 +676,11 @@ void prcm_powerdomain_on(uint32_t domains);
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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void prcm_powerdomain_off(uint32_t domains);
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_powerdomain_status
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*
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* Description:
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@ -683,8 +692,8 @@ void prcm_powerdomain_off(uint32_t domains);
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* parameter must be an OR'ed combination of one or several of:
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* 1) PRCM_DOMAIN_RFCORE : RF Core.
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* 2) PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0
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* 3) PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S,
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* DMA, UART1
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* 3) PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1,
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* I2S, DMA, UART1
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*
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* Returned Value
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* - True: The specified domains are all powered up.
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@ -693,90 +702,90 @@ void prcm_powerdomain_off(uint32_t domains);
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* Returned Value:
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* None
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*
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******************************************************************************/
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****************************************************************************/
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bool prcm_powerdomain_status(uint32_t domains);
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/******************************************************************************
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/****************************************************************************
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* Name: prcm_periph_runenable
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*
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* Description:
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* Enables a peripheral in Run mode
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*
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* Peripherals are enabled with this function. At power-up, some peripherals
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* are disabled; they must be enabled in order to operate or respond to
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* register reads/writes.
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* Peripherals are enabled with this function. At power-up, some
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* peripherals are disabled; they must be enabled in order to operate or
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* respond to register reads/writes.
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*
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* NOTE: The actual enabling of the peripheral may be delayed until some
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* time after this function returns. Care should be taken to ensure that the
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* peripheral is not accessed until it is enabled.
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* time after this function returns. Care should be taken to ensure that
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* the peripheral is not accessed until it is enabled.
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*
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* When enabling Timers always make sure that the division factor for the
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* PERBUSCPUCLK is set. This will guarantee that the timers run at a
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* continuous rate even if the SYSBUSCLK is gated.
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*
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* NOTE: A call to this function will only setup the shadow registers in the
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* MCU domain for the PRCM module. For the changes to propagate to the
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* system controller in the AON domain a call to this function should always
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* be followed by a call to prcm_load_set().
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* NOTE: A call to this function will only setup the shadow registers in
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* the MCU domain for the PRCM module. For the changes to propagate to the
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* system controller in the AON domain a call to this function should
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* always be followed by a call to prcm_load_set().
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*
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* Input Parameters:
|
||||
* peripheral - The peripheral to enable. This is an encoded value. See the
|
||||
* PRCRM_PERIPH_* definitions for available encodings.
|
||||
* peripheral - The peripheral to enable. This is an encoded value. See
|
||||
* the PRCRM_PERIPH_* definitions for available encodings.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
******************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void prcm_periph_runenable(uint32_t peripheral);
|
||||
|
||||
/******************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: prcm_periph_rundisable
|
||||
*
|
||||
* Description:
|
||||
* Disables a peripheral in Run mode
|
||||
*
|
||||
* Peripherals are disabled with this function. Once disabled, they will not
|
||||
* operate or respond to register reads/writes.
|
||||
* Peripherals are disabled with this function. Once disabled, they will
|
||||
* not operate or respond to register reads/writes.
|
||||
*
|
||||
* NOTE: A call to this function will only setup the shadow registers in the
|
||||
* MCU domain for the PRCM module. For the changes to propagate to the system
|
||||
* controller in the AON domain a call to this function should always be
|
||||
* followed by a call to prcm_load_set().
|
||||
* NOTE: A call to this function will only setup the shadow registers in
|
||||
* the MCU domain for the PRCM module. For the changes to propagate to the
|
||||
* system controller in the AON domain a call to this function should
|
||||
* always be followed by a call to prcm_load_set().
|
||||
*
|
||||
* NOTE: The actual disabling of the peripheral may be delayed until some
|
||||
* time after this function returns. Care should be taken by the user to
|
||||
* ensure that the peripheral is not accessed in this interval as this might
|
||||
* cause the system to hang.
|
||||
* ensure that the peripheral is not accessed in this interval as this
|
||||
* might cause the system to hang.
|
||||
*
|
||||
* Input Parameters:
|
||||
* peripheral - The peripheral to enable. This is an encoded value. See the
|
||||
* PRCRM_PERIPH_* definitions for available encodings.
|
||||
* peripheral - The peripheral to enable. This is an encoded value. See
|
||||
* the PRCRM_PERIPH_* definitions for available encodings.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
******************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void prcm_periph_rundisable(uint32_t peripheral);
|
||||
|
||||
/******************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: prcm_periph_sleepenable
|
||||
*
|
||||
* Description:
|
||||
* Enables a peripheral in sleep mode
|
||||
*
|
||||
* This function allows a peripheral to continue operating when the processor
|
||||
* goes into sleep mode. Since the clocking configuration of the device does
|
||||
* not change, any peripheral can safely continue operating while the
|
||||
* processor is in sleep mode, and can therefore wake the processor from sleep
|
||||
* mode.
|
||||
* This function allows a peripheral to continue operating when the
|
||||
* processor goes into sleep mode. Since the clocking configuration of the
|
||||
* device does not change, any peripheral can safely continue operating
|
||||
* while the processor is in sleep mode, and can therefore wake the
|
||||
* processor from sleep mode.
|
||||
*
|
||||
* NOTE: A call to this function will only setup the shadow registers in the
|
||||
* MCU domain for the PRCM module. For the changes to propagate to the system
|
||||
* controller in the AON domain a call to this function should always be
|
||||
* followed by a call to prcm_load_set().
|
||||
* NOTE: A call to this function will only setup the shadow registers in
|
||||
* the MCU domain for the PRCM module. For the changes to propagate to the
|
||||
* system controller in the AON domain a call to this function should
|
||||
* always be followed by a call to prcm_load_set().
|
||||
*
|
||||
* Input Parameters:
|
||||
* peripheral - The peripheral to enable in sleep mode. This is an encoded
|
||||
@ -786,27 +795,27 @@ void prcm_periph_rundisable(uint32_t peripheral);
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
******************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void prcm_periph_sleepenable(uint32_t peripheral);
|
||||
|
||||
/******************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: prcm_periph_sleepdisable
|
||||
*
|
||||
* Description:
|
||||
* Disables a peripheral in sleep mode
|
||||
*
|
||||
* This function causes a peripheral to stop operating when the processor goes
|
||||
* into sleep mode. Disabling peripherals while in sleep mode helps to lower
|
||||
* the current draw of the device. If enabled (via prcm_periph_runenable()),
|
||||
* the peripheral will automatically resume operation when the processor
|
||||
* leaves sleep mode, maintaining its entire state from before sleep mode was
|
||||
* entered.
|
||||
* This function causes a peripheral to stop operating when the processor
|
||||
* goes into sleep mode. Disabling peripherals while in sleep mode helps
|
||||
* to lower the current draw of the device. If enabled (via
|
||||
* prcm_periph_runenable()), the peripheral will automatically resume
|
||||
* operation when the processor leaves sleep mode, maintaining its entire
|
||||
* state from before sleep mode was entered.
|
||||
*
|
||||
* NOTE: A call to this function will only setup the shadow registers in the
|
||||
* MCU domain for the PRCM module. For the changes to propagate to the system
|
||||
* controller in the AON domain a call to this function should always be
|
||||
* followed by a call to prcm_load_set().
|
||||
* NOTE: A call to this function will only setup the shadow registers in
|
||||
* the MCU domain for the PRCM module. For the changes to propagate to the
|
||||
* system controller in the AON domain a call to this function should
|
||||
* always be followed by a call to prcm_load_set().
|
||||
*
|
||||
* Input Parameters:
|
||||
* peripheral - The peripheral to disable in sleep mode. This is an encoded
|
||||
@ -816,26 +825,27 @@ void prcm_periph_sleepenable(uint32_t peripheral);
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
******************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void prcm_periph_sleepdisable(uint32_t peripheral);
|
||||
|
||||
/******************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: prcm_periph_deepsleepenable
|
||||
*
|
||||
* Description:
|
||||
* Enables a peripheral in deep-sleep mode
|
||||
*
|
||||
* This function allows a peripheral to continue operating when the processor
|
||||
* goes into deep-sleep mode. Since the clocking configuration of the device
|
||||
* may change, not all peripherals can safely continue operating while the
|
||||
* processor is in sleep mode. This in turn depends on the chosen power mode.
|
||||
* It is the responsibility of the caller to make sensible choices.
|
||||
* This function allows a peripheral to continue operating when the
|
||||
* processor goes into deep-sleep mode. Since the clocking configuration
|
||||
* of the device may change, not all peripherals can safely continue
|
||||
* operating while the processor is in sleep mode. This in turn depends on
|
||||
* the chosen power mode. It is the responsibility of the caller to make
|
||||
* sensible choices.
|
||||
*
|
||||
* NOTE: A call to this function will only setup the shadow registers in the
|
||||
* MCU domain for the PRCM module. For the changes to propagate to the system
|
||||
* controller in the AON domain a call to this function should always be
|
||||
* followed by a call to prcm_load_set().
|
||||
* NOTE: A call to this function will only setup the shadow registers in
|
||||
* the MCU domain for the PRCM module. For the changes to propagate to the
|
||||
* system controller in the AON domain a call to this function should
|
||||
* always be followed by a call to prcm_load_set().
|
||||
*
|
||||
* Input Parameters:
|
||||
* peripheral - The peripheral to ensable in deep sleep mode. This is an
|
||||
@ -845,29 +855,30 @@ void prcm_periph_sleepdisable(uint32_t peripheral);
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
******************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void prcm_periph_deepsleepenable(uint32_t peripheral);
|
||||
|
||||
/******************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: prcm_periph_deepsleepdisable
|
||||
*
|
||||
* Description:
|
||||
* Disables a peripheral in deep-sleep mode
|
||||
*
|
||||
* This function causes a peripheral to stop operating when the processor goes
|
||||
* into deep-sleep mode. Disabling peripherals while in deep-sleep mode helps
|
||||
* to lower the current draw of the device, and can keep peripherals that
|
||||
* require a particular clock frequency from operating when the clock changes
|
||||
* as a result of entering deep-sleep mode. If enabled (via
|
||||
* prcm_periph_runenable()), the peripheral will automatically resume
|
||||
* operation when the processor leaves deep-sleep mode, maintaining its entire
|
||||
* state from before deep-sleep mode was entered.
|
||||
* This function causes a peripheral to stop operating when the processor
|
||||
* goes into deep-sleep mode. Disabling peripherals while in deep-sleep
|
||||
* mode helps to lower the current draw of the device, and can keep
|
||||
* peripherals that require a particular clock frequency from operating
|
||||
* when the clock changes as a result of entering deep-sleep mode. If
|
||||
* enabled (via prcm_periph_runenable()), the peripheral will
|
||||
* automatically resume operation when the processor leaves deep-sleep
|
||||
* mode, maintaining its entire state from before deep-sleep mode was
|
||||
* entered.
|
||||
*
|
||||
* NOTE: A call to this function will only setup the shadow registers in the
|
||||
* MCU domain for the PRCM module. For the changes to propagate to the system
|
||||
* controller in the AON domain a call to this function should always be
|
||||
* followed by a call to prcm_load_set().
|
||||
* NOTE: A call to this function will only setup the shadow registers in
|
||||
* the MCU domain for the PRCM module. For the changes to propagate to the
|
||||
* system controller in the AON domain a call to this function should
|
||||
* always be followed by a call to prcm_load_set().
|
||||
*
|
||||
* Input Parameters:
|
||||
* peripheral - The peripheral to disable in deep sleep mode. This is an
|
||||
@ -877,7 +888,7 @@ void prcm_periph_deepsleepenable(uint32_t peripheral);
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
******************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void prcm_periph_deepsleepdisable(uint32_t peripheral);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user