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Merged in david_s5/nuttx/master_f7_eth (pull request #970)

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stm32f7:ethernet add timeout on MAC reset

Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
David Sidrane 2019-08-08 16:17:57 +00:00 committed by Gregory Nutt
parent 8f3e024ef7
commit 786d3453a2
1 changed files with 21 additions and 12 deletions
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11
arch/arm/src/stm32f7/stm32_ethernet.c
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@ -316,6 +316,10 @@
#define PHY_WRITE_TIMEOUT (0x0004ffff)
#define PHY_RETRY_TIMEOUT (0x0004ffff)
/* MAC reset ready delays in loop counts */
#define MAC_READY_USTIMEOUT (100)
/* Register values **********************************************************/
/* Clear the MACCR bits that will be setup during MAC initialization (or that
@ -3674,6 +3678,7 @@ static inline void stm32_ethgpioconfig(struct stm32_ethmac_s *priv)
static void stm32_ethreset(struct stm32_ethmac_s *priv)
{
uint32_t regval;
volatile uint32_t timeout;
/* Reset the Ethernet on the AHB bus (F1 Connectivity Line) or AHB1 bus (F2
* and F4)
@ -3699,7 +3704,11 @@ static void stm32_ethreset(struct stm32_ethmac_s *priv)
* after the reset operation has completed in all of the core clock domains.
*/
while ((stm32_getreg(STM32_ETH_DMABMR) & ETH_DMABMR_SR) != 0);
timeout = MAC_READY_USTIMEOUT;
while (timeout-- && (stm32_getreg(STM32_ETH_DMABMR) & ETH_DMABMR_SR) != 0)
{
up_udelay(1);
}
}
/****************************************************************************