i.MX6: Add GPIO header file
This commit is contained in:
Gregory Nutt
parent
f74d2a9f51
commit
7887971ea5
@ -1,6 +1,5 @@
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/****************************************************************************
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* arch/arm/src/imx1/imx_gpio.c
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* arch/arm/src/chip/imx_gpio.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -44,22 +43,6 @@
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#include "up_arch.h"
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#include "imx_gpio.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Funtions
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****************************************************************************/
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@ -1,6 +1,5 @@
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/************************************************************************************
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* arch/arm/src/imx1/imx_gpio.h
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* arch/arm/src/chip/imx_gpio.h
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*
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* Copyright (C) 2009, 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_IMX_GPIO_H
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#define __ARCH_ARM_IMX_GPIO_H
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#ifndef __ARCH_ARM_SRC_IMX1_IMX_GPIO_H
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#define __ARCH_ARM_SRC_IMX1_IMX_GPIO_H
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/************************************************************************************
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* Included Files
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@ -185,7 +184,7 @@
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* Inline Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_IMX_GPIO_H */
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#endif /* __ARCH_ARM_SRC_IMX1_IMX_GPIO_H */
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#ifndef __ASSEMBLY__
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156
arch/arm/src/imx6/chip/imx_gpio.h
Normal file
156
arch/arm/src/imx6/chip/imx_gpio.h
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/************************************************************************************
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* arch/arm/src/imx6/imx_gpio.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_IMX6_CHIP_IMX_GPIO_H
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#define __ARCH_ARM_SRC_IMX6_CHIP_IMX_GPIO_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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#include "up_arch.h" /* getreg32(), putreg32() */
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#define GPIO1 0 /* Port 1 index */
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#define GPIO2 1 /* Port 2 index */
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#define GPIO3 2 /* Port 3 index */
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#define GPIO4 3 /* Port 4 index */
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#define GPIO5 4 /* Port 5 index */
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#define GPIO6 5 /* Port 6 index */
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#define GPIO7 6 /* Port 7 index */
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/* GPIO Register Offsets ************************************************************/
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#define GPIO_DR_OFFSET 0x0000 /* Data Register */
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#define GPIO_GDIR_OFFSET 0x0004 /* Data Direction Register */
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#define GPIO_PSR_OFFSET 0x0008 /* Pad Status Register */
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#define GPIO_ICR1_OFFSET 0x000c /* Interrupt Configuration Register 1 */
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#define GPIO_ICR2_OFFSET 0x0010 /* Interrupt Configuration Register 2 */
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#define GPIO_IMR_OFFSET 0x0014 /* Interrupt Mask Register */
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#define GPIO_ISR_OFFSET 0x0018 /* Interrupt Status Register */
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#define GPIO_EDGE_OFFSET 0x001c /* Interrupt Status Register */
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/* GPIO Register Addresses **********************************************************/
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#define GPIO1_DR (IMX_GPIO1_VBASE+GPIO_DR_OFFSET)
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#define GPIO1_GDIR (IMX_GPIO1_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO1_PSR (IMX_GPIO1_VBASE+GPIO_PSR_OFFSET)
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#define GPIO1_ICR1 (IMX_GPIO1_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO1_ICR2 (IMX_GPIO1_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO1_IMR (IMX_GPIO1_VBASE+GPIO_IMR_OFFSET)
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#define GPIO1_ISR (IMX_GPIO1_VBASE+GPIO_ISR_OFFSET)
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#define GPIO1_EDGE (IMX_GPIO1_VBASE+GPIO_EDGE_OFFSET)
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#define GPIO2_DR (IMX_GPIO2_VBASE+GPIO_DR_OFFSET)
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#define GPIO2_GDIR (IMX_GPIO2_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO2_PSR (IMX_GPIO2_VBASE+GPIO_PSR_OFFSET)
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#define GPIO2_ICR1 (IMX_GPIO2_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO2_ICR2 (IMX_GPIO2_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO2_IMR (IMX_GPIO2_VBASE+GPIO_IMR_OFFSET)
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#define GPIO2_ISR (IMX_GPIO2_VBASE+GPIO_ISR_OFFSET)
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#define GPIO2_EDGE (IMX_GPIO2_VBASE+GPIO_EDGE_OFFSET)
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#define GPIO3_DR (IMX_GPIO3_VBASE+GPIO_DR_OFFSET)
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#define GPIO3_GDIR (IMX_GPIO3_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO3_PSR (IMX_GPIO3_VBASE+GPIO_PSR_OFFSET)
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#define GPIO3_ICR1 (IMX_GPIO3_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO3_ICR2 (IMX_GPIO3_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO3_IMR (IMX_GPIO3_VBASE+GPIO_IMR_OFFSET)
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#define GPIO3_ISR (IMX_GPIO3_VBASE+GPIO_ISR_OFFSET)
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#define GPIO3_EDGE (IMX_GPIO3_VBASE+GPIO_EDGE_OFFSET)
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#define GPIO4_DR (IMX_GPIO4_VBASE+GPIO_DR_OFFSET)
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#define GPIO4_GDIR (IMX_GPIO4_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO4_PSR (IMX_GPIO4_VBASE+GPIO_PSR_OFFSET)
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#define GPIO4_ICR1 (IMX_GPIO4_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO4_ICR2 (IMX_GPIO4_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO4_IMR (IMX_GPIO4_VBASE+GPIO_IMR_OFFSET)
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#define GPIO4_ISR (IMX_GPIO4_VBASE+GPIO_ISR_OFFSET)
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#define GPIO4_EDGE (IMX_GPIO4_VBASE+GPIO_EDGE_OFFSET)
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#define GPIO5_DR (IMX_GPIO5_VBASE+GPIO_DR_OFFSET)
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#define GPIO5_GDIR (IMX_GPIO5_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO5_PSR (IMX_GPIO5_VBASE+GPIO_PSR_OFFSET)
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#define GPIO5_ICR1 (IMX_GPIO5_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO5_ICR2 (IMX_GPIO5_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO5_IMR (IMX_GPIO5_VBASE+GPIO_IMR_OFFSET)
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#define GPIO5_ISR (IMX_GPIO5_VBASE+GPIO_ISR_OFFSET)
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#define GPIO5_EDGE (IMX_GPIO5_VBASE+GPIO_EDGE_OFFSET)
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#define GPIO6_DR (IMX_GPIO6_VBASE+GPIO_DR_OFFSET)
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#define GPIO6_GDIR (IMX_GPIO6_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO6_PSR (IMX_GPIO6_VBASE+GPIO_PSR_OFFSET)
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#define GPIO6_ICR1 (IMX_GPIO6_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO6_ICR2 (IMX_GPIO6_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO6_IMR (IMX_GPIO6_VBASE+GPIO_IMR_OFFSET)
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#define GPIO6_ISR (IMX_GPIO6_VBASE+GPIO_ISR_OFFSET)
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#define GPIO6_EDGE (IMX_GPIO6_VBASE+GPIO_EDGE_OFFSET)
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#define GPIO7_DR (IMX_GPIO7_VBASE+GPIO_DR_OFFSET)
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#define GPIO7_GDIR (IMX_GPIO7_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO7_PSR (IMX_GPIO7_VBASE+GPIO_PSR_OFFSET)
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#define GPIO7_ICR1 (IMX_GPIO7_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO7_ICR2 (IMX_GPIO7_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO7_IMR (IMX_GPIO7_VBASE+GPIO_IMR_OFFSET)
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#define GPIO7_ISR (IMX_GPIO7_VBASE+GPIO_ISR_OFFSET)
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#define GPIO7_EDGE (IMX_GPIO7_VBASE+GPIO_EDGE_OFFSET)
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/* GPIO Register Bit Definitions ****************************************************/
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/* Most registers are laid out simply with one bit per pin */
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#define GPIO_PIN(n) (1 << (n)) /* Bit n: Pin n, n=0-31 */
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/* GPIO interrupt configuration register1/2 */
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#define GPIO_ICR_INDEX(n) ((n) >> 4)
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#define GPIO_ICR_OFFSET(n) (GPIO_ICR1_OFFSET + (GPIO_ICR_INDEX(n) << 2));
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#define GPIO_ICR_LOWLEVEL 0 /* Interrupt is low-level sensitive */
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#define GPIO_ICR_HIGHLEVEL 1 /* Interrupt is high-level sensitive */
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#define GPIO_ICR_RISINGEDGE 2 /* Interrupt is rising-edge sensitive */
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#define GPIO_ICR_FALLINGEDGE 3 /* Interrupt is falling-edge sensitive */
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#define GPIO_ICR_SHIFT(n) (((n) & 15) << 1)
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#define GPIO_ICR_MASK(n) (3 << GPIO_ICR_SHIFT(n))
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#define GPIO_ICR(i,n) ((uint32_t)(n) << GPIO_ICR_SHIFT(n))
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#endif /* __ARCH_ARM_SRC_IMX6_CHIP_IMX_GPIO_H */
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@ -181,6 +181,7 @@
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#define IMX_CAN1_OFFSET 0x00090000 /* 00090000 00093fff CAN1 16 KB */
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#define IMX_CAN2_OFFSET 0x00094000 /* 00094000 00097fff CAN2 16 KB */
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#define IMX_GPT_OFFSET 0x00098000 /* 00098000 0009bfff GPT 16 KB */
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#define IMX_GPIO_OFFSET(n) (0x0009c000 - ((n) << 14)) /* n=0..6 */
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#define IMX_GPIO1_OFFSET 0x0009c000 /* 0009c000 0009ffff GPIO1 16 KB */
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#define IMX_GPIO2_OFFSET 0x000a0000 /* 000a0000 000a3fff GPIO2 16 KB */
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#define IMX_GPIO3_OFFSET 0x000a4000 /* 000a4000 000a7fff GPIO3 16 KB */
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