Handle RX descriptor wrapping
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1602 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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3390476f74
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78c50dbfb6
@ -347,10 +347,11 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv);
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static void ez80emac_machash(FAR ubyte *mac, int *ndx, int *bitno)
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#endif
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/* Common TX logic */
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/* Common TX/RX logic */
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static int ez80emac_transmit(struct ez80emac_driver_s *priv);
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static int ez80emac_uiptxpoll(struct uip_driver_s *dev);
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static int ez80emac_receive(struct ez80emac_driver_s *priv);
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/* Interrupt handling */
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@ -1070,6 +1071,172 @@ static int ez80emac_uiptxpoll(struct uip_driver_s *dev)
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return ret;
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}
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/****************************************************************************
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* Function: ez80emac_receive
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*
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* Description:
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* Process received packets pending in the RX buffer
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*
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* Parameters:
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* priv - Driver data instance
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*
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* Returned Value:
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* 0: Success, but nothing received
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* >0: Success, number of packets received
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* <0: ERROR, negated error number
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*
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* Returned Value:
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* Interrupts are disabled
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*
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****************************************************************************/
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static int ez80emac_receive(struct ez80emac_driver_s *priv)
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{
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FAR struct ez80emac_desc_s *rxdesc = priv->rxnext;
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ubyte *psrc;
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ubyte *pdest;
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int pktlen;
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int npackets;
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/* The RRP register points to where the next Receive packet is read from.
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* The read-only EMAC Receive Write Pointer (RWP) egisters reports the
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* current RxDMA Receive Write pointer. The RxDMA block uses the RRP[12:5]
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* to compare to RWP[12:5] for determining how many buffers remain. The
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* result is the BLKSLFT register.
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*/
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nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x\n",
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rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
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inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
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inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
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inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
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/* The RxDMA reads the data from the RxFIFO and stores it in the EMAC
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* memory Receive buffer. When the end of the packet is detected, the
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* RxDMA reads the next two bytes from the RxFIFO and writes them into
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* the Rx descriptor status LSB and MSB. The packet length counter is
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* stored into the descriptor table packet length field, the descriptor
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* table next pointer is written into the Rx descriptor table and finally
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* the Rx_DONE_STAT bit in the EMAC Interrupt Status Register register is
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* set to 1.
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*/
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/* Process all packets that ownership has been given to the ez80 */
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npackets = 0;
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while ((rxdesc->stat & EMAC_TXDESC_OWNER) != 0)
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{
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if ((rxdesc->stat & EMAC_RXDESC_OK) == 0)
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{
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nvdbg("Skipping bad RX pkt: %04x\n", rxdesc->stat);
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continue;
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}
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/* We have a good packet. Check if the packet is a valid size
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* for the uIP buffer configuration (I routinely see
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*/
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if (rxdesc->pktsize > CONFIG_NET_BUFSIZE)
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{
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nvdbg("Truncated oversize RX pkt: %d->%d\n", rxdesc->pktsize, CONFIG_NET_BUFSIZE);
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pktlen = CONFIG_NET_BUFSIZE;
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}
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else
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{
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pktlen = rxdesc->pktsize;
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}
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/* Copy the data data from the hardware to priv->dev.d_buf */
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psrc = (FAR ubyte*)priv->rxnext + SIZEOF_EMACSDESC;
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pdest = priv->dev.d_buf;
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/* Check for wraparound */
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if ((FAR ubyte*)(psrc + pktlen) > (FAR ubyte*)priv->rxendp1)
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{
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int nbytes = (int)((FAR ubyte*)priv->rxendp1 - (FAR ubyte*)psrc);
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nvdbg("RX wraps after %d bytes\n", nbytes + SIZEOF_EMACSDESC);
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memcpy(pdest, psrc, nbytes);
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memcpy(&pdest[nbytes], priv->rxstart, pktlen - nbytes);
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}
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else
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{
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memcpy(pdest, psrc, pktlen);
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}
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/* Set the amount of data in priv->dev.d_len */
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priv->dev.d_len = pktlen;
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/* Reclaim the Rx descriptor */
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priv->rxnext = (FAR struct ez80emac_desc_s *)rxdesc->np;
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rxdesc->np = 0;
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rxdesc->pktsize = 0;
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rxdesc->stat = 0;
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rxdesc = priv->rxnext;
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nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x\n",
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rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
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inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
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inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
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inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
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/* We only accept IP packets of the configured type and ARP packets */
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#ifdef CONFIG_NET_IPv6
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if (ETHBUF->type == HTONS(UIP_ETHTYPE_IP6))
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#else
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if (ETHBUF->type == HTONS(UIP_ETHTYPE_IP))
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#endif
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{
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nvdbg("IP packet received (%02x)\n", ETHBUF->type);
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EMAC_STAT(priv, rx_ip);
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uip_arp_ipin();
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uip_input(&priv->dev);
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/* If the above function invocation resulted in data that should be
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* sent out on the network, the field d_len will set to a value > 0.
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*/
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if (priv->dev.d_len > 0)
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{
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uip_arp_out(&priv->dev);
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ez80emac_transmit(priv);
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}
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}
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else if (ETHBUF->type == htons(UIP_ETHTYPE_ARP))
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{
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nvdbg("ARP packet received (%02x)\n", ETHBUF->type);
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EMAC_STAT(priv, rx_arp);
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uip_arp_arpin(&priv->dev);
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/* If the above function invocation resulted in data that should be
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* sent out on the network, the field d_len will set to a value > 0.
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*/
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if (priv->dev.d_len > 0)
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{
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ez80emac_transmit(priv);
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}
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}
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#ifdef CONFIG_DEBUG
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else
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{
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ndbg("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
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EMAC_STAT(priv, rx_dropped);
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}
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#endif
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npackets++;
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}
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return npackets;
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}
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/****************************************************************************
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* Function: ez80emac_txinterrupt
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*
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@ -1194,10 +1361,8 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
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static int ez80emac_rxinterrupt(int irq, FAR void *context)
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{
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FAR struct ez80emac_driver_s *priv = &g_emac;
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FAR struct ez80emac_desc_s *rxdesc = priv->rxnext;
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ubyte istat;
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int pktlen;
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FAR struct ez80emac_driver_s *priv = &g_emac;
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ubyte istat;
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/* EMAC Rx interrupts:
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*
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@ -1216,122 +1381,9 @@ static int ez80emac_rxinterrupt(int irq, FAR void *context)
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EMAC_STAT(priv, rx_int);
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/* The RRP register points to where the next Receive packet is read from.
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* The read-only EMAC Receive Write Pointer (RWP) egisters reports the
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* current RxDMA Receive Write pointer. The RxDMA block uses the RRP[12:5]
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* to compare to RWP[12:5] for determining how many buffers remain. The
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* result is the BLKSLFT register.
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*/
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/* Process any RX packets pending the RX buffer */
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nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
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rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
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inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
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inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
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inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L),
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istat);
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/* The RxDMA reads the data from the RxFIFO and stores it in the EMAC
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* memory Receive buffer. When the end of the packet is detected, the
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* RxDMA reads the next two bytes from the RxFIFO and writes them into
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* the Rx descriptor status LSB and MSB. The packet length counter is
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* stored into the descriptor table packet length field, the descriptor
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* table next pointer is written into the Rx descriptor table and finally
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* the Rx_DONE_STAT bit in the EMAC Interrupt Status Register register is
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* set to 1.
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*/
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/* Check if this packet was received intact */
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if ((rxdesc->stat & EMAC_RXDESC_OK) == 0)
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{
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/* No frame received in this descriptor yet */
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return OK;
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}
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/* We have a good packet. Check if the packet is a valid size
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* for the uIP buffer configuration
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*/
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if (rxdesc->pktsize > CONFIG_NET_BUFSIZE)
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{
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nvdbg("receive oversize pkt\n");
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pktlen = CONFIG_NET_BUFSIZE;
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}
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else
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{
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pktlen = rxdesc->pktsize;
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}
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/* Copy the data data from the hardware to priv->dev.d_buf. Set
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* amount of data in priv->dev.d_len
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*/
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memcpy(priv->dev.d_buf, (FAR ubyte*)priv->rxnext + SIZEOF_EMACSDESC, pktlen);
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priv->dev.d_len = pktlen;
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/* Reclaim the Rx descriptor */
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priv->rxnext = (FAR struct ez80emac_desc_s *)rxdesc->np;
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rxdesc->np = 0;
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rxdesc->pktsize = 0;
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rxdesc->stat = 0;
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nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
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rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
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inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
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inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
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inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L),
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istat);
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/* We only accept IP packets of the configured type and ARP packets */
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#ifdef CONFIG_NET_IPv6
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if (ETHBUF->type == HTONS(UIP_ETHTYPE_IP6))
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#else
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if (ETHBUF->type == HTONS(UIP_ETHTYPE_IP))
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#endif
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{
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nvdbg("IP packet received (%02x)\n", ETHBUF->type);
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EMAC_STAT(priv, rx_ip);
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uip_arp_ipin();
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uip_input(&priv->dev);
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/* If the above function invocation resulted in data that should be
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* sent out on the network, the field d_len will set to a value > 0.
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*/
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if (priv->dev.d_len > 0)
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{
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uip_arp_out(&priv->dev);
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ez80emac_transmit(priv);
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}
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}
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else if (ETHBUF->type == htons(UIP_ETHTYPE_ARP))
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{
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nvdbg("ARP packet received (%02x)\n", ETHBUF->type);
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EMAC_STAT(priv, rx_arp);
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uip_arp_arpin(&priv->dev);
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/* If the above function invocation resulted in data that should be
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* sent out on the network, the field d_len will set to a value > 0.
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*/
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if (priv->dev.d_len > 0)
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{
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ez80emac_transmit(priv);
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}
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}
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#ifdef CONFIG_DEBUG
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else
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{
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ndbg("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
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EMAC_STAT(priv, rx_dropped);
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}
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#endif
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(void)ez80emac_receive(priv);
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return OK;
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}
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