Merged in masayuki2009/nuttx.nuttx/fix_cpustart (pull request #1051)
Fix cpustart for Cortex-M SMP * arch: lc823450: Fix lc823450_cpustart.c In Cortex-M, offset 0 in vector table stores initial stack pointer and offset 4 stores reset vector. Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com> * arch: sam34: Fix sam4cm_cpustart.c In Cortex-M, offset 0 in vector table stores initial stack pointer and offset 4 stores reset vector. Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com> Approved-by: Gregory Nutt <gnutt@nuttx.org>
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@ -74,8 +74,8 @@
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#define DPRINTF(fmt, args...) do {} while (0)
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#define DPRINTF(fmt, args...) do {} while (0)
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#endif
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#endif
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#define CPU1_VECTOR_RESETV 0x00000000
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#define CPU1_VECTOR_ISTACK 0x00000000
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#define CPU1_VECTOR_ISTACK 0x00000004
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#define CPU1_VECTOR_RESETV 0x00000004
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/****************************************************************************
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/****************************************************************************
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* Private Data
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* Private Data
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@ -188,10 +188,10 @@ int up_cpu_start(int cpu)
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/* create initial vectors for CPU1 */
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/* create initial vectors for CPU1 */
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putreg32(0x1, REMAP); /* remap enable */
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putreg32(0x1, REMAP); /* remap enable */
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backup[0] = getreg32(CPU1_VECTOR_RESETV);
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backup[0] = getreg32(CPU1_VECTOR_ISTACK);
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backup[1] = getreg32(CPU1_VECTOR_ISTACK);
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backup[1] = getreg32(CPU1_VECTOR_RESETV);
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putreg32((uint32_t)tcb->adj_stack_ptr, CPU1_VECTOR_RESETV);
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putreg32((uint32_t)tcb->adj_stack_ptr, CPU1_VECTOR_ISTACK);
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putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_ISTACK);
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putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_RESETV);
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spin_lock(&g_cpu_wait[0]);
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spin_lock(&g_cpu_wait[0]);
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@ -220,8 +220,8 @@ int up_cpu_start(int cpu)
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/* restore : after CPU1 boot, CPU1 use normal vectors table. */
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/* restore : after CPU1 boot, CPU1 use normal vectors table. */
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putreg32(backup[0], CPU1_VECTOR_RESETV);
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putreg32(backup[0], CPU1_VECTOR_ISTACK);
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putreg32(backup[1], CPU1_VECTOR_ISTACK);
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putreg32(backup[1], CPU1_VECTOR_RESETV);
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putreg32(0x0, REMAP); /* remap disable */
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putreg32(0x0, REMAP); /* remap disable */
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spin_unlock(&g_cpu_wait[0]);
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spin_unlock(&g_cpu_wait[0]);
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@ -72,8 +72,8 @@
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# define DPRINTF(fmt, args...) do {} while (0)
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# define DPRINTF(fmt, args...) do {} while (0)
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#endif
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#endif
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#define CPU1_VECTOR_RESETV (SAM_INTSRAM1_BASE)
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#define CPU1_VECTOR_ISTACK (SAM_INTSRAM1_BASE)
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#define CPU1_VECTOR_ISTACK (SAM_INTSRAM1_BASE + 4)
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#define CPU1_VECTOR_RESETV (SAM_INTSRAM1_BASE + 4)
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/****************************************************************************
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/****************************************************************************
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* Public Data
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* Public Data
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@ -215,8 +215,8 @@ int up_cpu_start(int cpu)
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/* Copy initial vectors for CPU1 */
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/* Copy initial vectors for CPU1 */
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putreg32((uint32_t)tcb->adj_stack_ptr, CPU1_VECTOR_RESETV);
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putreg32((uint32_t)tcb->adj_stack_ptr, CPU1_VECTOR_ISTACK);
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putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_ISTACK);
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putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_RESETV);
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spin_lock(&g_cpu1_boot);
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spin_lock(&g_cpu1_boot);
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