More ez80 files compile
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@739 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
parent
976ff7a822
commit
7984beaa4b
@ -45,12 +45,17 @@ LDFLAGS = @"${shell cygpath -w $(ARCHSRCDIR)/nuttx.linkcmd}"
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############################################################################
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# Files and directories
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HEAD_ASRC = $(HEAD_SSRC:.S=$(ASMEXT))
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ifneq ($(HEAD_SSRC),)
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HEAD_GENSRC = $(HEAD_SSRC:.S=$(ASMEXT))
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HEAD_AOBJ = $(HEAD_SSRC:.S=$(OBJEXT))
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else
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HEAD_AOBJ = $(HEAD_ASRC:$(ASMEXT)=$(OBJEXT))
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endif
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SSRCS = $(CHIP_SSRCS) $(CMN_SSRCS)
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ASRCS = $(SSRCS:.S=$(ASMEXT))
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AOBJS = $(SSRCS:.S=$(OBJEXT))
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ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
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GENSRCS = $(SSRCS:.S=$(ASMEXT))
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AOBJS = $(SSRCS:.S=$(OBJEXT)) $(ASRCS:$(ASMEXT)=$(OBJEXT))
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CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
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COBJS = $(CSRCS:.c=$(OBJEXT))
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@ -66,13 +71,13 @@ VPATH = chip:common
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# Targets
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all: $(HEAD_OBJ) libarch$(LIBEXT)
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$(ASRCS) $(HEAD_ASRC): %$(ASMEXT): %.S
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$(HEAD_GENSRC) $(GENSRCS) : %$(ASMEXT): %.S
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@$(CPP) $(CPPFLAGS) $< -o $@.tmp
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@cat $@.tmp | sed -e "s/^#/;/g" > $@
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@rm $@.tmp
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$(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %$(ASMEXT)
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$(call ASSEMBLE, $<, $@)
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$(call ASSEMBLE, `cygpath -w $<`, $@)
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$(COBJS): %$(OBJEXT): %.c
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$(call COMPILE, `cygpath -w $<`, $@)
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@ -1,5 +1,5 @@
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;**************************************************************************
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; arch/z80/src/ez80/z80_restorcontext.asm
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; arch/z80/src/ez80/ez80_restorcontext.asm
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;
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; Copyright (C) 2008 Gregory Nutt. All rights reserved.
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; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@ -48,6 +48,7 @@
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;**************************************************************************
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segment CODE
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.assume ADL=1
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;**************************************************************************
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; ez80_restorecontext
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@ -98,7 +99,7 @@ _ez80_restorecontext:
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; Restore interrupt state
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ex af, af' ; Recover interrupt state
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jr po, noinrestore ; No parity, IFF2=0, means disabled
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jp po, noinrestore ; No parity, IFF2=0, means disabled
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ex af, af' ; Restore AF (before enabling interrupts)
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ei ; yes.. Enable interrupts
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ret ; and return
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@ -47,43 +47,58 @@
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; Constants
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;*************************************************************************
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; Register save area layout
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CONFIG_EZ80_Z80MODE equ 0
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.if CONFIG_EZ80_Z80MODE
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XCPT_I EQU 2*0 ; Offset 0: Saved I w/interrupt state in carry
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XCPT_BC EQU 2*1 ; Offset 1: Saved BC register
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XCPT_DE EQU 2*2 ; Offset 2: Saved DE register
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XCPT_IX EQU 2*3 ; Offset 3: Saved IX register
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XCPT_IY EQU 2*4 ; Offset 4: Saved IY register
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XCPT_SP EQU 2*5 ; Offset 5: Offset to SP at time of interrupt
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XCPT_HL EQU 2*6 ; Offset 6: Saved HL register
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XCPT_AF EQU 2*7 ; Offset 7: Saved AF register
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XCPT_PC EQU 2*8 ; Offset 8: Offset to PC at time of interrupt
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.else
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XCPT_I EQU 3*0 ; Offset 0: Saved I w/interrupt state in carry
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XCPT_BC EQU 3*1 ; Offset 1: Saved BC register
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XCPT_DE EQU 3*2 ; Offset 2: Saved DE register
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XCPT_IX EQU 3*3 ; Offset 3: Saved IX register
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XCPT_IY EQU 3*4 ; Offset 4: Saved IY register
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XCPT_SP EQU 3*5 ; Offset 5: Offset to SP at time of interrupt
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XCPT_HL EQU 3*6 ; Offset 6: Saved HL register
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XCPT_AF EQU 3*7 ; Offset 7: Saved AF register
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XCPT_PC EQU 3*8 ; Offset 8: Offset to PC at time of interrupt .endif
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; Register save area layout
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XCPT_I equ 2*0 ; Offset 0: Saved I w/interrupt state in carry
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XCPT_BC equ 2*1 ; Offset 1: Saved BC register
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XCPT_DE equ 2*2 ; Offset 2: Saved DE register
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XCPT_IX equ 2*3 ; Offset 3: Saved IX register
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XCPT_IY equ 2*4 ; Offset 4: Saved IY register
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XCPT_SP equ 2*5 ; Offset 5: Offset to SP at time of interrupt
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XCPT_HL equ 2*6 ; Offset 6: Saved HL register
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XCPT_AF equ 2*7 ; Offset 7: Saved AF register
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XCPT_PC equ 2*8 ; Offset 8: Offset to PC at time of interrupt
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; Stack frame
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FRAME_IY EQU 0 ; Location of IY on the stack
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FRAME_IX EQU 2 ; Location of IX on the stack
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FRAME_RET EQU 4 ; Location of return address on the stack
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FRAME_REGS EQU 6 ; Location of reg save area on stack
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FRAME_IY equ 2*0 ; Location of IY on the stack
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FRAME_IX equ 2*1 ; Location of IX on the stack
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FRAME_RET equ 2*2 ; Location of return address on the stack
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FRAME_REGS equ 2*3 ; Location of reg save area on stack
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SP_OFFSET EQU 6
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SP_OFFSET equ 2*3
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.else
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; Register save area layout
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XCPT_I equ 3*0 ; Offset 0: Saved I w/interrupt state in carry
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XCPT_BC equ 3*1 ; Offset 1: Saved BC register
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XCPT_DE equ 3*2 ; Offset 2: Saved DE register
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XCPT_IX equ 3*3 ; Offset 3: Saved IX register
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XCPT_IY equ 3*4 ; Offset 4: Saved IY register
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XCPT_SP equ 3*5 ; Offset 5: Offset to SP at time of interrupt
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XCPT_HL equ 3*6 ; Offset 6: Saved HL register
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XCPT_AF equ 3*7 ; Offset 7: Saved AF register
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XCPT_PC equ 3*8 ; Offset 8: Offset to PC at time of interrupt .endif
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; Stack frame
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FRAME_IY equ 3*0 ; Location of IY on the stack
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FRAME_IX equ 3*1 ; Location of IX on the stack
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FRAME_RET equ 3*2 ; Location of return address on the stack
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FRAME_REGS equ 3*3 ; Location of reg save area on stack
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SP_OFFSET equ 3*3
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.endif
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;**************************************************************************
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; Code
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;**************************************************************************
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segment CODE
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.assume ADL=1
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;*************************************************************************
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; Name: z80_saveusercontext
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@ -99,7 +114,7 @@ _ez80_saveusercontext:
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; Fetch the address of the save area
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ld de, FRAME_REGS(ix) ; DE = save area address
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ld de, (ix + FRAME_REGS) ; DE = save area address
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ld iy, #0
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add iy, de ; IY = save area address
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@ -110,41 +125,41 @@ _ez80_saveusercontext:
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ld a, i ; Get interrupt state
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push af
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pop hl
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ld XCPT_I(iy), hl ; Index 0: I w/interrupt state in parity/overflow
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ld (iy + XCPT_I), hl ; Index 0: I w/interrupt state in parity/overflow
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; Save BC at offset 1
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ld XCPT_BC(iy), bc ; Index 1: BC
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ld (iy + XCPT_BC), bc ; Index 1: BC
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; DE is not preserved (Index 2)
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; Save IX at offset 3
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ld hl, FRAME_IX(ix) ; HL = Saved alue of IX
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ld XCPT_IX(iy), hl ; Index 3: IX
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ld hl, (ix + FRAME_IX) ; HL = Saved alue of IX
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ld (iy + XCPT_IX), hl ; Index 3: IX
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; Save IY at index 4
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ld hl, FRAME_IY(ix) ; HL = Saved value of IY
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ld XCPT_IY(iy), hl ; Index 4: IY
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ld hl, (ix + FRAME_IY) ; HL = Saved value of IY
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ld (iy + XCPT_IY), hl ; Index 4: IY
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; Save that stack pointer as it would be upon return in offset 5
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ld hl, #SP_OFFSET ; Value of stack pointer on return
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add hl, sp
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ld XCPT_SP(iy), hl ; Index 5 SP
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ld (iy + XCPT_SP), hl ; Index 5 SP
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; HL is saved as the value 1 at offset 6
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ld hl, #1
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ld XCPT_HL(iy), hl ; Index 2: HL on return (=1)
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ld (iy + XCPT_HL), hl ; Index 2: HL on return (=1)
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; AF is not preserved (offset 7)
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; Save the return address at index 8
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ld hl, FRAME_RET(ix) ; HL = Saved return address
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ld XCPT_PC(iy), hl ; Index 8: PC
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ld hl, (ix + FRAME_RET) ; HL = Saved return address
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ld (iy + XCPT_PC), hl ; Index 8: PC
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; Return the value 0
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@ -67,6 +67,13 @@
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xdef _ez80_startup
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xdef _ez80_halt
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;**************************************************************************
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; Code
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;**************************************************************************
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segment CODE
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.assume ADL=1
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;**************************************************************************
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; System reset start logic
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;**************************************************************************
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@ -149,7 +156,7 @@ _ez80_codedone:
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; NuttX will never return, but just in case...
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call __close_periphdevice
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_ez80_halt::
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_ez80_halt:
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halt ; We should never get here
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jp _ez80_halt
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@ -44,6 +44,7 @@ NVECTORS EQU 64 ; max possible interrupt vectors
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;**************************************************************************
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xref _ez80_startup
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xref _up_doirq
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;**************************************************************************
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; Global Symbols Exported
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@ -77,7 +78,7 @@ irqhandler: macro vectno
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; Offset 8: Return PC is already on the stack
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push af ; Offset 7: AF (retaining flags)
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ld a, #vectno ; A = vector number
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jr _ez80_rstcommon ; Remaining RST handling is common
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jp _ez80_rstcommon ; Remaining RST handling is common
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endmac irqhandler
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; Save Interrupt State
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@ -136,7 +137,7 @@ _nmi:
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_ez80_handlers:
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irqhandler 0
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handlersize equ . - _ez80handlers
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handlersize equ $-_ez80handlers
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irqhandler 1
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irqhandler 2
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irqhandler 3
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@ -205,7 +206,7 @@ _ez80_handlers:
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; Common Interrupt handler
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;**************************************************************************
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_ez80_rstcommon::
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_ez80_rstcommon:
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; Create a register frame. SP points to top of frame + 4, pushes
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; decrement the stack pointer. Already have
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;
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@ -274,7 +275,7 @@ _ez80_rstcommon::
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ex af, af' ; Restore AF (before enabling interrupts)
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ei ; yes
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reti
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nointenable::
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nointenable:
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ex af, af' ; Restore AF
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reti
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@ -285,16 +286,18 @@ nointenable::
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_ez80_initvectors:
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; Initialize the vector table
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ld hl, _vector_table
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ld iy, _ez80_vectable
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ld bc, 4
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ld b, NVECTORS
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ld iy, _ez80_handlers
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ld hl, _ez80_handlers
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ld de, handlersize
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ld a, 0
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$1:
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ld (iy), hl ; Store IRQ handler
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ld (iy+3), a ; Pad to 4 bytes
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add hl, handlersize ; Point to next handler
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add iy, 4 ; Point to next entry in vector table
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djnz $2 ; Loop until all vectors have been written
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add hl, de ; Point to next handler
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add iy, bc ; Point to next entry in vector table
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djnz $1 ; Loop until all vectors have been written
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; Select interrupt mode 2
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@ -42,7 +42,7 @@ RANGE RAM $B7E000 : $B7FFFF
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RANGE EXTIO $000000 : $00FFFF
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RANGE INTIO $000000 : $0000FF
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CHANGE STRSECT is ROM
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CHANGE STRSECT = ROM
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ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA
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COPY DATA ROM
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