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More ez80 files compile

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@739 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2008-03-18 01:40:12 +00:00
parent 976ff7a822
commit 7984beaa4b
6 changed files with 85 additions and 54 deletions
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15
arch/z80/src/Makefile.zdsii
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@ -45,12 +45,17 @@ LDFLAGS = @"${shell cygpath -w $(ARCHSRCDIR)/nuttx.linkcmd}"
############################################################################ ############################################################################
# Files and directories # Files and directories
HEAD_ASRC = $(HEAD_SSRC:.S=$(ASMEXT)) ifneq ($(HEAD_SSRC),)
HEAD_GENSRC = $(HEAD_SSRC:.S=$(ASMEXT))
HEAD_AOBJ = $(HEAD_SSRC:.S=$(OBJEXT)) HEAD_AOBJ = $(HEAD_SSRC:.S=$(OBJEXT))
else
HEAD_AOBJ = $(HEAD_ASRC:$(ASMEXT)=$(OBJEXT))
endif
SSRCS = $(CHIP_SSRCS) $(CMN_SSRCS) SSRCS = $(CHIP_SSRCS) $(CMN_SSRCS)
ASRCS = $(SSRCS:.S=$(ASMEXT)) ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
AOBJS = $(SSRCS:.S=$(OBJEXT)) GENSRCS = $(SSRCS:.S=$(ASMEXT))
AOBJS = $(SSRCS:.S=$(OBJEXT)) $(ASRCS:$(ASMEXT)=$(OBJEXT))
CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS) CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
COBJS = $(CSRCS:.c=$(OBJEXT)) COBJS = $(CSRCS:.c=$(OBJEXT))
@ -66,13 +71,13 @@ VPATH = chip:common
# Targets # Targets
all: $(HEAD_OBJ) libarch$(LIBEXT) all: $(HEAD_OBJ) libarch$(LIBEXT)
$(ASRCS) $(HEAD_ASRC): %$(ASMEXT): %.S $(HEAD_GENSRC) $(GENSRCS) : %$(ASMEXT): %.S
@$(CPP) $(CPPFLAGS) $< -o $@.tmp @$(CPP) $(CPPFLAGS) $< -o $@.tmp
@cat $@.tmp | sed -e "s/^#/;/g" > $@ @cat $@.tmp | sed -e "s/^#/;/g" > $@
@rm $@.tmp @rm $@.tmp
$(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %$(ASMEXT) $(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %$(ASMEXT)
$(call ASSEMBLE, $<, $@) $(call ASSEMBLE, `cygpath -w $<`, $@)
$(COBJS): %$(OBJEXT): %.c $(COBJS): %$(OBJEXT): %.c
$(call COMPILE, `cygpath -w $<`, $@) $(call COMPILE, `cygpath -w $<`, $@)

5
arch/z80/src/ez80/ez80_restorecontext.asm
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@ -1,5 +1,5 @@
;************************************************************************** ;**************************************************************************
; arch/z80/src/ez80/z80_restorcontext.asm ; arch/z80/src/ez80/ez80_restorcontext.asm
; ;
; Copyright (C) 2008 Gregory Nutt. All rights reserved. ; Copyright (C) 2008 Gregory Nutt. All rights reserved.
; Author: Gregory Nutt <spudmonkey@racsa.co.cr> ; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -48,6 +48,7 @@
;************************************************************************** ;**************************************************************************
segment CODE segment CODE
.assume ADL=1
;************************************************************************** ;**************************************************************************
; ez80_restorecontext ; ez80_restorecontext
@ -98,7 +99,7 @@ _ez80_restorecontext:
; Restore interrupt state ; Restore interrupt state
ex af, af' ; Recover interrupt state ex af, af' ; Recover interrupt state
jr po, noinrestore ; No parity, IFF2=0, means disabled jp po, noinrestore ; No parity, IFF2=0, means disabled
ex af, af' ; Restore AF (before enabling interrupts) ex af, af' ; Restore AF (before enabling interrupts)
ei ; yes.. Enable interrupts ei ; yes.. Enable interrupts
ret ; and return ret ; and return

87
arch/z80/src/ez80/ez80_saveusercontext.asm
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@ -47,43 +47,58 @@
; Constants ; Constants
;************************************************************************* ;*************************************************************************
; Register save area layout CONFIG_EZ80_Z80MODE equ 0
.if CONFIG_EZ80_Z80MODE .if CONFIG_EZ80_Z80MODE
XCPT_I EQU 2*0 ; Offset 0: Saved I w/interrupt state in carry ; Register save area layout
XCPT_BC EQU 2*1 ; Offset 1: Saved BC register
XCPT_DE EQU 2*2 ; Offset 2: Saved DE register XCPT_I equ 2*0 ; Offset 0: Saved I w/interrupt state in carry
XCPT_IX EQU 2*3 ; Offset 3: Saved IX register XCPT_BC equ 2*1 ; Offset 1: Saved BC register
XCPT_IY EQU 2*4 ; Offset 4: Saved IY register XCPT_DE equ 2*2 ; Offset 2: Saved DE register
XCPT_SP EQU 2*5 ; Offset 5: Offset to SP at time of interrupt XCPT_IX equ 2*3 ; Offset 3: Saved IX register
XCPT_HL EQU 2*6 ; Offset 6: Saved HL register XCPT_IY equ 2*4 ; Offset 4: Saved IY register
XCPT_AF EQU 2*7 ; Offset 7: Saved AF register XCPT_SP equ 2*5 ; Offset 5: Offset to SP at time of interrupt
XCPT_PC EQU 2*8 ; Offset 8: Offset to PC at time of interrupt XCPT_HL equ 2*6 ; Offset 6: Saved HL register
.else XCPT_AF equ 2*7 ; Offset 7: Saved AF register
XCPT_I EQU 3*0 ; Offset 0: Saved I w/interrupt state in carry XCPT_PC equ 2*8 ; Offset 8: Offset to PC at time of interrupt
XCPT_BC EQU 3*1 ; Offset 1: Saved BC register
XCPT_DE EQU 3*2 ; Offset 2: Saved DE register
XCPT_IX EQU 3*3 ; Offset 3: Saved IX register
XCPT_IY EQU 3*4 ; Offset 4: Saved IY register
XCPT_SP EQU 3*5 ; Offset 5: Offset to SP at time of interrupt
XCPT_HL EQU 3*6 ; Offset 6: Saved HL register
XCPT_AF EQU 3*7 ; Offset 7: Saved AF register
XCPT_PC EQU 3*8 ; Offset 8: Offset to PC at time of interrupt .endif
; Stack frame ; Stack frame
FRAME_IY EQU 0 ; Location of IY on the stack FRAME_IY equ 2*0 ; Location of IY on the stack
FRAME_IX EQU 2 ; Location of IX on the stack FRAME_IX equ 2*1 ; Location of IX on the stack
FRAME_RET EQU 4 ; Location of return address on the stack FRAME_RET equ 2*2 ; Location of return address on the stack
FRAME_REGS EQU 6 ; Location of reg save area on stack FRAME_REGS equ 2*3 ; Location of reg save area on stack
SP_OFFSET EQU 6 SP_OFFSET equ 2*3
.else
; Register save area layout
XCPT_I equ 3*0 ; Offset 0: Saved I w/interrupt state in carry
XCPT_BC equ 3*1 ; Offset 1: Saved BC register
XCPT_DE equ 3*2 ; Offset 2: Saved DE register
XCPT_IX equ 3*3 ; Offset 3: Saved IX register
XCPT_IY equ 3*4 ; Offset 4: Saved IY register
XCPT_SP equ 3*5 ; Offset 5: Offset to SP at time of interrupt
XCPT_HL equ 3*6 ; Offset 6: Saved HL register
XCPT_AF equ 3*7 ; Offset 7: Saved AF register
XCPT_PC equ 3*8 ; Offset 8: Offset to PC at time of interrupt .endif
; Stack frame
FRAME_IY equ 3*0 ; Location of IY on the stack
FRAME_IX equ 3*1 ; Location of IX on the stack
FRAME_RET equ 3*2 ; Location of return address on the stack
FRAME_REGS equ 3*3 ; Location of reg save area on stack
SP_OFFSET equ 3*3
.endif
;************************************************************************** ;**************************************************************************
; Code ; Code
;************************************************************************** ;**************************************************************************
segment CODE segment CODE
.assume ADL=1
;************************************************************************* ;*************************************************************************
; Name: z80_saveusercontext ; Name: z80_saveusercontext
@ -99,7 +114,7 @@ _ez80_saveusercontext:
; Fetch the address of the save area ; Fetch the address of the save area
ld de, FRAME_REGS(ix) ; DE = save area address ld de, (ix + FRAME_REGS) ; DE = save area address
ld iy, #0 ld iy, #0
add iy, de ; IY = save area address add iy, de ; IY = save area address
@ -110,41 +125,41 @@ _ez80_saveusercontext:
ld a, i ; Get interrupt state ld a, i ; Get interrupt state
push af push af
pop hl pop hl
ld XCPT_I(iy), hl ; Index 0: I w/interrupt state in parity/overflow ld (iy + XCPT_I), hl ; Index 0: I w/interrupt state in parity/overflow
; Save BC at offset 1 ; Save BC at offset 1
ld XCPT_BC(iy), bc ; Index 1: BC ld (iy + XCPT_BC), bc ; Index 1: BC
; DE is not preserved (Index 2) ; DE is not preserved (Index 2)
; Save IX at offset 3 ; Save IX at offset 3
ld hl, FRAME_IX(ix) ; HL = Saved alue of IX ld hl, (ix + FRAME_IX) ; HL = Saved alue of IX
ld XCPT_IX(iy), hl ; Index 3: IX ld (iy + XCPT_IX), hl ; Index 3: IX
; Save IY at index 4 ; Save IY at index 4
ld hl, FRAME_IY(ix) ; HL = Saved value of IY ld hl, (ix + FRAME_IY) ; HL = Saved value of IY
ld XCPT_IY(iy), hl ; Index 4: IY ld (iy + XCPT_IY), hl ; Index 4: IY
; Save that stack pointer as it would be upon return in offset 5 ; Save that stack pointer as it would be upon return in offset 5
ld hl, #SP_OFFSET ; Value of stack pointer on return ld hl, #SP_OFFSET ; Value of stack pointer on return
add hl, sp add hl, sp
ld XCPT_SP(iy), hl ; Index 5 SP ld (iy + XCPT_SP), hl ; Index 5 SP
; HL is saved as the value 1 at offset 6 ; HL is saved as the value 1 at offset 6
ld hl, #1 ld hl, #1
ld XCPT_HL(iy), hl ; Index 2: HL on return (=1) ld (iy + XCPT_HL), hl ; Index 2: HL on return (=1)
; AF is not preserved (offset 7) ; AF is not preserved (offset 7)
; Save the return address at index 8 ; Save the return address at index 8
ld hl, FRAME_RET(ix) ; HL = Saved return address ld hl, (ix + FRAME_RET) ; HL = Saved return address
ld XCPT_PC(iy), hl ; Index 8: PC ld (iy + XCPT_PC), hl ; Index 8: PC
; Return the value 0 ; Return the value 0

9
arch/z80/src/ez80/ez80_startup.asm
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@ -67,6 +67,13 @@
xdef _ez80_startup xdef _ez80_startup
xdef _ez80_halt xdef _ez80_halt
;**************************************************************************
; Code
;**************************************************************************
segment CODE
.assume ADL=1
;************************************************************************** ;**************************************************************************
; System reset start logic ; System reset start logic
;************************************************************************** ;**************************************************************************
@ -149,7 +156,7 @@ _ez80_codedone:
; NuttX will never return, but just in case... ; NuttX will never return, but just in case...
call __close_periphdevice call __close_periphdevice
_ez80_halt:: _ez80_halt:
halt ; We should never get here halt ; We should never get here
jp _ez80_halt jp _ez80_halt

21
arch/z80/src/ez80/ez80_vectors.asm
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@ -44,6 +44,7 @@ NVECTORS EQU 64 ; max possible interrupt vectors
;************************************************************************** ;**************************************************************************
xref _ez80_startup xref _ez80_startup
xref _up_doirq
;************************************************************************** ;**************************************************************************
; Global Symbols Exported ; Global Symbols Exported
@ -77,7 +78,7 @@ irqhandler: macro vectno
; Offset 8: Return PC is already on the stack ; Offset 8: Return PC is already on the stack
push af ; Offset 7: AF (retaining flags) push af ; Offset 7: AF (retaining flags)
ld a, #vectno ; A = vector number ld a, #vectno ; A = vector number
jr _ez80_rstcommon ; Remaining RST handling is common jp _ez80_rstcommon ; Remaining RST handling is common
endmac irqhandler endmac irqhandler
; Save Interrupt State ; Save Interrupt State
@ -136,7 +137,7 @@ _nmi:
_ez80_handlers: _ez80_handlers:
irqhandler 0 irqhandler 0
handlersize equ . - _ez80handlers handlersize equ $-_ez80handlers
irqhandler 1 irqhandler 1
irqhandler 2 irqhandler 2
irqhandler 3 irqhandler 3
@ -205,7 +206,7 @@ _ez80_handlers:
; Common Interrupt handler ; Common Interrupt handler
;************************************************************************** ;**************************************************************************
_ez80_rstcommon:: _ez80_rstcommon:
; Create a register frame. SP points to top of frame + 4, pushes ; Create a register frame. SP points to top of frame + 4, pushes
; decrement the stack pointer. Already have ; decrement the stack pointer. Already have
; ;
@ -274,7 +275,7 @@ _ez80_rstcommon::
ex af, af' ; Restore AF (before enabling interrupts) ex af, af' ; Restore AF (before enabling interrupts)
ei ; yes ei ; yes
reti reti
nointenable:: nointenable:
ex af, af' ; Restore AF ex af, af' ; Restore AF
reti reti
@ -285,16 +286,18 @@ nointenable::
_ez80_initvectors: _ez80_initvectors:
; Initialize the vector table ; Initialize the vector table
ld hl, _vector_table ld iy, _ez80_vectable
ld bc, 4
ld b, NVECTORS ld b, NVECTORS
ld iy, _ez80_handlers ld hl, _ez80_handlers
ld de, handlersize
ld a, 0 ld a, 0
$1: $1:
ld (iy), hl ; Store IRQ handler ld (iy), hl ; Store IRQ handler
ld (iy+3), a ; Pad to 4 bytes ld (iy+3), a ; Pad to 4 bytes
add hl, handlersize ; Point to next handler add hl, de ; Point to next handler
add iy, 4 ; Point to next entry in vector table add iy, bc ; Point to next entry in vector table
djnz $2 ; Loop until all vectors have been written djnz $1 ; Loop until all vectors have been written
; Select interrupt mode 2 ; Select interrupt mode 2

2
configs/ez80f910200kitg/ostest/ostest.linkcmd
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@ -42,7 +42,7 @@ RANGE RAM $B7E000 : $B7FFFF
RANGE EXTIO $000000 : $00FFFF RANGE EXTIO $000000 : $00FFFF
RANGE INTIO $000000 : $0000FF RANGE INTIO $000000 : $0000FF
CHANGE STRSECT is ROM CHANGE STRSECT = ROM
ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA
COPY DATA ROM COPY DATA ROM