ESP32: Add driver support to SPI Master and Slave

This driver was implemented by Dong Heng <dongheng@espressif.com>
and modified to fix coding style by Alan Carvalho de Assis.

arch/xtensa/include/esp32/irq.h

@@ -234,9 +234,9 @@
 #define ESP32_IRQ_CPU_CPU2          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_CPU2)
 #define ESP32_IRQ_CPU_CPU3          (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_CPU_CPU3)
 #define ESP32_IRQ_SPI0              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI0)
-#define ESP32_IRQ_SPI1              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI1
+#define ESP32_IRQ_SPI1              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI1)
 #define ESP32_IRQ_SPI2              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI2)
-#define ESP32_IRQ_SPI3              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI3
+#define ESP32_IRQ_SPI3              (XTENSA_IRQ_FIRSTPERIPH+ESP32_PERIPH_SPI3)
 
 #define ESP32_IRQ_SREG0             ESP32_IRQ_MAC
 #define ESP32_NIRQS_SREG0           32

arch/xtensa/src/esp32/Kconfig

@@ -81,25 +81,23 @@ config ESP32_SDMMC
 	---help---
 		No yet implemented
 
-config ESP32_SPI0
-	bool "SPI 0"
+config ESP32_SPI
+	bool
 	default n
-	depends on EXPERIMENTAL
-	---help---
-		No yet implemented
-
-config ESP32_SPI1
-	bool "SPI 1"
-	default n
-	depends on EXPERIMENTAL
-	---help---
-		No yet implemented
 
 config ESP32_SPI2
 	bool "SPI 2"
 	default n
-	---help---
-		No yet implemented
+	select ESP32_SPI
+	select ESP32_GPIO_IRQ
+	select SPI
+
+config ESP32_SPI3
+	bool "SPI 3"
+	default n
+	select ESP32_SPI
+	select ESP32_GPIO_IRQ
+	select SPI
 
 config XTENSA_TIMER1
 	bool "Xtensa Timer 1"
@@ -309,4 +307,58 @@ endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL
 endif # ESP32_UART2
 
 endmenu # UART configuration
+
+menu "SPI configuration"
+	depends on ESP32_SPI
+
+if ESP32_SPI2
+
+config ESP32_SPI2_CSPIN
+	int "SPI2 CS Pin"
+	default 13
+	range 0 39
+
+config ESP32_SPI2_CLKPIN
+	int "SPI2 CLK Pin"
+	default 14
+	range 0 39
+
+config ESP32_SPI2_MOSIPIN
+	int "SPI2 MOSI Pin"
+	default 15
+	range 0 39
+
+config ESP32_SPI2_MISOPIN
+	int "SPI2 MISO Pin"
+	default 2
+	range 0 39
+
+endif # ESP32_SPI2
+
+if ESP32_SPI3
+
+config ESP32_SPI3_CSPIN
+	int "SPI3 CS Pin"
+	default 13
+	range 0 39
+
+config ESP32_SPI3_CLKPIN
+	int "SPI3 CLK Pin"
+	default 14
+	range 0 39
+
+config ESP32_SPI3_MOSIPIN
+	int "SPI3 MOSI Pin"
+	default 15
+	range 0 39
+
+config ESP32_SPI3_MISOPIN
+	int "SPI3 MISO Pin"
+	default 2
+	range 0 39
+
+endif # ESP32_SPI3
+
+endmenu # ESP32_SPI
+
 endif # ARCH_CHIP_ESP32

arch/xtensa/src/esp32/Make.defs

@@ -100,6 +100,13 @@ CHIP_CSRCS += esp32_gpio.c esp32_intdecode.c esp32_irq.c esp32_region.c
 CHIP_CSRCS += esp32_timerisr.c
 CHIP_CSRCS += esp32_user.c
 
+ifeq ($(CONFIG_ESP32_SPI),y)
+CHIP_CSRCS += esp32_spi.c
+  ifeq ($(CONFIG_SPI_SLAVE),y)
+    CHIP_CSRCS += esp32_spi_slave.c
+  endif
+endif
+
 # Configuration-dependent ESP32 files
 
 ifeq ($(CONFIG_SMP),y)

arch/xtensa/src/esp32/esp32_spi.h

@@ -0,0 +1,163 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_spi.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_SPI_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_SPI_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#ifdef CONFIG_ESP32_SPI
+
+#include <nuttx/spi/spi.h>
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_spibus_initialize
+ *
+ * Description:
+ *   Initialize the selected SPI bus
+ *
+ * Input Parameters:
+ *   Port number (for hardware that has multiple SPI interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI device structure reference on success; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct spi_dev_s *esp32_spibus_initialize(int port);
+
+/****************************************************************************
+ * Name:  esp32_spi0/1/...select and esp32_spi0/1/...status
+ *
+ * Description:
+ *   The external functions, esp32_spi0/1/...select, esp32_spi0/1/...status,
+ *   and esp32_spi0/1/...cmddata must be provided by board-specific logic.
+ *   These are implementations of the select, status, and cmddata methods of
+ *   the SPI interface defined by struct spi_ops_s (include/nuttx/spi/spi.h).
+ *   All other methods (including esp32_spibus_initialize()) are provided by
+ *   common ESP32 logic. To use this common SPI logic on your board:
+ *
+ *   1. Provide logic in esp32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide esp32_spi0/1/...select() and esp32_spi0/1/...status()
+ *      functions in your board-specific logic. These functions will perform
+ *      chip selection and status operations using GPIOs in the way your
+ *      board is configured.
+ *   3. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration file,
+*      then provide esp32_spi0/1/...cmddata() functions in your
+ *      board-specific logic. These functions will perform cmd/data selection
+ *      operations using GPIOs in the way your board is configured.
+ *   4. Add a calls to esp32_spibus_initialize() in your low level
+ *      application initialization logic.
+ *   5. The handle returned by esp32_spibus_initialize() may then be used to
+ *      bind the SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32_SPI2
+void esp32_spi2_select(FAR struct spi_dev_s *dev, uint32_t devid,
+                       bool selected);
+uint8_t esp32_spi2_status(FAR struct spi_dev_s *dev, uint32_t devid);
+int esp32_spi2_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
+#endif
+
+#ifdef CONFIG_ESP32_SPI3
+void esp32_spi3_select(FAR struct spi_dev_s *dev, uint32_t devid,
+                       bool selected);
+uint8_t esp32_spi3_status(FAR struct spi_dev_s *dev, uint32_t devid);
+int esp32_spi3_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
+#endif
+
+/****************************************************************************
+ * Name: esp32_spibus_uninitialize
+ *
+ * Description:
+ *   Uninitialize an SPI bus
+ *
+ ****************************************************************************/
+
+int esp32_spibus_uninitialize(FAR struct spi_dev_s *dev);
+
+/****************************************************************************
+ * Name: esp32_spislv_sctrlr_initialize
+ *
+ * Description:
+ *   Initialize the selected SPI slave bus
+ *
+ * Input Parameters:
+ *   Port number (for hardware that has multiple SPI slave interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI slave device structure reference on success; a NULL on failure
+ *
+ ****************************************************************************/
+
+FAR struct spi_sctrlr_s *esp32_spislv_sctrlr_initialize(int port);
+
+/****************************************************************************
+ * Name: esp32_spislv_sctrlr_uninitialize
+ *
+ * Description:
+ *   Uninitialize an SPI slave bus
+ *
+ * Input Parameters:
+ *   sctrlr - SPI slave controller interface instance
+ *
+ * Returned Value:
+ *   OK if success or fail
+ *
+ ****************************************************************************/
+
+int esp32_spislv_sctrlr_uninitialize(FAR struct spi_sctrlr_s *sctrlr);
+
+#endif /* CONFIG_ESP32_SPI */
+
+#ifdef __cplusplus
+}
+#endif
+#undef EXTERN
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_SPI_H */