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i.MX6: Don't output the alphabet if CONFIG_DEBUG_FEATURES is not set.

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This commit is contained in:
Gregory Nutt 2016-11-29 08:34:22 -06:00
parent a8b69c3efe
commit 79bb895073
2 changed files with 31 additions and 21 deletions
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2
arch/arm/src/armv7-a/arm_cpuhead.S
View File

@ -312,7 +312,7 @@ __cpu3_start:
* after SMP cache coherency has been setup.
*/
#if !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP)
#if 0 /* !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP) */
/* Dcache enable
*
* SCTLR_C Bit 2: DCache enable

50
arch/arm/src/imx6/imx_boot.c
View File

@ -65,6 +65,16 @@
#include "imx_serial.h"
#include "imx_boot.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
# define PROGRESS(c) imx_lowputc(c)
#else
# define PROGRESS(c)
#endif
/****************************************************************************
* Public Data
****************************************************************************/
@ -443,7 +453,7 @@ void arm_boot(void)
*/
imx_setupmappings();
imx_lowputc('A');
PROGRESS('A');
/* Make sure that all other CPUs are in the disabled state. This is a
* formality because the other CPUs are actually running then we have
@ -451,13 +461,13 @@ void arm_boot(void)
*/
imx_cpu_disable();
imx_lowputc('B');
PROGRESS('B');
#ifdef CONFIG_SMP
/* Enable SMP cache coherency for CPU0 */
arm_enable_smp(0);
imx_lowputc('C');
PROGRESS('C');
#endif
/* Provide a special mapping for the OCRAM interrupt vector positioned in
@ -465,7 +475,7 @@ void arm_boot(void)
*/
imx_vectormapping();
imx_lowputc('D');
PROGRESS('D');
#if defined(CONFIG_SMP) && defined(SMP_INTERCPU_NONCACHED)
/* Provide a special mapping for the OCRAM interrupt vector positioned in
@ -473,7 +483,7 @@ void arm_boot(void)
*/
imx_intercpu_mapping();
imx_lowputc('E');
PROGRESS('E');
#endif
#ifdef CONFIG_ARCH_RAMFUNCS
@ -488,14 +498,14 @@ void arm_boot(void)
*dest++ = *src++;
}
imx_lowputc('F');
PROGRESS('F');
/* Flush the copied RAM functions into physical RAM so that will
* be available when fetched into the I-Cache.
*/
arch_clean_dcache((uintptr_t)&_sramfuncs, (uintptr_t)&_eramfuncs)
imx_lowputc('G');
PROGRESS('G');
#endif
/* Setup up vector block. _vector_start and _vector_end are exported from
@ -503,23 +513,23 @@ void arm_boot(void)
*/
imx_copyvectorblock();
imx_lowputc('H');
PROGRESS('H');
/* Disable the watchdog timer */
imx_wdtdisable();
imx_lowputc('I');
PROGRESS('I');
/* Initialize clocking to settings provided by board-specific logic */
imx_clockconfig();
imx_lowputc('J');
PROGRESS('J');
#ifdef CONFIG_ARCH_FPU
/* Initialize the FPU */
arm_fpuconfig();
imx_lowputc('K');
PROGRESS('K');
#endif
/* Perform board-specific memroy initialization, This must include
@ -531,7 +541,7 @@ void arm_boot(void)
*/
imx_memory_initialize();
imx_lowputc('L');
PROGRESS('L');
#ifdef NEED_SDRAM_REMAPPING
/* SDRAM was configured in a temporary state to support low-level
@ -540,7 +550,7 @@ void arm_boot(void)
*/
imx_remap();
imx_lowputc('M');
PROGRESS('M');
#endif
#ifdef CONFIG_BOOT_SDRAM_DATA
@ -549,7 +559,7 @@ void arm_boot(void)
*/
arm_data_initialize();
imx_lowputc('N');
PROGRESS('N');
#endif
/* Perform board-specific device initialization. This would include
@ -557,7 +567,7 @@ void arm_boot(void)
*/
imx_board_initialize();
imx_lowputc('O');
PROGRESS('O');
#if defined(CONFIG_SMP) && defined(SMP_INTERCPU_NONCACHED)
/* Initialize the uncached, inter-CPU communications area */
@ -567,13 +577,13 @@ void arm_boot(void)
*dest++ = 0;
}
imx_lowputc('P');
PROGRESS('P');
#endif
/* Perform common, low-level chip initialization (might do nothing) */
imx_lowsetup();
imx_lowputc('Q');
PROGRESS('Q');
#ifdef USE_EARLYSERIALINIT
/* Perform early serial initialization if we are going to use the serial
@ -581,7 +591,7 @@ void arm_boot(void)
*/
imx_earlyserialinit();
imx_lowputc('R');
PROGRESS('R');
#endif
/* Now we can enable all other CPUs. The enabled CPUs will start execution
@ -590,6 +600,6 @@ void arm_boot(void)
*/
imx_cpu_enable();
imx_lowputc('S');
imx_lowputc('\n');
PROGRESS('S');
PROGRESS('\n');
}