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drivers: Nxstyle fixes

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Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea 2021-04-01 08:20:14 +02:00 committed by Xiang Xiao
parent b1ca7cf3ce
commit 7a29e1f5fb
17 changed files with 261 additions and 174 deletions
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35
arch/arm/src/kl/kl_cfmconfig.c
View File

@ -2,22 +2,23 @@
* arch/arm/src/kl/kl_cfmconfig.c
* Copyright (c) 2012-2013 Andrew Payne
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
****************************************************************************/
@ -45,9 +46,13 @@ const uint8_t _cfmconfig[16] __attribute__((section(".cfmconfig"))) =
0xff, /* NV_FPROT2: PROT=0xff */
0xff, /* NV_FPROT1: PROT=0xff */
0xff, /* NV_FPROT0: PROT=0xff */
0x7E, /* NV_FSEC: KEYEN=1,MEEN=3,FSLACC=3,SEC=2 */
0x7e, /* NV_FSEC: KEYEN=1,MEEN=3,FSLACC=3,SEC=2 */
0xff, /* NV_FOPT: ??=1,??=1,FAST_INIT=1,LPBOOT1=1,RESET_PIN_CFG=1,
* NMI_DIS=1,EZPORT_DIS=1,LPBOOT0=1 */
0xff,
0xff
};
/****************************************************************************
* Public Functions
****************************************************************************/

63
boards/arm/stm32/olimex-stm32-h407/include/board.h
View File

@ -48,24 +48,26 @@
* a 32kHz RTC backup crystal.
*
* This is the canonical configuration:
* System Clock source : PLL (HSE)
* SYSCLK(Hz) : 168000000 Determined by PLL configuration
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
* HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
* PLLM : 8 (STM32_PLLCFG_PLLM)
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for USB OTG FS, : Enabled
* SDIO and RNG clock
* System Clock source : PLL (HSE)
* SYSCLK(Hz) : 168000000 Determined by PLL configuration
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
* HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
* PLLM : 8 (STM32_PLLCFG_PLLM)
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator output
* voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for
* USB OTG FS,
* SDIO and RNG clock : Enabled
*/
/* HSI - 16 MHz RC factory-trimmed
@ -188,9 +190,11 @@
# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any
* way. The following definitions are used to access individual LEDs.
/* LED definitions **********************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status
* LED in any way.
* The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@ -202,8 +206,9 @@
#define BOARD_LED_STATUS_BIT (1 << BOARD_LED_STATUS)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the
* Olimex STM32-H405. The following definitions describe how NuttX controls the LEDs:
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of
* the Olimex STM32-H405.
* The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED_STATUS on */
@ -215,7 +220,8 @@
#define LED_ASSERTION 6 /* LED_STATUS off */
#define LED_PANIC 7 /* LED_STATUS blinking */
/* Button definitions ***************************************************************/
/* Button definitions *******************************************************/
/* The Olimex STM32-H405 supports one buttons: */
#define BUTTON_BUT 0
@ -223,7 +229,7 @@
#define BUTTON_BUT_BIT (1 << BUTTON_BUT)
/* Alternate function pin selections ************************************************/
/* Alternate function pin selections ****************************************/
/* USART3: */
@ -255,9 +261,10 @@
#define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */
#define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */
/* DMA Channel/Stream Selections *****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* if we set aside more DMA channels/streams.
/* DMA Channel/Stream Selections ********************************************/
/* Stream selections are arbitrary for now but might become important in the
* future if we set aside more DMA channels/streams.
*
* SDIO DMA
* DMAMAP_SDIO_1 = Channel 4, Stream 3

4
boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c
View File

@ -34,8 +34,8 @@
****************************************************************************/
/****************************************************************************
*Included Files
***************************************************************************/
* Included Files
****************************************************************************/
#include "rx65n_macrodriver.h"
#include "arch/board/board.h"

4
boards/renesas/rx65n/rx65n/src/rx65n_main.c
View File

@ -34,8 +34,8 @@
****************************************************************************/
/****************************************************************************
*Included Files
***************************************************************************/
* Included Files
****************************************************************************/
#include "rx65n_macrodriver.h"
#include "arch/board/board.h"

89
drivers/contactless/mfrc522.c
View File

@ -173,7 +173,7 @@ static inline void mfrc522_deselect(struct mfrc522_dev_s *dev)
uint8_t mfrc522_readu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr)
{
uint8_t regval;
uint8_t address = (0x80 | (regaddr & 0x7E));
uint8_t address = (0x80 | (regaddr & 0x7e));
mfrc522_lock(dev->spi);
mfrc522_select(dev);
@ -203,7 +203,7 @@ void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
{
mfrc522_lock(dev->spi);
mfrc522_select(dev);
SPI_SEND(dev->spi, regaddr & 0x7E);
SPI_SEND(dev->spi, regaddr & 0x7e);
SPI_SEND(dev->spi, regval);
mfrc522_deselect(dev);
mfrc522_unlock(dev->spi);
@ -215,8 +215,8 @@ void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
* Name: mfrc522_readblk
*
* Description:
* Read a block of bytes from a register address. Align the bit positions of
* regval[0] from rxalign..7.
* Read a block of bytes from a register address. Align the bit positions
* of regval[0] from rxalign..7.
*
* Input Parameters:
*
@ -228,7 +228,7 @@ void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
FAR uint8_t *regval, int length, uint8_t rxalign)
{
uint8_t i = 0;
uint8_t address = (0x80 | (regaddr & 0x7E));
uint8_t address = (0x80 | (regaddr & 0x7e));
mfrc522_lock(dev->spi);
mfrc522_select(dev);
@ -264,10 +264,13 @@ void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
regval[i] = SPI_SEND(dev->spi, address);
}
i++;
}
/* Read the last byte. Send 0 to stop reading (it maybe wrong, 1 byte out) */
/* Read the last byte.
* Send 0 to stop reading (it maybe wrong, 1 byte out)
*/
regval[i] = SPI_SEND(dev->spi, 0);
@ -292,7 +295,7 @@ void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
void mfrc522_writeblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr,
uint8_t *regval, int length)
{
uint8_t address = (regaddr & 0x7E);
uint8_t address = (regaddr & 0x7e);
mfrc522_lock(dev->spi);
mfrc522_select(dev);
@ -493,7 +496,8 @@ int mfrc522_comm_picc(FAR struct mfrc522_dev_s *dev, uint8_t command,
clock_gettime(CLOCK_REALTIME, &tend);
if ((tend.tv_sec > tstart.tv_sec) && (tend.tv_nsec > tstart.tv_nsec))
if ((tend.tv_sec > tstart.tv_sec) &&
(tend.tv_nsec > tstart.tv_nsec))
{
return -ETIMEDOUT;
}
@ -545,7 +549,8 @@ int mfrc522_comm_picc(FAR struct mfrc522_dev_s *dev, uint8_t command,
/* Read the data from FIFO */
mfrc522_readblk(dev, MFRC522_FIFO_DATA_REG, back_data, nbytes, rxalign);
mfrc522_readblk(dev,
MFRC522_FIFO_DATA_REG, back_data, nbytes, rxalign);
/* RxLastBits[2:0] indicates the number of valid bits received */
@ -608,15 +613,17 @@ int mfrc522_comm_picc(FAR struct mfrc522_dev_s *dev, uint8_t command,
*
****************************************************************************/
int mfrc522_transcv_data(FAR struct mfrc522_dev_s *dev, uint8_t *senddata,
uint8_t sendlen, uint8_t *backdata, uint8_t *backlen,
uint8_t *validbits, uint8_t rxalign, bool check_crc)
int mfrc522_transcv_data(FAR struct mfrc522_dev_s *dev,
uint8_t *senddata, uint8_t sendlen,
uint8_t *backdata, uint8_t *backlen,
uint8_t *validbits, uint8_t rxalign,
bool check_crc)
{
uint8_t waitirq = MFRC522_RX_IRQ | MFRC522_IDLE_IRQ;
return mfrc522_comm_picc(dev, MFRC522_TRANSCV_CMD, waitirq, senddata,
sendlen, backdata, backlen, validbits, rxalign,
check_crc);
sendlen, backdata, backlen,
validbits, rxalign, check_crc);
}
/****************************************************************************
@ -649,8 +656,8 @@ int mfrc522_picc_reqa_wupa(FAR struct mfrc522_dev_s *dev, uint8_t command,
mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL);
validbits = 7;
status = mfrc522_transcv_data(dev, &command, 1, buffer, &length, &validbits,
0, false);
status = mfrc522_transcv_data(dev, &command, 1, buffer,
&length, &validbits, 0, false);
/* For REQA and WUPA we need to transmit only 7 bits */
@ -674,8 +681,8 @@ int mfrc522_picc_reqa_wupa(FAR struct mfrc522_dev_s *dev, uint8_t command,
* Name: mfrc522_picc_request_a
*
* Description:
* Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to
* READY and prepare for anticollision or selection.
* Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go
* to READY and prepare for anticollision or selection.
*
* Input Parameters:
*
@ -737,7 +744,9 @@ int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
uint8_t value;
uint8_t count;
/* The first index in uid->data[] that is used in the current Cascade Level */
/* The first index in uid->data[] that is used in the current Cascade
* Level
*/
uint8_t uid_index;
@ -774,7 +783,8 @@ int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
/* Force clear of received bits if a collision is detected */
value = mfrc522_readu8(dev, MFRC522_COLL_REG);
mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL);
mfrc522_writeu8(dev,
MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL);
/* Repeat cascade level loop until we have a complete UID */
@ -783,8 +793,8 @@ int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
{
uint8_t bytes_to_copy;
/* Set the Cascade Level in the SEL byte, find out if we need to use the
* Cascade Tag in byte 2.
/* Set the Cascade Level in the SEL byte, find out if we need to use
* the Cascade Tag in byte 2.
*/
switch (cascade_level)
@ -857,8 +867,8 @@ int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
}
}
/* Now that the data has been copied we need to include the 8 bits in CT
* in curr_level_known_bits.
/* Now that the data has been copied we need to include the 8 bits in
* CT in curr_level_known_bits.
*/
if (use_cascade_tag)
@ -900,8 +910,8 @@ int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
txlastbits = 0; /* 0 => All 8 bits are valid. */
buffer_used = 9;
/* Store response in the last 3 bytes of buffer (BCC and CRC_A -
* not needed after tx).
/* Store response in the last 3 bytes of buffer
* (BCC and CRC_A - not needed after tx).
*/
resp_buf = &buffer[6];
@ -937,9 +947,9 @@ int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
/* Transmit the buffer and receive the response */
result = mfrc522_transcv_data(dev, buffer, buffer_used, resp_buf,
&resp_len, &txlastbits, rxalign,
false);
result = mfrc522_transcv_data(dev, buffer, buffer_used,
resp_buf, &resp_len,
&txlastbits, rxalign, false);
/* More than one PICC in the field => collision */
@ -957,7 +967,7 @@ int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev,
return -EBUSY;
}
coll_pos = coll_reg & 0x1F; /* Values 0-31, 0 means bit 32. */
coll_pos = coll_reg & 0x1f; /* Values 0-31, 0 means bit 32. */
if (coll_pos == 0)
{
coll_pos = 32;
@ -1191,8 +1201,10 @@ void mfrc522_setantennagain(FAR struct mfrc522_dev_s *dev, uint8_t mask)
if ((value = mfrc522_getantennagain(dev)) != mask)
{
mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, value & ~MFRC522_RX_GAIN_MASK);
mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, mask & MFRC522_RX_GAIN_MASK);
mfrc522_writeu8(dev,
MFRC522_RF_CFG_REG, value & ~MFRC522_RX_GAIN_MASK);
mfrc522_writeu8(dev,
MFRC522_RF_CFG_REG, mask & MFRC522_RX_GAIN_MASK);
}
}
@ -1274,12 +1286,12 @@ void mfrc522_init(FAR struct mfrc522_dev_s *dev)
* f_timer=40kHz, then the timer period will be 25us.
*/
mfrc522_writeu8(dev, MFRC522_TPRESCALER_REG, 0xA9);
mfrc522_writeu8(dev, MFRC522_TPRESCALER_REG, 0xa9);
/* Reload timer with 0x3E8 = 1000, ie 25ms before timeout. */
mfrc522_writeu8(dev, MFRC522_TRELOAD_REGH, 0x06);
mfrc522_writeu8(dev, MFRC522_TRELOAD_REGL, 0xE8);
mfrc522_writeu8(dev, MFRC522_TRELOAD_REGL, 0xe8);
/* Force 100% ASK modulation independent of the ModGsPReg setting */
@ -1287,7 +1299,7 @@ void mfrc522_init(FAR struct mfrc522_dev_s *dev)
/* Set the preset value for the CRC to 0x6363 (ISO 14443-3 part 6.2.4) */
mfrc522_writeu8(dev, MFRC522_MODE_REG, 0x3D);
mfrc522_writeu8(dev, MFRC522_MODE_REG, 0x3d);
/* Enable the Antenna pins */
@ -1316,6 +1328,7 @@ int mfrc522_selftest(FAR struct mfrc522_dev_s *dev)
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0
};
char outbuf[3 * 8 + 1];
uint8_t result[64];
int i;
@ -1560,12 +1573,14 @@ static int mfrc522_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case CLIOC_READ_MIFARE_DATA:
{
FAR struct mifare_tag_data_s *data = (struct mifare_tag_data_s *)arg;
FAR struct mifare_tag_data_s *data =
(struct mifare_tag_data_s *)arg;
/* We assume that tag is selected!
*
* TODO: authentication for MIFARE Classic.
* Without authentication this will works only for MIFARE Ultralight.
* Without authentication this will works only for MIFARE
* Ultralight.
*/
ret = mfrc522_mifare_read(dev, data);

10
drivers/power/activity_governor.h
View File

@ -33,9 +33,9 @@
****************************************************************************/
/* CONFIG_PM_GOVERNOR_SLICEMS. The activity based governor collects activity
* counts in time slices. At the end of the time slice, the count accumulated
* during that interval is applied to an averaging algorithm to determine
* the activity level.
* counts in time slices. At the end of the time slice, the count
* accumulated during that interval is applied to an averaging algorithm to
* determine the activity level.
*
* CONFIG_PM_GOVERNOR_SLICEMS provides the duration of that time slice in
* milliseconds. Default: 100 Milliseconds
@ -51,8 +51,8 @@
/* The averaging algorithm is simply: Y = (An*X + SUM(Ai*Yi))/SUM(Aj), where
* i = 1..n-1 and j= 1..n, n is the length of the "memory", Ai is the
* weight applied to each value, and X is the current activity. These weights
* may be negative and a limited to the range of int16_t.
* weight applied to each value, and X is the current activity. These
* weights may be negative and a limited to the range of int16_t.
*
* CONFIG_PM_GOVERNOR_MEMORY:
* provides the memory for the algorithm. Default: 2

5
drivers/power/greedy_governor.c
View File

@ -55,7 +55,7 @@
static void greedy_governor_initialize(void);
static void greedy_governor_statechanged(int domain,
enum pm_state_e newstate);
enum pm_state_e newstate);
static enum pm_state_e greedy_governor_checkstate(int domain);
/****************************************************************************
@ -95,7 +95,8 @@ static void greedy_governor_initialize(void)
* Name: greedy_governor_statechanged
****************************************************************************/
static void greedy_governor_statechanged(int domain, enum pm_state_e newstate)
static void greedy_governor_statechanged(int domain,
enum pm_state_e newstate)
{
/* no need to react to state changes */

4
drivers/power/pm.h
View File

@ -123,9 +123,9 @@ extern "C"
EXTERN struct pm_global_s g_pmglobals;
/*****************************************************************************
/****************************************************************************
* Public Function Prototypes
*****************************************************************************/
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)

13
drivers/power/pm_activity.c
View File

@ -44,9 +44,9 @@
*
* Description:
* This function is called by a device driver to indicate that it is
* performing meaningful activities (non-idle). This increments an activity
* count and/or will restart a idle timer and prevent entering reduced
* power states.
* performing meaningful activities (non-idle). This increments an
* activity count and/or will restart a idle timer and prevent entering
* reduced power states.
*
* Input Parameters:
* domain - The domain of the PM activity
@ -54,8 +54,9 @@
* higher priorities. Higher priority activity can prevent the system
* from entering reduced power states for a longer period of time.
*
* As an example, a button press might be higher priority activity because
* it means that the user is actively interacting with the device.
* As an example, a button press might be higher priority activity
* because it means that the user is actively interacting with the
* device.
*
* Returned Value:
* None.
@ -86,7 +87,7 @@ void pm_activity(int domain, int priority)
* domain - The domain of the PM activity
* state - The state want to stay.
*
* As an example, media player might stay in normal state during playback.
* As an example, media player might stay in normal state during playback.
*
* Returned Value:
* None.

10
drivers/power/pm_checkstate.c
View File

@ -43,11 +43,11 @@
*
* Description:
* This function is called from the MCU-specific IDLE loop to monitor the
* the power management conditions. This function returns the "recommended"
* power management state based on the PM policy applied by the currently
* chosen governor. The IDLE loop must call pm_changestate() in order to
* make the state change, which will interact with all drivers registered
* with the PM system.
* the power management conditions. This function returns the
* "recommended" power management state based on the PM policy applied by
* the currently chosen governor. The IDLE loop must call pm_changestate()
* in order to make the state change, which will interact with all drivers
* registered with the PM system.
*
* These two steps are separated because the plaform-specific IDLE loop may
* have additional situational information that is not available to the

25
drivers/sensors/bmg160.c
View File

@ -138,7 +138,9 @@ static struct bmg160_dev_s *g_bmg160_list = NULL;
static void bmg160_read_register(FAR struct bmg160_dev_s *dev,
uint8_t const reg_addr, uint8_t * reg_data)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -173,7 +175,9 @@ static void bmg160_write_register(FAR struct bmg160_dev_s *dev,
uint8_t const reg_addr,
uint8_t const reg_data)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -257,7 +261,9 @@ static void bmg160_read_gyroscope_data(FAR struct bmg160_dev_s *dev,
uint16_t * x_gyr, uint16_t * y_gyr,
uint16_t * z_gyr)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -311,8 +317,8 @@ static int bmg160_interrupt_handler(int irq, FAR void *context)
DEBUGASSERT(priv != NULL);
/* Task the worker with retrieving the latest sensor data. We should not do
* this in a interrupt since it might take too long. Also we cannot lock the
* SPI bus from within an interrupt.
* this in a interrupt since it might take too long. Also we cannot lock
* the SPI bus from within an interrupt.
*/
DEBUGASSERT(priv->work.worker == NULL);
@ -364,7 +370,8 @@ static int bmg160_open(FAR struct file *filep)
bmg160_write_register(priv,
BMG160_RANGE_REG,
BMG160_RANGE_REG_FIX_VAL_bm | BMG160_RANGE_REG_FSR_1_bm |
BMG160_RANGE_REG_FIX_VAL_bm |
BMG160_RANGE_REG_FSR_1_bm |
BMG160_RANGE_REG_FSR_0_bm);
/* Enable - the fastest data output rate ODR = 2000 Hz -> BW = 230 Hz */
@ -379,7 +386,8 @@ static int bmg160_open(FAR struct file *filep)
/* Enable - active high level interrupt 1 - push-pull interrupt */
bmg160_write_register(priv,
BMG160_INT_EN_1_REG, BMG160_INT_EN_1_REG_INT1_LVL_bm);
BMG160_INT_EN_1_REG,
BMG160_INT_EN_1_REG_INT1_LVL_bm);
/* Enable - map new data interrupt to INT1 */
@ -450,7 +458,8 @@ static ssize_t bmg160_read(FAR struct file *filep, FAR char *buffer,
if (buflen < sizeof(FAR struct bmg160_sensor_data_s))
{
snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
snerr("ERROR: "
"Not enough memory for reading out a sensor data sample\n");
return -ENOSYS;
}

18
drivers/sensors/isl29023.c
View File

@ -96,7 +96,8 @@ static int isl29023_read_reg(FAR struct isl29023_dev_s *dev,
const uint8_t regaddr, uint8_t *buffer, size_t buflen);
static int isl29023_read_lux(FAR struct isl29023_dev_s *dev,
FAR struct isl29023_data_s *data);
static int isl29023_set_op_mode(FAR struct isl29023_dev_s *dev, uint8_t mode);
static int isl29023_set_op_mode(FAR struct isl29023_dev_s *dev,
uint8_t mode);
static int isl29023_set_resolution(FAR struct isl29023_dev_s *dev,
uint8_t res_mode);
static int isl29023_set_range(FAR struct isl29023_dev_s *dev,
@ -106,11 +107,14 @@ static int isl29023_set_range(FAR struct isl29023_dev_s *dev,
static int isl29023_open(FAR struct file *filep);
static int isl29023_close(FAR struct file *filep);
static ssize_t isl29023_read(FAR struct file *filep, FAR char *buffer,
static ssize_t isl29023_read(FAR struct file *filep,
FAR char *buffer,
size_t buflen);
static ssize_t isl29023_write(FAR struct file *filep, FAR const char *buffer,
static ssize_t isl29023_write(FAR struct file *filep,
FAR const char *buffer,
size_t buflen);
static int isl29023_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
static int isl29023_ioctl(FAR struct file *filep,
int cmd, unsigned long arg);
/****************************************************************************
* Private Data
@ -196,7 +200,8 @@ static int isl29023_i2c_read(FAR struct isl29023_dev_s *dev,
****************************************************************************/
static int isl29023_read_reg(FAR struct isl29023_dev_s *dev,
const uint8_t regaddr, uint8_t *buffer, size_t buflen)
const uint8_t regaddr, uint8_t *buffer,
size_t buflen)
{
int ret;
@ -462,7 +467,8 @@ int isl29023_register(FAR const char *devpath, FAR struct i2c_master_s *i2c,
FAR struct isl29023_dev_s *priv;
int ret;
priv = (FAR struct isl29023_dev_s *)kmm_malloc(sizeof(struct isl29023_dev_s));
priv = (FAR struct isl29023_dev_s *)
kmm_malloc(sizeof(struct isl29023_dev_s));
if (priv == NULL)
{
snerr("ERROR: Failed to allocate instance\n");

11
drivers/sensors/lis331dl.c
View File

@ -243,13 +243,15 @@ FAR struct lis331dl_dev_s *lis331dl_init(FAR struct i2c_master_s *i2c,
if (lis331dl_access(dev, ST_LIS331DL_WHOAMI, &retval, 1) > 0)
{
/* Check chip identification, in the future several more compatible parts
* may be added here.
/* Check chip identification, in the future several more compatible
* parts may be added here.
*/
if (retval == ST_LIS331DL_WHOAMI_VALUE)
{
/* Copy LIS331DL registers to our private structure and power-up device */
/* Copy LIS331DL registers to our private structure and power-up
* device
*/
if (lis331dl_readregs(dev) == OK && lis331dl_powerup(dev) == OK)
{
@ -321,7 +323,8 @@ int lis331dl_powerdown(FAR struct lis331dl_dev_s * dev)
* Name: lis331dl_setconversion
****************************************************************************/
int lis331dl_setconversion(FAR struct lis331dl_dev_s * dev, bool full, bool fast)
int lis331dl_setconversion(FAR struct lis331dl_dev_s * dev,
bool full, bool fast)
{
dev->cr1 = ST_LIS331DL_CR1_PD |
(full ? ST_LIS331DL_CR1_FS : 0) | (fast ? ST_LIS331DL_CR1_DR : 0) |

77
drivers/sensors/lis3mdl.c
View File

@ -70,7 +70,8 @@ struct lis3mdl_dev_s
****************************************************************************/
static void lis3mdl_read_register(FAR struct lis3mdl_dev_s *dev,
uint8_t const reg_addr, uint8_t * reg_data);
uint8_t const reg_addr,
uint8_t * reg_data);
static void lis3mdl_write_register(FAR struct lis3mdl_dev_s *dev,
uint8_t const reg_addr,
uint8_t const reg_data);
@ -87,9 +88,11 @@ static void lis3mdl_worker(FAR void *arg);
static int lis3mdl_open(FAR struct file *filep);
static int lis3mdl_close(FAR struct file *filep);
static ssize_t lis3mdl_read(FAR struct file *, FAR char *, size_t);
static ssize_t lis3mdl_write(FAR struct file *filep, FAR const char *buffer,
static ssize_t lis3mdl_write(FAR struct file *filep,
FAR const char *buffer,
size_t buflen);
static int lis3mdl_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
static int lis3mdl_ioctl(FAR struct file *filep,
int cmd, unsigned long arg);
/****************************************************************************
* Private Data
@ -124,7 +127,9 @@ static struct lis3mdl_dev_s *g_lis3mdl_list = 0;
static void lis3mdl_read_register(FAR struct lis3mdl_dev_s *dev,
uint8_t const reg_addr, uint8_t * reg_data)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -132,8 +137,8 @@ static void lis3mdl_read_register(FAR struct lis3mdl_dev_s *dev,
SPI_SELECT(dev->spi, dev->config->spi_devid, true);
/* Transmit the register address from where we want to read - the MSB needs
* to be set to indicate the read indication.
/* Transmit the register address from where we want to read - the MSB
* needs to be set to indicate the read indication.
*/
SPI_SEND(dev->spi, reg_addr | 0x80);
@ -159,7 +164,9 @@ static void lis3mdl_write_register(FAR struct lis3mdl_dev_s *dev,
uint8_t const reg_addr,
uint8_t const reg_data)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -191,7 +198,8 @@ static void lis3mdl_write_register(FAR struct lis3mdl_dev_s *dev,
static void lis3mdl_reset(FAR struct lis3mdl_dev_s *dev)
{
lis3mdl_write_register(dev,
LIS3MDL_CTRL_REG_2, LIS3MDL_CTRL_REG_2_SOFT_RST_bm);
LIS3MDL_CTRL_REG_2,
LIS3MDL_CTRL_REG_2_SOFT_RST_bm);
up_mdelay(100);
}
@ -250,7 +258,9 @@ static void lis3mdl_read_magnetic_data(FAR struct lis3mdl_dev_s *dev,
uint16_t * x_mag, uint16_t * y_mag,
uint16_t * z_mag)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -258,9 +268,9 @@ static void lis3mdl_read_magnetic_data(FAR struct lis3mdl_dev_s *dev,
SPI_SELECT(dev->spi, dev->config->spi_devid, true);
/* Transmit the register address from where we want to start reading 0x80 ->
* MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is set -> auto
* increment of address when reading multiple bytes.
/* Transmit the register address from where we want to start reading
* 0x80 -> MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is
* set -> auto increment of address when reading multiple bytes.
*/
SPI_SEND(dev->spi, (LIS3MDL_OUT_X_L_REG | 0x80 | 0x40)); /* RX */
@ -289,7 +299,9 @@ static void lis3mdl_read_magnetic_data(FAR struct lis3mdl_dev_s *dev,
static void lis3mdl_read_temperature(FAR struct lis3mdl_dev_s *dev,
uint16_t * temperature)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -297,9 +309,9 @@ static void lis3mdl_read_temperature(FAR struct lis3mdl_dev_s *dev,
SPI_SELECT(dev->spi, dev->config->spi_devid, true);
/* Transmit the register address from where we want to start reading 0x80 ->
* MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is set -> auto
* increment of address when reading multiple bytes.
/* Transmit the register address from where we want to start reading
* 0x80 -> MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is
* set -> auto increment of address when reading multiple bytes.
*/
SPI_SEND(dev->spi, (LIS3MDL_TEMP_OUT_L_REG | 0x80 | 0x40));
@ -324,8 +336,8 @@ static void lis3mdl_read_temperature(FAR struct lis3mdl_dev_s *dev,
static int lis3mdl_interrupt_handler(int irq, FAR void *context)
{
/* This function should be called upon a rising edge on the LIS3MDL DRDY pin
* since it signals that new data has been measured.
/* This function should be called upon a rising edge on the LIS3MDL DRDY
* pin since it signals that new data has been measured.
*/
FAR struct lis3mdl_dev_s *priv = 0;
@ -338,8 +350,8 @@ static int lis3mdl_interrupt_handler(int irq, FAR void *context)
DEBUGASSERT(priv != NULL);
/* Task the worker with retrieving the latest sensor data. We should not do
* this in a interrupt since it might take too long. Also we cannot lock the
* SPI bus from within an interrupt.
* this in a interrupt since it might take too long. Also we cannot lock
* the SPI bus from within an interrupt.
*/
DEBUGASSERT(priv->work.worker == NULL);
@ -395,19 +407,20 @@ static int lis3mdl_open(FAR struct file *filep)
LIS3MDL_CTRL_REG_2_FS_1_bm |
LIS3MDL_CTRL_REG_2_FS_0_bm);
/* Enable - temperature sensor - ultra high performance mode (UMP) for X and
* Y - fast output data rates This results in a output data rate of 155 Hz
* for X and Y.
/* Enable - temperature sensor - ultra high performance mode (UMP) for X
* and Y - fast output data rates This results in a output data rate of
* 155 Hz for X and Y.
*/
lis3mdl_write_register(priv,
LIS3MDL_CTRL_REG_1,
LIS3MDL_CTRL_REG_1_TEMP_EN_bm |
LIS3MDL_CTRL_REG_1_OM_1_bm | LIS3MDL_CTRL_REG_1_OM_0_bm
| LIS3MDL_CTRL_REG_1_FAST_ODR_bm);
LIS3MDL_CTRL_REG_1_OM_1_bm |
LIS3MDL_CTRL_REG_1_OM_0_bm |
LIS3MDL_CTRL_REG_1_FAST_ODR_bm);
/* Enable * - ultra high performance mode (UMP) for Z * This should result to
* the same output data rate as for X and Y.
/* Enable * - ultra high performance mode (UMP) for Z * This should result
* to the same output data rate as for X and Y.
*/
lis3mdl_write_register(priv,
@ -419,7 +432,9 @@ static int lis3mdl_open(FAR struct file *filep)
* prevent race conditions when reading sensor data.
*/
lis3mdl_write_register(priv, LIS3MDL_CTRL_REG_5, LIS3MDL_CTRL_REG_5_BDU_bm);
lis3mdl_write_register(priv,
LIS3MDL_CTRL_REG_5,
LIS3MDL_CTRL_REG_5_BDU_bm);
/* Enable continuous conversion mode - the device starts measuring now. */
@ -482,7 +497,8 @@ static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer,
if (buflen < sizeof(FAR struct lis3mdl_sensor_data_s))
{
snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
snerr("ERROR: "
"Not enough memory for reading out a sensor data sample\n");
return -ENOSYS;
}
@ -578,7 +594,8 @@ int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
/* Initialize the LIS3MDL device structure */
priv = (FAR struct lis3mdl_dev_s *)kmm_malloc(sizeof(struct lis3mdl_dev_s));
priv = (FAR struct lis3mdl_dev_s *)
kmm_malloc(sizeof(struct lis3mdl_dev_s));
if (priv == NULL)
{
snerr("ERROR: Failed to allocate instance\n");

14
drivers/sensors/mcp9844.c
View File

@ -267,11 +267,16 @@ static int mcp9844_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
raw_temperature &= 0x0fff; /* 0x0fff = 0b 0000 1111 1111 1111 */
/* The post comma temperature value is encoded in BIT3 to BIT0 */
/* The post comma temperature value is encoded in BIT3 to
* BIT0
*/
temp_result->temp_post_comma = (uint8_t)(raw_temperature & 0x000f);
temp_result->temp_post_comma =
(uint8_t)(raw_temperature & 0x000f);
/* The pre comma temperature value is encoded in BIT11 to BIT4 */
/* The pre comma temperature value is encoded in BIT11 to
* BIT4
*/
temp_result->temp_pre_comma = (int8_t)(raw_temperature >> 4);
}
@ -365,7 +370,8 @@ static int mcp9844_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
*
* Input Parameters:
* devpath - The full path to the driver to register. E.g., "/dev/temp0"
* i2c - An instance of the I2C interface to use to communicate with MCP9844
* i2c - An instance of the I2C interface to use to communicate with
* MCP9844
* addr - The I2C address of the MCP9844.
*
* Returned Value:

51
drivers/sensors/mlx90393.c
View File

@ -75,7 +75,8 @@ struct mlx90393_dev_s
static void mlx90393_start_burst_mode(FAR struct mlx90393_dev_s *dev);
static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev);
static void mlx90393_read_register(FAR struct mlx90393_dev_s *dev,
uint8_t const reg_addr, uint16_t *reg_data);
uint8_t const reg_addr,
uint16_t *reg_data);
static void mlx90393_write_register(FAR struct mlx90393_dev_s *dev,
uint8_t const reg_addr,
uint16_t const reg_data);
@ -86,9 +87,12 @@ static void mlx90393_worker(FAR void *arg);
static int mlx90393_open(FAR struct file *filep);
static int mlx90393_close(FAR struct file *filep);
static ssize_t mlx90393_read(FAR struct file *, FAR char *, size_t);
static ssize_t mlx90393_write(FAR struct file *filep, FAR const char *buffer,
static ssize_t mlx90393_write(FAR struct file *filep,
FAR const char *buffer,
size_t buflen);
static int mlx90393_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
static int mlx90393_ioctl(FAR struct file *filep,
int cmd,
unsigned long arg);
/****************************************************************************
* Private Data
@ -122,7 +126,9 @@ static struct mlx90393_dev_s *g_mlx90393_list = NULL;
static void mlx90393_start_burst_mode(FAR struct mlx90393_dev_s *dev)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -155,7 +161,9 @@ static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev)
{
int ret;
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -227,7 +235,9 @@ static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev)
static void mlx90393_reset(FAR struct mlx90393_dev_s *dev)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -261,9 +271,12 @@ static void mlx90393_reset(FAR struct mlx90393_dev_s *dev)
****************************************************************************/
static void mlx90393_read_register(FAR struct mlx90393_dev_s *dev,
uint8_t const reg_addr, uint16_t *reg_data)
uint8_t const reg_addr,
uint16_t *reg_data)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -303,7 +316,9 @@ static void mlx90393_write_register(FAR struct mlx90393_dev_s *dev,
uint8_t const reg_addr,
uint16_t const reg_data)
{
/* Lock the SPI bus so that only one device can access it at the same time */
/* Lock the SPI bus so that only one device can access it at the same
* time
*/
SPI_LOCK(dev->spi, true);
@ -346,8 +361,8 @@ static void mlx90393_write_register(FAR struct mlx90393_dev_s *dev,
static int mlx90393_interrupt_handler(int irq, FAR void *context)
{
/* This function should be called upon a rising edge on the MLX90393 INT pin
* since it signals that new data has been measured. (INT = DRDY).
/* This function should be called upon a rising edge on the MLX90393 INT
* pin since it signals that new data has been measured. (INT = DRDY).
*/
FAR struct mlx90393_dev_s *priv = 0;
@ -360,8 +375,8 @@ static int mlx90393_interrupt_handler(int irq, FAR void *context)
DEBUGASSERT(priv != NULL);
/* Task the worker with retrieving the latest sensor data. We should not do
* this in a interrupt since it might take too long. Also we cannot lock the
* SPI bus from within an interrupt.
* this in a interrupt since it might take too long. Also we cannot lock
* the SPI bus from within an interrupt.
*/
DEBUGASSERT(priv->work.worker == NULL);
@ -462,7 +477,8 @@ static ssize_t mlx90393_read(FAR struct file *filep, FAR char *buffer,
if (buflen < sizeof(FAR struct mlx90393_sensor_data_s))
{
snerr("ERROR: Not enough memory for reading out a sensor data sample\n");
snerr("ERROR: "
"Not enough memory for reading out a sensor data sample\n");
return -ENOSYS;
}
@ -557,7 +573,8 @@ int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
/* Initialize the MLX90393 device structure */
priv = (FAR struct mlx90393_dev_s *)kmm_malloc(sizeof(struct mlx90393_dev_s));
priv = (FAR struct mlx90393_dev_s *)
kmm_malloc(sizeof(struct mlx90393_dev_s));
if (priv == NULL)
{
snerr("ERROR: Failed to allocate instance\n");
@ -597,8 +614,8 @@ int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
return -ENODEV;
}
/* Since we support multiple MLX90393 devices are supported, we will need to
* add this new instance to a list of device instances so that it can be
/* Since we support multiple MLX90393 devices are supported, we will need
* to add this new instance to a list of device instances so that it can be
* found by the interrupt handler based on the received IRQ number.
*/

2
drivers/wireless/nrf24l01.h
View File

@ -156,7 +156,7 @@ extern "C"
#endif
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN