After cached related fix, the ELF example is now functional

This commit is contained in:
Gregory Nutt 2014-08-24 14:12:45 -06:00
parent a8034f495f
commit 7aea220ebf
10 changed files with 153 additions and 15 deletions

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@ -130,6 +130,10 @@ config ARCH_L2CACHE
bool
default n
config ARCH_HAVE_COHERENT_DCACHE
bool
default n
config CUSTOM_STACK
bool
default n

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@ -212,12 +212,14 @@ config ARCH_CORTEXA5
default n
select ARCH_HAVE_IRQPRIO
select ARCH_HAVE_MMU
select ARCH_HAVE_COHERENT_DCACHE if ELF
config ARCH_CORTEXA8
bool
default n
select ARCH_HAVE_IRQPRIO
select ARCH_HAVE_MMU
select ARCH_HAVE_COHERENT_DCACHE if ELF
config ARCH_FAMILY
string

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@ -87,7 +87,7 @@ CMN_CSRCS += arm_addrenv.c
endif
ifeq ($(CONFIG_ELF),y)
CMN_CSRCS += arm_elf.c
CMN_CSRCS += arm_elf.c arch_coherent_dcache.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)

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@ -9,7 +9,8 @@ config ARMV7A_HAVE_L2CC
bool
default n
---help---
Selected by the configuration tool if the architecutre supports any kind of L2 cache.
Selected by the configuration tool if the architecutre supports any
kind of L2 cache.
config ARMV7A_HAVE_L2CC_PL310
bool

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@ -0,0 +1,94 @@
/****************************************************************************
* arch/arm/src/armv7/arch_undefinedinsn.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include "cp15_cacheops.h"
#include <nuttx/binfmt/elf.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arch_coherent_dcache
*
* Description:
* Ensure that the I and D caches are coherent within specified region
* by cleaning the D cache (i.e., flushing the D cache contents to memory
* and invalidating the I cache. This is typically used when code has been
* written to a memory region, and will be executed.
*
* Input Parameters:
* addr - virtual start address of region
* len - Size of the address region in bytes
*
* Returned Value:
* None
*
****************************************************************************/
void arch_coherent_dcache(uintptr_t addr, size_t len)
{
/* Perform the operation on the L1 cache */
cp15_coherent_dcache(addr, addr+len);
#ifdef CONFIG_ARCH_L2CACHE
/* If we have an L2 cache, then there more things that need to done */
# warning This is insufficient
#endif
}

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@ -89,7 +89,7 @@ CMN_CSRCS += arm_addrenv.c
endif
ifeq ($(CONFIG_ELF),y)
CMN_CSRCS += arm_elf.c
CMN_CSRCS += arm_elf.c arch_coherent_dcache.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)

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@ -257,7 +257,7 @@ static int elf_loadbinary(struct binary_s *binp)
#endif
elf_dumpbuffer("Entry code", (FAR const uint8_t*)binp->entrypt,
MIN(loadinfo.elfsize - loadinfo.ehdr.e_entry, 512));
MIN(loadinfo.textsize - loadinfo.ehdr.e_entry, 512));
elf_uninit(&loadinfo);
return OK;

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@ -1,7 +1,7 @@
/****************************************************************************
* binfmt/libelf/libelf_bind.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -323,10 +323,13 @@ int elf_bind(FAR struct elf_loadinfo_s *loadinfo,
}
}
/* Flush the instruction cache before starting the newly loaded module */
#ifdef CONFIG_ARCH_HAVE_COHERENT_DCACHE
/* Ensure that the I and D caches are coherent before starting the newly
* loaded module by cleaning the D cache (i.e., flushing the D cache
* contents to memory and invalidating the I cache.
*/
#ifdef CONFIG_ELF_ICACHE
arch_flushicache((FAR void*)loadinfo->textalloc, loadinfo->textsize);
arch_coherent_dcache(loadinfo->textalloc, loadinfo->textsize);
#endif
return ret;

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@ -3525,6 +3525,7 @@ Configurations
dramboot: This is a little program to help debug of code in DRAM. See
the description below and the section above entitled "Creating and
Using DRAMBOOT" for more information
elf: Demonstrates execution of ELF file from a file system.
nsh: This is an NuttShell (NSH) configuration that supports extensive
functionality as possible (unlike the minimal ramtest configuration).
See the detailed description below for a summary of the feature
@ -3653,6 +3654,36 @@ Configurations
putting DRAMBOOT on a microSD card (as boot.bin). The RomBOOT loader does
boot that image without issue.
elf:
Demonstrates execution of ELF file from a file system using
apps/examples/elf. This is a very simple configuration so there is not
really much that needs to be said.
NOTES:
1. This configuration uses the the USART3 for the serial console
which is available at the "DBGU" RS-232 connector (J24). That
is easily changed by reconfiguring to (1) enable a different
serial peripheral, and (2) selecting that serial peripheral as
the console device.
2. By default, this configuration is set up to build on Windows
under either a Cygwin or MSYS environment using a recent, Windows-
native, generic ARM EABI GCC toolchain (such as the CodeSourcery
toolchain). Both the build environment and the toolchain
selection can easily be changed by reconfiguring:
CONFIG_HOST_WINDOWS=y : Windows operating system
CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
If you are running on Linux, make *certain* that you have
CONFIG_HOST_LINUX=y *before* the first make or you will create a
corrupt configuration that may not be easy to recover from. See
the warning in the section "Information Common to All Configurations"
for further information.
nsh:
This configuration directory provide the NuttShell (NSH). This is a

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@ -315,22 +315,25 @@ int arch_relocateadd(FAR const Elf32_Rela *rel,
FAR const Elf32_Sym *sym, uintptr_t addr);
/****************************************************************************
* Name: arch_flushicache
* Name: arch_coherent_dcache
*
* Description:
* Flush the instruction cache.
* Ensure that the I and D caches are coherent within specified region
* by cleaning the D cache (i.e., flushing the D cache contents to memory
* and invalidating the I cache. This is typically used when code has been
* written to a memory region, and will be executed.
*
* Input Parameters:
* addr - Start address to flush
* len - Number of bytes to flush
* addr - virtual start address of region
* len - Size of the address region in bytes
*
* Returned Value:
* True if the architecture supports this ELF file.
* None
*
****************************************************************************/
#ifdef CONFIG_ELF_ICACHE
bool arch_flushicache(FAR void *addr, size_t len);
#ifdef CONFIG_ARCH_HAVE_COHERENT_DCACHE
void arch_coherent_dcache(uintptr_t addr, size_t len);
#endif
#undef EXTERN