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xtensa_user_handler: Fix registers in comments

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YAMAMOTO Takashi 2020-03-16 14:15:14 +09:00 committed by Xiang Xiao
parent 2dec43aa06
commit 7aebcc4bf6
1 changed files with 3 additions and 3 deletions
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6
arch/xtensa/src/common/xtensa_user_handler.S
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@ -337,7 +337,7 @@ _xtensa_syscall_handler:
mov a3, sp /* Argument 2: Top of stack = register save area */ mov a3, sp /* Argument 2: Top of stack = register save area */
call0 xtensa_irq_dispatch /* Call xtensa_int_decode */ call0 xtensa_irq_dispatch /* Call xtensa_int_decode */
/* On return from xtensa_irq_dispatch, a2 will contain the address of the new /* On return from xtensa_irq_dispatch, A2 will contain the address of the new
* register save area. Usually this would be the same as the current SP. * register save area. Usually this would be the same as the current SP.
* But in the event of a context switch, A2 will instead refer to the TCB * But in the event of a context switch, A2 will instead refer to the TCB
* register save area. * register save area.
@ -348,9 +348,9 @@ _xtensa_syscall_handler:
mov a7, sp /* Argument 2: Top of stack = register save area */ mov a7, sp /* Argument 2: Top of stack = register save area */
call4 xtensa_irq_dispatch /* Call xtensa_int_decode */ call4 xtensa_irq_dispatch /* Call xtensa_int_decode */
/* On return from xtensa_irq_dispatch, a5 will contain the address of the new /* On return from xtensa_irq_dispatch, A6 will contain the address of the new
* register save area. Usually this would be the same as the current SP. * register save area. Usually this would be the same as the current SP.
* But in the event of a context switch, A2 will instead refer to the TCB * But in the event of a context switch, A6 will instead refer to the TCB
* register save area. * register save area.
*/ */