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boards/arm/stm32: fix board configurations according to changes in previous commit

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This commit is contained in:
raiden00pl 2020-04-26 20:22:57 +02:00 committed by Alan Carvalho de Assis
parent e2a3266857
commit 7b0ee05c49
9 changed files with 18 additions and 70 deletions
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1
boards/arm/stm32/nucleo-f302r8/configs/highpri/defconfig
View File

@ -51,6 +51,7 @@ CONFIG_START_YEAR=2011
CONFIG_STM32_ADC1=y
CONFIG_STM32_ADC1_DMA=y
CONFIG_STM32_ADC1_DMA_CFG=1
CONFIG_STM32_ADC1_EXTSEL=y
CONFIG_STM32_ADC_LL_OPS=y
CONFIG_STM32_ADC_NOIRQ=y
CONFIG_STM32_DMA1=y

16
boards/arm/stm32/nucleo-f302r8/include/board.h
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@ -235,22 +235,6 @@
#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_1 /* PA1 */
#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_1 /* PA9 */
/* Configuration specific to high priority interrupts example:
* - TIM1 CC1 trigger for ADC if DMA transfer and TIM1 PWM
* - ADC DMA transfer on DMA1_CH1
*/
#ifdef CONFIG_NUCLEOF302R8_HIGHPRI
#if defined(CONFIG_STM32_TIM1_PWM) && defined(CONFIG_STM32_ADC1_DMA)
/* TIM1 - ADC trigger */
#define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1CC1
#endif /* CONFIG_STM32_TIM1_PWM */
#endif /* CONFIG_NUCLEOF302R8_HIGHPRI */
/* DMA channels *************************************************************/
/* ADC */

15
boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c
View File

@ -98,12 +98,6 @@
# endif
#endif
#ifdef HIGHPRI_HAVE_TIM1
# ifndef ADC1_EXTSEL_VALUE
# error ADC1 EXTSEL have to be configured in board.h
# endif
#endif
#if (CONFIG_STM32_ADC1_INJECTED_CHAN > 0)
# if (CONFIG_STM32_ADC1_INJECTED_CHAN > 2)
# error Max 2 injected channels supported for now
@ -401,7 +395,6 @@ int highpri_main(int argc, char *argv[])
PWM_FREQ_UPDATE(pwm1, 1000);
#if ADC1_EXTSEL_VALUE == ADC1_EXTSEL_T1CC1
/* Set CCR1 */
PWM_CCR_UPDATE(pwm1, 1, 0x0f00);
@ -409,9 +402,6 @@ int highpri_main(int argc, char *argv[])
/* Enable TIM1 OUT1 */
PWM_OUTPUTS_ENABLE(pwm1, STM32_PWM_OUT1, true);
#else
# error T1CC1 only supported for now
#endif
#ifdef CONFIG_DEBUG_PWM_INFO
/* Print debug */
@ -477,6 +467,11 @@ int highpri_main(int argc, char *argv[])
adc1->ad_ops->ao_setup(adc1);
/* Configure regular channels trigger to T1CC1 */
STM32_ADC_EXTCFG_SET(highpri->adc1,
ADC1_EXTSEL_T1CC1 | ADC_EXTREG_EXTEN_DEFAULT);
#ifndef CONFIG_STM32_ADC1_DMA
/* Enable ADC regular conversion interrupts if no DMA */

1
boards/arm/stm32/nucleo-f334r8/configs/highpri/defconfig
View File

@ -50,6 +50,7 @@ CONFIG_START_YEAR=2011
CONFIG_STM32_ADC1=y
CONFIG_STM32_ADC1_DMA=y
CONFIG_STM32_ADC1_DMA_CFG=1
CONFIG_STM32_ADC1_EXTSEL=y
CONFIG_STM32_ADC1_INJECTED_CHAN=1
CONFIG_STM32_ADC_LL_OPS=y
CONFIG_STM32_ADC_NOIRQ=y

8
boards/arm/stm32/nucleo-f334r8/include/board.h
View File

@ -269,14 +269,6 @@
#define HRTIM_ADC_TRG1 HRTIM_ADCTRG13_APER
#endif /* CONFIG_STM32_HRTIM1 && CONFIG_STM32_ADC1_DMA*/
#if defined(CONFIG_STM32_TIM1_PWM) && defined(CONFIG_STM32_ADC1_DMA)
/* TIM1 - ADC trigger */
#define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1CC1
#endif /* CONFIG_STM32_TIM1_PWM && CONFIG_STM32_ADC1_DMA */
#endif /* CONFIG_NUCLEOF334R8_HIGHPRI */
#ifdef CONFIG_NUCLEOF334R8_SPWM

15
boards/arm/stm32/nucleo-f334r8/src/stm32_highpri.c
View File

@ -110,12 +110,6 @@
# endif
#endif
#ifdef HIGHPRI_HAVE_TIM1
# ifndef ADC1_EXTSEL_VALUE
# error ADC1 EXTSEL have to be configured in board.h
# endif
#endif
#if (CONFIG_STM32_ADC1_INJECTED_CHAN > 0)
# if (CONFIG_STM32_ADC1_INJECTED_CHAN > 2)
# error Max 2 injected channels supported for now
@ -437,7 +431,6 @@ int highpri_main(int argc, char *argv[])
PWM_FREQ_UPDATE(pwm1, 1000);
#if ADC1_EXTSEL_VALUE == ADC1_EXTSEL_T1CC1
/* Set CCR1 */
PWM_CCR_UPDATE(pwm1, 1, 0x0f00);
@ -445,9 +438,6 @@ int highpri_main(int argc, char *argv[])
/* Enable TIM1 OUT1 */
PWM_OUTPUTS_ENABLE(pwm1, STM32_PWM_OUT1, true);
#else
# error T1CC1 only supported for now
#endif
#ifdef CONFIG_DEBUG_PWM_INFO
/* Print debug */
@ -513,6 +503,11 @@ int highpri_main(int argc, char *argv[])
adc1->ad_ops->ao_setup(adc1);
/* Configure regular channels trigger to T1CC1 */
STM32_ADC_EXTCFG_SET(highpri->adc1,
ADC1_EXTSEL_T1CC1 | ADC_EXTREG_EXTEN_DEFAULT);
#ifndef CONFIG_STM32_ADC1_DMA
/* Enable ADC regular conversion interrupts if no DMA */

1
boards/arm/stm32/stm32f429i-disco/configs/highpri/defconfig
View File

@ -47,6 +47,7 @@ CONFIG_STM32F429I_DISCO_HIGHPRI=y
CONFIG_STM32_ADC1=y
CONFIG_STM32_ADC1_DMA=y
CONFIG_STM32_ADC1_DMA_CFG=1
CONFIG_STM32_ADC1_EXTSEL=y
CONFIG_STM32_ADC1_INJECTED_CHAN=1
CONFIG_STM32_ADC_LL_OPS=y
CONFIG_STM32_ADC_NOIRQ=y

16
boards/arm/stm32/stm32f429i-disco/include/board.h
View File

@ -458,22 +458,6 @@
#endif /* CONFIG_STM32_LTDC */
/* Configuration specific to high priority interrupts example:
* - TIM1 CC1 trigger for ADC if DMA transfer and TIM1 PWM
* - ADC DMA transfer on DMA1_CH1
*/
#ifdef CONFIG_STM32F429I_DISCO_HIGHPRI
#if defined(CONFIG_STM32_TIM1_PWM) && defined(CONFIG_STM32_ADC1_DMA)
/* TIM1 - ADC trigger */
#define ADC1_EXTSEL_VALUE ADC1_EXTSEL_T1CC1
#endif /* CONFIG_STM32_TIM1_PWM */
#endif /* CONFIG_STM32F429I_DISCO_HIGHPRI */
/* DMA ******************************************************************************/
#define ADC1_DMA_CHAN DMAMAP_ADC1_1

15
boards/arm/stm32/stm32f429i-disco/src/stm32_highpri.c
View File

@ -97,12 +97,6 @@
# endif
#endif
#ifdef HIGHPRI_HAVE_TIM1
# ifndef ADC1_EXTSEL_VALUE
# error ADC1 EXTSEL have to be configured in board.h
# endif
#endif
#if (CONFIG_STM32_ADC1_INJECTED_CHAN > 0)
# if (CONFIG_STM32_ADC1_INJECTED_CHAN > 1)
# error Max 1 injected channels supported for now
@ -386,7 +380,6 @@ int highpri_main(int argc, char *argv[])
PWM_FREQ_UPDATE(pwm1, 1000);
#if ADC1_EXTSEL_VALUE == ADC1_EXTSEL_T1CC1
/* Set CCR1 */
PWM_CCR_UPDATE(pwm1, 1, 0x0f00);
@ -394,9 +387,6 @@ int highpri_main(int argc, char *argv[])
/* Enable TIM1 OUT1 */
PWM_OUTPUTS_ENABLE(pwm1, STM32_PWM_OUT1, true);
#else
# error T1CC1 only supported for now
#endif
#ifdef CONFIG_DEBUG_PWM_INFO
/* Print debug */
@ -462,6 +452,11 @@ int highpri_main(int argc, char *argv[])
adc1->ad_ops->ao_setup(adc1);
/* Configure regular channels trigger to T1CC1 */
STM32_ADC_EXTCFG_SET(highpri->adc1,
ADC1_EXTSEL_T1CC1 | ADC_EXTREG_EXTEN_DEFAULT);
#ifndef CONFIG_STM32_ADC1_DMA
/* Enable ADC regular conversion interrupts if no DMA */