SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver

arch/arm/src/sama5/chip/sam_emac.h

@@ -383,4 +383,70 @@
 #define EMAC_WOL_SA1              (1 << 18) /* Bit 18: Specific address register 1 event enable */
 #define EMAC_WOL_MTI              (1 << 19) /* Bit 19: Multicast hash event enable */
 
+/* Descriptors **********************************************************************/
+
+/* Receive buffer descriptor:  Address word */
+
+#define RXDESC_ADDR_OWNER         (1 << 0)  /* Bit 0:  1=Software owns; 0=EMAC owns */
+#define RXDESC_ADDR_WRAP          (1 << 1)  /* Bit 1:  Last descriptor in list */
+#define RXDESC_ADDR_MASK          (0xfffffffc) /* Bits 2-31: Aligned buffer address */
+
+/* Receive buffer descriptor:  Control word */
+
+#define RXDESC_CTRL_FRLEN_SHIFT   (0)       /* Bits 0-11: Length of frame */
+#define RXDESC_CTRL_FRLEN_MASK    (0x000007ff << RXDESC_CTRL_FRLEN_SHIFT)
+#define RXDESC_CTRL_BOFFS_SHIFT   (12)      /* Bits 12-13: Receive buffer offset */
+#define RXDESC_CTRL_BOFFS_MASK    (3 << RXDESC_CTRL_BOFFS_SHIFT)
+#define RXDESC_CTRL_SOF           (1 << 14) /* Bit 14: Start of frame */
+#define RXDESC_CTRL_EOF           (1 << 15) /* Bit 15: End of frame */
+#define RXDESC_CTRL_CFI           (1 << 16) /* Bit 16: Concatenation format indicator (CFI) bit */
+#define RXDESC_CTRL_VLPRIO_SHIFT  (17)      /* Bits 17-19: VLAN priority */
+#define RXDESC_CTRL_VLPRIO_MASK   (7 << RXDESC_CTRL_VLANPRIO_SHIFT)
+#define RXDESC_CTRL_PRIODET       (1 << 20) /* Bit 20: Priority tag detected */
+#define RXDESC_CTRL_VLANTAG       (1 << 21) /* Bit 21: VLAN tag detected */
+#define RXDESC_CTRL_TYPEID        (1 << 22) /* Bit 22: Type ID match */
+#define RXDESC_CTRL_ADDR4         (1 << 23) /* Bit 23: Specific address register 4 match */
+#define RXDESC_CTRL_ADDR3         (1 << 24) /* Bit 24: Specific address register 3 match */
+#define RXDESC_CTRL_ADDR2         (1 << 25) /* Bit 25: Specific address register 2 match */
+#define RXDESC_CTRL_ADDR1         (1 << 26) /* Bit 26: Specific address register 1 match */
+                                            /* Bit 27: Reserved */
+#define RXDESC_CTRL_EXTADDR       (1 << 28) /* Bit 28: External address match */
+#define RXDESC_CTRL_UCAST         (1 << 29) /* Bit 29: Unicast hash match */
+#define RXDESC_CTRL_MCAST         (1 << 30) /* Bit 30: Multicast hash match */
+#define RXDESC_CTRL_ONES          (1 << 31) /* Bit 31: Global all ones broadcast address detected */
+
+/* Transmit buffer descriptor:  Address word (un-aligned, 32-bit address */
+
+/* Transmit buffer descriptor:  Control word */
+
+#define TXDESC_CTRL_BUFLEN_SHIFT  (0)       /* Bits 0-10: Length of buffer */
+#define TXDESC_CTRL_BUFLEN_MASK   (0x000003ff << TXDESC_CTRL_BUFLEN_SHIFT)
+                                            /* Bits 11-14: Reserved */
+#define TXDESC_CTRL_LAST          (1 << 15) /* Bit 15: Last buffer in the current frame */
+#define TXDESC_CTRL_NOCRC         (1 << 16) /* Bit 16: No CRC*/
+                                            /* Bits 17-26: Reserved */
+#define TXDESC_CTRL_NOBUFFER      (1 << 27) /* Bit 27: Buffers exhausted in mid frame*/
+#define TXDESC_CTRL_TXUR          (1 << 28) /* Bit 28: Transmit underrun*/
+#define TXDESC_CTRL_TXERR         (1 << 29) /* Bit 29: Retry limit exceeded, transmit error detected*/
+#define TXDESC_CTRL_WRAP          (1 << 30) /* Bit 30: Last descriptor in descriptor list*/
+#define TXDESC_CTRL_USED          (1 << 31) /* Bit 31: Zero for the EMAC to read from buffer*/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+/* Receive buffer descriptor */
+
+struct emac_rxdesc_s
+{
+  uint32_t addr;     /* Buffer address */
+  uint32_t ctrl;     /* RX controls */
+};
+
+/* Transmit buffer descriptor */
+
+struct emac_txdesc_s
+{
+  uint32_t addr;     /* Buffer address */
+  uint32_t ctrl;     /* TX controls */
+};
 #endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMAC_H */

arch/arm/src/sama5/sam_emac.h

@@ -0,0 +1,114 @@
+/************************************************************************************
+ * arch/arm/src/sama5/sam_eth.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H
+#define __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+#include "chip/sam_emac.h"
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Function: sam_ethinitialize
+ *
+ * Description:
+ *   Initialize the Ethernet driver for one interface.  If the STM32 chip supports
+ *   multiple Ethernet controllers, then board specific logic must implement
+ *   up_netinitialize() and call this function to initialize the desired interfaces.
+ *
+ * Parameters:
+ *   intf - In the case where there are multiple EMACs, this value identifies which
+ *   EMAC is to be initialized.
+ *
+ * Returned Value:
+ *   OK on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ************************************************************************************/
+
+int sam_ethinitialize(int intf);
+
+/************************************************************************************
+ * Function: sam_phy_boardinitialize
+ *
+ * Description:
+ *   Some boards require specialized initialization of the PHY before it can be used.
+ *   This may include such things as configuring GPIOs, resetting the PHY, etc.  If
+ *   CONFIG_SAMA5_PHYINIT is defined in the configuration then the board specific
+ *   logic must provide sam_phyinitialize();  The STM32 Ethernet driver will call
+ *   this function one time before it first uses the PHY.
+ *
+ * Parameters:
+ *   intf - Always zero for now.
+ *
+ * Returned Value:
+ *   OK on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_SAMA5_PHYINIT
+int sam_phy_boardinitialize(int intf);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H */
+