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risc-v/mpfs: fix ext irq 1-12

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Handle irq numbers 1-12 correctly
This commit is contained in:
Janne Rosberg 2021-06-03 13:55:52 +03:00 committed by Xiang Xiao
parent ebdc7a06b1
commit 7b882c3588
1 changed files with 6 additions and 20 deletions
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26
arch/risc-v/src/mpfs/mpfs_irq.c
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@ -157,16 +157,9 @@ void up_disable_irq(int irq)
asm volatile ("csrrc %0, mie, %1": "=r" (oldstat) : "r"(MIE_MTIE));
}
else if (irq >= MPFS_IRQ_GLOBAL_START)
else if (irq >= MPFS_IRQ_EXT_START)
{
/* REVISIT:
* Comment from baremetal lib:
* OFFSET_TO_MSS_GLOBAL_INTS:
* "Think this was required in early bitfile"
* Seems to be still true with 2021.04 release
*/
extirq = (irq - MPFS_IRQ_GLOBAL_START) + OFFSET_TO_MSS_GLOBAL_INTS;
extirq = irq - MPFS_IRQ_EXT_START;
/* Clear enable bit for the irq */
@ -174,7 +167,7 @@ void up_disable_irq(int irq)
uintptr_t miebase = MPFS_PLIC_H1_MIE0 +
((hart_id - 1) * MPFS_HART_MIE_OFFSET);
if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_GLOBAL_START)
if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START)
{
modifyreg32(miebase + (4 * (extirq / 32)), 1 << (extirq % 32), 0);
}
@ -210,16 +203,9 @@ void up_enable_irq(int irq)
asm volatile ("csrrs %0, mie, %1": "=r" (oldstat) : "r"(MIE_MTIE));
}
else if (irq >= MPFS_IRQ_GLOBAL_START)
else if (irq >= MPFS_IRQ_EXT_START)
{
/* REVISIT:
* Comment from baremetal lib:
* OFFSET_TO_MSS_GLOBAL_INTS:
* "Think this was required in early bitfile"
* Seems to be still true with 2021.04 release
*/
extirq = (irq - MPFS_IRQ_GLOBAL_START) + OFFSET_TO_MSS_GLOBAL_INTS;
extirq = irq - MPFS_IRQ_EXT_START;
/* Set enable bit for the irq */
@ -227,7 +213,7 @@ void up_enable_irq(int irq)
uintptr_t miebase = MPFS_PLIC_H1_MIE0 +
((hart_id - 1) * MPFS_HART_MIE_OFFSET);
if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_GLOBAL_START)
if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START)
{
modifyreg32(miebase + (4 * (extirq / 32)), 0, 1 << (extirq % 32));
}