Add logic to initialize timer 2
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@34 42af7a65-404d-4744-a932-0658087f49c3
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@ -79,7 +79,7 @@
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************************************************************/
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/************************************************************
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* Function: timer_isr
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* Function: up_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for
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@ -115,6 +115,15 @@ int up_timerisr(int irq, uint32 *regs)
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return 0;
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}
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/************************************************************
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* Function: up_timerinit
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*
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* Description:
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* This function is called during start-up to initialize
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* the timer interrupt.
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*
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************************************************************/
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void up_timerinit(void)
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{
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uint32 val;
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@ -66,33 +66,57 @@ LDLIBS = $(addprefix -l,$(notdir $(LINKLIBS)))
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LDFLAGS = --model-large --nostdlib \
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--data-loc 0x30 --iram-size 0x100 \
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--code-loc 0x2040 --code-size 0x5fc0 \
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--code-loc 0x20c0 --code-size 0x5f40 \
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--xram-loc 0x0100 --xram-size 0x1f00
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HEAP_START = ${shell cat pass1.mem | grep "EXTERNAL RAM" | sed -e "s/[ ][ ]*/ /g" | cut -d' ' -f5}
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DEPSRCS = $(SRCS) $(LINKSSRCS)
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HEAP1_BASE = ${shell cat pass1.mem | grep "EXTERNAL RAM" | sed -e "s/[ ][ ]*/ /g" | cut -d' ' -f5}
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HEAP2_BASE = ${shell cat pass1.mem | grep "ROM/EPROM/FLASH" | sed -e "s/[ ][ ]*/ /g" | cut -d' ' -f4}
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STACK_BASE = ${shell cat pass1.mem | grep "Stack starts" | cut -d' ' -f4}
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all: up_head$(OBJEXT) libarch$(LIBEXT)
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$(ASRCS) $(LINKASRCS): %$(ASMEXT): %.S
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$(CPP) -P $(CPPFLAGS) -D__ASSEMBLY__ -DUP_HEAP_START=0x0100 -DUP_HEAP_END=0x2000 $< -o $@
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$(CPP) -P $(CPPFLAGS) -D__ASSEMBLY__ $< -o $@
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$(AOBJS) $(LINKOBJS): $(ASRCS) $(LINKASRCS)
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$(AS) $(ASFLAGS) $<
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$(COBJS): %$(OBJEXT): %.c
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$(CC) -c $(CFLAGS) -DUP_HEAP_START=0x0100 -DUP_HEAP_END=0x2000 $< -o $@
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$(CC) -c $(CFLAGS) $< -o $@
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# Create a header file that contains addressing information needed by the code
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pass1.mem:
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up_mem.h: pass1.mem
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@echo "#ifndef __ARCH_MEM_H" >up_mem.h
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@echo "#define __ARCH_MEM_H" >>up_mem.h
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@if [ -e pass1.mem ]; then \
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echo "#define UP_STACK_BASE $(STACK_BASE)" >>up_mem.h ; \
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echo "#define UP_HEAP1_BASE $(HEAP1_BASE)" >> up_mem.h ; \
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echo "#define UP_HEAP1_END 0x2000" >> up_mem.h ; \
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echo "#define UP_HEAP2_BASE $(HEAP2_BASE)" >> up_mem.h ; \
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echo "#define UP_HEAP2_END 0x8000" >> up_mem.h ; \
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else \
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echo "#define UP_STACK_BASE 0x30" >>up_mem.h ; \
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echo "#define UP_HEAP1_BASE 0x0100" >> up_mem.h ; \
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echo "#define UP_HEAP1_END 0x2000" >> up_mem.h ; \
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echo "#define UP_HEAP2_BASE 0x6000" >> up_mem.h ; \
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echo "#define UP_HEAP2_END 0x8000" >> up_mem.h ; \
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fi
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@echo "#endif /* __ARCH_MEM_H */" >>up_mem.h
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# Combine all objects in this directory into a library
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libarch$(LIBEXT): $(OBJS)
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( for obj in $(OBJS) ; do \
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libarch$(LIBEXT): up_mem.h $(OBJS)
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@( for obj in $(OBJS) ; do \
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$(AR) $@ $${obj} || \
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{ echo "$(AR) $@ $${obj} FAILED!" ; exit 1 ; } ; \
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done ; )
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# This is a kludge to work around some conflicting symbols in libsdcc.lib
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# This is a kludge to work around some conflicting symbols in libsdcc.liXqueb
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$(SDCCLIBDIR)/libmysdcc.lib: $(SDCCLIBDIR)/libsdcc.lib
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@cat $(SDCCLIBDIR)/libsdcc.lib | \
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@ -106,27 +130,31 @@ $(SDCCLIBDIR)/libmysdcc.lib: $(SDCCLIBDIR)/libsdcc.lib
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# This target builds the final executable
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pass1$(EXEEXT): $(SDCCLIBDIR)/libmysdcc.lib $(LINKOBJS)
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$(CC) $(LDFLAGS) $(LDPATHES) $(SDCCPATH) $(LINKOBJS) $(LDLIBS) $(SDCCLIBS) -o pass1.ihx
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pass1.ihx: up_mem.h $(SDCCLIBDIR)/libmysdcc.lib $(LINKOBJS)
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$(CC) $(LDFLAGS) $(LDPATHES) $(SDCCPATH) $(LINKOBJS) $(LDLIBS) $(SDCCLIBS) -o $@
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@rm -f up_mem.h
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@rm -f up_allocateheap$(OBJEXT) libarch$(LIBEXT)
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@$(MAKE) TOPDIR=$(TOPDIR) libarch$(LIBEXT)
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nuttx$(EXEEXT): pass1$(EXEEXT)
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$(CC) -c $(CFLAGS) -DUP_HEAP_START=$(HEAP_START) -DUP_HEAP_END=0x2000 \
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up_allocateheap.c -o up_allocateheap$(OBJEXT)
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nuttx.ihx: up_mem.h $(SDCCLIBDIR)/libmysdcc.lib $(LINKOBJS)
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$(CC) $(LDFLAGS) $(LDPATHES) $(SDCCPATH) $(LINKOBJS) $(LDLIBS) $(SDCCLIBS) -o $@
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nuttx$(EXEEXT): pass1.ihx nuttx.ihx
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@rm -f pass1.*
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$(CC) $(LDFLAGS) $(LDPATHES) $(SDCCPATH) $(LINKOBJS) $(LDLIBS) $(SDCCLIBS) -o nuttx.ihx
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packihx nuttx.ihx > $(TOPDIR)/nuttx$(EXEEXT)
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@cp -f nuttx.map $(TOPDIR)/.
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# Build dependencies
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.depend: Makefile $(DEPSRCS)
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.depend: Makefile up_mem.h $(DEPSRCS)
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$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
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touch $@
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depend: .depend
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clean:
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rm -f libarch$(LIBEXT) *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.ihx *.hex *~
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rm -f libarch$(LIBEXT) up_mem.h
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rm -f *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.ihx *.hex *~
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if [ ! -z "$(OBJEXT)" ]; then rm -f *$(OBJEXT); fi
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distclean: clean
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@ -44,6 +44,7 @@
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#include <nuttx/arch.h>
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#include "os_internal.h"
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#include "up_internal.h"
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#include "up_mem.h"
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/************************************************************
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* Private Definitions
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@ -74,6 +75,6 @@
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void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
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{
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*heap_start = (FAR void*)UP_HEAP_START;
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*heap_size = UP_HEAP_END - UP_HEAP_START;
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*heap_start = (FAR void*)UP_HEAP1_BASE;
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*heap_size = UP_HEAP1_END - UP_HEAP1_BASE;
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}
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@ -96,6 +96,59 @@
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#define PM2_VECTOR_UART (PM2_VECTOR_BASE + 35)
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#define PM2_VECTOR_TIMER2 (PM2_VECTOR_BASE + 43)
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/* Registers. 8052 regiser definitions are provided in the SDCC header
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* file 8052.h. However, a few SFR registers are missing from that
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* file (they can be found in mcs51reg.h, but that file is too much
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* when the following simple addtions do the job).
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*/
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sfr at 0xc9 T2MOD ;
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/* Timing information.
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*
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* The PJRC board is based on a standard 87C52 CPU clocked at 22.1184 MHz.
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* The CPU clock is divided by 12 to yield a clock frequency of 1.8432 MHz.
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*/
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#define CPU_CLOCK_HZ 22118400L
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#define TIMER_CLOCK_HZ 1843200L
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/* The 87C52 has three timers, timer 0, timer 1, and timer 2. On the PJRC
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* board, timer 1 and 2 have dedicated functions. They provide baud support
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* support for the boards two serial ports. Unfortunately, only timer 2
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* can generate the accurate 100Hz timer desired by the OS.
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*
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* Timer 0 provides only a 8-bit auto-reload mode.
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*/
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#define CONFIG_80C52_TIMER2 1
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#ifdef CONFIG_80C52_TIMER2
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/* To use timer 2 as the 100Hz system timer, we need to calculate a 16-bit
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* reload value that results in 100Hz overflow interrupts. That value
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* is given by:
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*
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* Timer ticks = TIMER_CLOCK_HZ / (desired ticks-per-second)
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* = 18432
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* Capture value = 0xffff - (Timer ticks)
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* = 47103 = 0x67ff
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*/
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# define TIMER2_CAPTURE_LOW 0xff
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# define TIMER2_CAPTURE_HIGH 0x67
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#else
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/* Timer 0, mode 0 can be used as a system timer. In that mode, the
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* 1.8432 is further divided by 32. A single 8-bit value is incremented
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* at 57600 Hz, which results in 225 Timer 0 overflow interrupts per
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* second.
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*/
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# warning "No support for timer 0 as the system timer"
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#endif
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/**************************************************************************
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* Public Types
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**************************************************************************/
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@ -41,6 +41,7 @@
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#include <sys/types.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <8052.h>
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#include "clock_internal.h"
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#include "up_internal.h"
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@ -61,7 +62,7 @@
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************************************************************/
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/************************************************************
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* Function: timer_isr
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* Function: up_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for
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@ -77,15 +78,45 @@ int up_timerisr(int irq, FAR ubyte *frame)
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return 0;
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}
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/************************************************************
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* Function: up_timerinit
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*
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* Description:
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* This function is called during start-up to initialize
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* the timer interrupt.
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*
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************************************************************/
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void up_timerinit(void)
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{
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#ifdef CONFIG_80C52_TIMER2
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up_disable_irq(TIMER2_IRQ);
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#warning "Missing TIMER2 setup logic here"
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/* Set up timer 2 -- See up_internal.h for details */
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T2MOD = 0;
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/* Set up the capture count to generate 100Hz system
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* interrupts.
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*/
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RCAP2L = TIMER2_CAPTURE_LOW;
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RCAP2H = TIMER2_CAPTURE_HIGH;
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TL2 = TIMER2_CAPTURE_LOW;
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TH2 = TIMER2_CAPTURE_HIGH;
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/* Configure for interrupts */
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T2CON = 0x40;
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/* Attach and enable the timer interrupt */
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irq_attach(TIMER2_IRQ, (xcpt_t)up_timerisr);
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up_enable_irq(TIMER2_IRQ);
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#else
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# warning "No support for timer 0 as the system timer"
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#endif
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}
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