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LPC11xx/LPC17xx: Convert *err() to either *info() or add ERROR:, depending on if an error is reported

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This commit is contained in:
Gregory Nutt 2016-06-17 11:26:31 -06:00
parent 1edc997922
commit 7ba7de3041
18 changed files with 183 additions and 176 deletions
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2
arch/arm/src/lpc11xx/lpc11_i2c.c
View File

@ -485,7 +485,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
if (port > 1)
{
_err("lpc I2C Only support 0,1\n");
i2cerr("ERROR: LPC I2C only supports ports 0 and 1\n");
return NULL;
}

2
arch/arm/src/lpc11xx/lpc11_serial.c
View File

@ -638,7 +638,7 @@ static int up_interrupt(int irq, void *context)
default:
{
_err("Unexpected IIR: %02x\n", status);
_err("ERROR: Unexpected IIR: %02x\n", status);
break;
}
}

6
arch/arm/src/lpc11xx/lpc11_spi.c
View File

@ -272,7 +272,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
priv->frequency = frequency;
priv->actual = actual;
spierr("Frequency %d->%d\n", frequency, actual);
spiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -436,7 +436,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
spierr("nwords: %d\n", nwords);
spiinfo("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@ -483,7 +483,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spierr("nwords: %d\n", nwords);
spiinfo("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the

14
arch/arm/src/lpc17xx/Kconfig
View File

@ -704,12 +704,12 @@ config NET_WOL
---help---
Enable Wake-up on Lan (not fully implemented).
config NET_REGDEBUG
config LPC17_NET_REGDEBUG
bool "Ethernet register-level debug"
depends on DEBUG_FEATURES
depends on DEBUG_NET_INFO
default n
---help---
Enable low level register debug. Also needs CONFIG_DEBUG_FEATURES.
Enable low level register debug. Also needs CONFIG_DEBUG_NET_INFO.
config NET_HASH
bool "Hashing"
@ -901,11 +901,11 @@ config LPC17_USBDEV_NOLED
config LPC17_USBDEV_REGDEBUG
bool "Register level debug"
depends on DEBUG_FEATURES
depends on DEBUG_USB_INFO
default n
---help---
Output detailed register-level USB device debug information. Requires
also CONFIG_DEBUG_FEATURES.
also CONFIG_DEBUG_USB_INFO.
endmenu
@ -978,10 +978,10 @@ config USBHOST_ISOC_DISABLE
config LPC17_USBHOST_REGDEBUG
bool "Register level debug"
depends on DEBUG_FEATURES
depends on DEBUG_USB_INFO
default n
---help---
Output detailed register-level USB host debug information. Requires
also CONFIG_DEBUG_FEATURES.
also CONFIG_DEBUG_USB_INFO.
endmenu

18
arch/arm/src/lpc17xx/lpc17_can.c
View File

@ -308,7 +308,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{
if (count == 4)
{
_llerr("...\n");
canllinfo("...\n");
}
return;
@ -325,7 +325,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{
/* Yes.. then show how many times the value repeated */
_llerr("[repeats %d more times]\n", count-3);
canllinfo("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@ -337,7 +337,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
/* Show the register value read */
_llerr("%08x->%08x\n", addr, value);
canllinfo("%08x->%08x\n", addr, value);
}
#endif
@ -398,7 +398,7 @@ static void can_putreg(struct up_dev_s *priv, int offset, uint32_t value)
/* Show the register value being written */
_llerr("%08x<-%08x\n", addr, value);
canllinfo("%08x<-%08x\n", addr, value);
/* Write the value */
@ -458,7 +458,7 @@ static void can_putcommon(uint32_t addr, uint32_t value)
{
/* Show the register value being written */
_llerr("%08x<-%08x\n", addr, value);
canllinfo("%08x<-%08x\n", addr, value);
/* Write the value */
@ -681,7 +681,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
{
_err("Fix me:Not Implemented\n");
canerr("ERROR: Fix me -- Not Implemented\n");
return 0;
}
@ -701,7 +701,7 @@ static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
{
_err("Fix me:Not Implemented\n");
canerr("ERROR: Fix me -- Not Implemented\n");
return 0;
}
@ -862,7 +862,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
}
else
{
canerr("No available transmission buffer, SR: %08x\n", regval);
canerr("ERROR: No available transmission buffer, SR: %08x\n", regval);
ret = -EBUSY;
}
@ -1283,7 +1283,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
else
#endif
{
canerr("Unsupported port: %d\n", port);
canerr("ERROR: Unsupported port: %d\n", port);
leave_critical_section(flags);
return NULL;
}

4
arch/arm/src/lpc17xx/lpc17_dac.c
View File

@ -170,9 +170,9 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
/* All ioctl calls will be routed through this method */
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
{
_err("Fix me:Not Implemented\n");
aerr("ERROR: Fix me -- Not Implemented\n");
return 0;
}

96
arch/arm/src/lpc17xx/lpc17_ethernet.c
View File

@ -127,17 +127,17 @@
#endif
/* Debug Configuration *****************************************************/
/* Register debug -- can only happen of CONFIG_DEBUG_FEATURES is selected */
/* Register debug -- can only happen of CONFIG_DEBUG_NET_INFO is selected */
#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_NET_REGDEBUG
#ifndef CONFIG_DEBUG_NET_INFO
# undef CONFIG_LPC17_NET_REGDEBUG
#endif
/* CONFIG_NET_DUMPPACKET will dump the contents of each packet to the
* console.
*/
#ifndef CONFIG_DEBUG_FEATURES
#ifndef CONFIG_DEBUG_NET_INFO
# undef CONFIG_NET_DUMPPACKET
#endif
@ -301,7 +301,7 @@ static const uint16_t g_enetpins[GPIO_NENET_PINS] =
/* Register operations */
#ifdef CONFIG_NET_REGDEBUG
#ifdef CONFIG_LPC17_NET_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite);
static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite);
static uint32_t lpc17_getreg(uint32_t addr);
@ -365,7 +365,7 @@ static int lpc17_rmmac(struct net_driver_s *dev, const uint8_t *mac);
/* Initialization functions */
#if defined(CONFIG_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
#if defined(CONFIG_LPC17_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
static void lpc17_showpins(void);
#else
# define lpc17_showpins()
@ -374,7 +374,7 @@ static void lpc17_showpins(void);
/* PHY initialization functions */
#ifdef LPC17_HAVE_PHY
# ifdef CONFIG_NET_REGDEBUG
# ifdef CONFIG_LPC17_NET_REGDEBUG
static void lpc17_showmii(uint8_t phyaddr, const char *msg);
# else
# define lpc17_showmii(phyaddr,msg)
@ -412,10 +412,10 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv);
*
****************************************************************************/
#ifdef CONFIG_NET_REGDEBUG
#ifdef CONFIG_LPC17_NET_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
_err("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
ninfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@ -427,7 +427,7 @@ static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
*
****************************************************************************/
#ifdef CONFIG_NET_REGDEBUG
#ifdef CONFIG_LPC17_NET_REGDEBUG
static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
static uint32_t prevaddr = 0;
@ -465,7 +465,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
_err("[repeats %d more times]\n", count);
ninfo("[repeats %d more times]\n", count);
}
}
@ -491,7 +491,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
*
****************************************************************************/
#ifdef CONFIG_NET_REGDEBUG
#ifdef CONFIG_LPC17_NET_REGDEBUG
static uint32_t lpc17_getreg(uint32_t addr)
{
/* Read the value from the register */
@ -513,7 +513,7 @@ static uint32_t lpc17_getreg(uint32_t addr)
*
****************************************************************************/
#ifdef CONFIG_NET_REGDEBUG
#ifdef CONFIG_LPC17_NET_REGDEBUG
static void lpc17_putreg(uint32_t val, uint32_t addr)
{
/* Check if we need to print this value */
@ -837,7 +837,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
if ((*rxstat & RXSTAT_INFO_ERROR) != 0)
{
nllerr("Error. considx: %08x prodidx: %08x rxstat: %08x\n",
nllerr("ERROR: considx: %08x prodidx: %08x rxstat: %08x\n",
considx, prodidx, *rxstat);
NETDEV_RXERRORS(&priv->lp_dev);
}
@ -850,21 +850,21 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
/* else */ if (pktlen > CONFIG_NET_ETH_MTU + CONFIG_NET_GUARDSIZE)
{
nllerr("Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
nllwarn("WARNING: Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXERRORS(&priv->lp_dev);
}
else if ((*rxstat & RXSTAT_INFO_LASTFLAG) == 0)
{
nllerr("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
nllinfo("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXFRAGMENTS(&priv->lp_dev);
fragment = true;
}
else if (fragment)
{
nllerr("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
nllinfo("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXFRAGMENTS(&priv->lp_dev);
fragment = false;
}
@ -1202,13 +1202,13 @@ static int lpc17_interrupt(int irq, void *context)
{
if ((status & ETH_INT_RXOVR) != 0)
{
nllerr("RX Overrun. status: %08x\n", status);
nllerr("ERROR: RX Overrun. status: %08x\n", status);
NETDEV_RXERRORS(&priv->lp_dev);
}
if ((status & ETH_INT_TXUNR) != 0)
{
nllerr("TX Underrun. status: %08x\n", status);
nllerr("ERROR: TX Underrun. status: %08x\n", status);
NETDEV_TXERRORS(&priv->lp_dev);
}
@ -1229,7 +1229,7 @@ static int lpc17_interrupt(int irq, void *context)
if ((status & ETH_INT_RXERR) != 0)
{
nllerr("RX Error. status: %08x\n", status);
nllerr("ERROR: RX ERROR: status: %08x\n", status);
NETDEV_RXERRORS(&priv->lp_dev);
}
@ -1281,7 +1281,7 @@ static int lpc17_interrupt(int irq, void *context)
if ((status & ETH_INT_TXERR) != 0)
{
nllerr("TX Error. status: %08x\n", status);
nllerr("ERROR: TX ERROR: status: %08x\n", status);
NETDEV_TXERRORS(&priv->lp_dev);
}
@ -1720,9 +1720,9 @@ static int lpc17_ifup(struct net_driver_s *dev)
uint32_t regval;
int ret;
nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
ninfo("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
/* Reset the Ethernet controller (again) */
@ -1733,7 +1733,7 @@ static int lpc17_ifup(struct net_driver_s *dev)
ret = lpc17_phyinit(priv);
if (ret != 0)
{
nerr("lpc17_phyinit failed: %d\n", ret);
nerr("ERROR: lpc17_phyinit failed: %d\n", ret);
return ret;
}
@ -2292,7 +2292,7 @@ static int lpc17_rmmac(struct net_driver_s *dev, const uint8_t *mac)
*
****************************************************************************/
#if defined(CONFIG_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
#if defined(CONFIG_LPC17_NET_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
static void lpc17_showpins(void)
{
lpc17_dumpgpio(GPIO_PORT1 | GPIO_PIN0, "P1[1-15]");
@ -2316,17 +2316,17 @@ static void lpc17_showpins(void)
*
****************************************************************************/
#if defined(CONFIG_NET_REGDEBUG) && defined(LPC17_HAVE_PHY)
#if defined(CONFIG_LPC17_NET_REGDEBUG) && defined(LPC17_HAVE_PHY)
static void lpc17_showmii(uint8_t phyaddr, const char *msg)
{
_err("PHY " LPC17_PHYNAME ": %s\n", msg);
_err(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR));
_err(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR));
_err(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
_err(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA));
_err(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
ninfo("PHY " LPC17_PHYNAME ": %s\n", msg);
ninfo(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR));
ninfo(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR));
ninfo(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
ninfo(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA));
ninfo(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
#ifdef CONFIG_ETH0_PHY_KS8721
_err(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
ninfo(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
#endif
}
#endif
@ -2462,7 +2462,7 @@ static inline int lpc17_phyreset(uint8_t phyaddr)
}
}
nerr("Reset failed. MCR: %04x\n", phyreg);
nerr("ERROR: Reset failed. MCR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@ -2509,7 +2509,7 @@ static inline int lpc17_phyautoneg(uint8_t phyaddr)
}
}
nerr("Auto-negotiation failed. MSR: %04x\n", phyreg);
nerr("ERROR: Auto-negotiation failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@ -2593,7 +2593,7 @@ static int lpc17_phymode(uint8_t phyaddr, uint8_t mode)
#endif
}
nerr("Link failed. MSR: %04x\n", phyreg);
nerr("ERROR: Link failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@ -2673,7 +2673,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
{
/* Failed to find PHY at any location */
nerr("No PHY detected\n");
nerr("ERROR: No PHY detected\n");
return -ENODEV;
}
ninfo("phyaddr: %d\n", phyaddr);
@ -2760,7 +2760,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
nerr("Unrecognized mode: %04x\n", phyreg);
nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@ -2788,7 +2788,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
nerr("Unrecognized mode: %04x\n", phyreg);
nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@ -2816,7 +2816,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
nerr("Unrecognized mode: %04x\n", phyreg);
nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@ -2862,7 +2862,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
}
else
{
nerr("Unrecognized mode: %04x\n", phyreg);
nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
}
@ -2871,9 +2871,9 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
# warning "PHY Unknown: speed and duplex are bogus"
#endif
nerr("%dBase-T %s duplex\n",
(priv->lp_mode & LPC17_SPEED_MASK) == LPC17_SPEED_100 ? 100 : 10,
(priv->lp_mode & LPC17_DUPLEX_MASK) == LPC17_DUPLEX_FULL ?"full" : "half");
ninfo("%dBase-T %s duplex\n",
(priv->lp_mode & LPC17_SPEED_MASK) == LPC17_SPEED_100 ? 100 : 10,
(priv->lp_mode & LPC17_DUPLEX_MASK) == LPC17_DUPLEX_FULL ?"full" : "half");
/* Disable auto-configuration. Set the fixed speed/duplex mode.
* (probably more than little redundant).

80
arch/arm/src/lpc17xx/lpc17_gpdma.c
View File

@ -654,7 +654,7 @@ void lpc17_dmastop(DMA_HANDLE handle)
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA
#ifdef CONFIG__DEBUG_DMA_INFO
void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs)
{
struct lpc17_dmach_s *dmach = (DMA_HANDLE)handle;
@ -686,7 +686,7 @@ void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs)
regs->ch.control = getreg32(base + LPC17_DMACH_CONTROL_OFFSET);
regs->ch.config = getreg32(base + LPC17_DMACH_CONFIG_OFFSET);
}
#endif /* CONFIG_DEBUG_DMA */
#endif /* CONFIG__DEBUG_DMA_INFO */
/****************************************************************************
* Name: lpc17_dmadump
@ -696,7 +696,7 @@ void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs)
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA
#ifdef CONFIG__DEBUG_DMA_INFO
void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
const char *msg)
{
@ -707,49 +707,49 @@ void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
/* Dump the sampled global DMA registers */
dmaerr("Global GPDMA Registers: %s\n", msg);
dmaerr(" INTST[%08x]: %08x\n",
LPC17_DMA_INTST, regs->gbl.intst);
dmaerr(" INTTCST[%08x]: %08x\n",
LPC17_DMA_INTTCST, regs->gbl.inttcst);
dmaerr(" INTERRST[%08x]: %08x\n",
LPC17_DMA_INTERRST, regs->gbl.interrst);
dmaerr(" RAWINTTCST[%08x]: %08x\n",
LPC17_DMA_RAWINTTCST, regs->gbl.rawinttcst);
dmaerr(" RAWINTERRST[%08x]: %08x\n",
LPC17_DMA_RAWINTERRST, regs->gbl.rawinterrst);
dmaerr(" ENBLDCHNS[%08x]: %08x\n",
LPC17_DMA_ENBLDCHNS, regs->gbl.enbldchns);
dmaerr(" SOFTBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTBREQ, regs->gbl.softbreq);
dmaerr(" SOFTSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTSREQ, regs->gbl.softsreq);
dmaerr(" SOFTLBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLBREQ, regs->gbl.softlbreq);
dmaerr(" SOFTLSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLSREQ, regs->gbl.softlsreq);
dmaerr(" CONFIG[%08x]: %08x\n",
LPC17_DMA_CONFIG, regs->gbl.config);
dmaerr(" SYNC[%08x]: %08x\n",
LPC17_DMA_SYNC, regs->gbl.sync);
dmainfo("Global GPDMA Registers: %s\n", msg);
dmainfo(" INTST[%08x]: %08x\n",
LPC17_DMA_INTST, regs->gbl.intst);
dmainfo(" INTTCST[%08x]: %08x\n",
LPC17_DMA_INTTCST, regs->gbl.inttcst);
dmainfo(" INTERRST[%08x]: %08x\n",
LPC17_DMA_INTERRST, regs->gbl.interrst);
dmainfo(" RAWINTTCST[%08x]: %08x\n",
LPC17_DMA_RAWINTTCST, regs->gbl.rawinttcst);
dmainfo(" RAWINTERRST[%08x]: %08x\n",
LPC17_DMA_RAWINTERRST, regs->gbl.rawinterrst);
dmainfo(" ENBLDCHNS[%08x]: %08x\n",
LPC17_DMA_ENBLDCHNS, regs->gbl.enbldchns);
dmainfo(" SOFTBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTBREQ, regs->gbl.softbreq);
dmainfo(" SOFTSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTSREQ, regs->gbl.softsreq);
dmainfo(" SOFTLBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLBREQ, regs->gbl.softlbreq);
dmainfo(" SOFTLSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLSREQ, regs->gbl.softlsreq);
dmainfo(" CONFIG[%08x]: %08x\n",
LPC17_DMA_CONFIG, regs->gbl.config);
dmainfo(" SYNC[%08x]: %08x\n",
LPC17_DMA_SYNC, regs->gbl.sync);
/* Dump the DMA channel registers */
base = LPC17_DMACH_BASE((uint32_t)dmach->chn);
dmaerr("Channel GPDMA Registers: %d\n", dmach->chn);
dmainfo("Channel GPDMA Registers: %d\n", dmach->chn);
dmaerr(" SRCADDR[%08x]: %08x\n",
base + LPC17_DMACH_SRCADDR_OFFSET, regs->ch.srcaddr);
dmaerr(" DESTADDR[%08x]: %08x\n",
base + LPC17_DMACH_DESTADDR_OFFSET, regs->ch.destaddr);
dmaerr(" LLI[%08x]: %08x\n",
base + LPC17_DMACH_LLI_OFFSET, regs->ch.lli);
dmaerr(" CONTROL[%08x]: %08x\n",
base + LPC17_DMACH_CONTROL_OFFSET, regs->ch.control);
dmaerr(" CONFIG[%08x]: %08x\n",
base + LPC17_DMACH_CONFIG_OFFSET, regs->ch.config);
dmainfo(" SRCADDR[%08x]: %08x\n",
base + LPC17_DMACH_SRCADDR_OFFSET, regs->ch.srcaddr);
dmainfo(" DESTADDR[%08x]: %08x\n",
base + LPC17_DMACH_DESTADDR_OFFSET, regs->ch.destaddr);
dmainfo(" LLI[%08x]: %08x\n",
base + LPC17_DMACH_LLI_OFFSET, regs->ch.lli);
dmainfo(" CONTROL[%08x]: %08x\n",
base + LPC17_DMACH_CONTROL_OFFSET, regs->ch.control);
dmainfo(" CONFIG[%08x]: %08x\n",
base + LPC17_DMACH_CONFIG_OFFSET, regs->ch.config);
}
#endif /* CONFIG_DEBUG_DMA */
#endif /* CONFIG__DEBUG_DMA_INFO */
#endif /* CONFIG_LPC17_GPDMA */

8
arch/arm/src/lpc17xx/lpc17_gpdma.h
View File

@ -68,7 +68,7 @@ typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
#ifdef CONFIG_DEBUG_DMA
#ifdef CONFIG__DEBUG_DMA_INFO
struct lpc17_dmaglobalregs_s
{
/* Global Registers */
@ -109,7 +109,7 @@ struct lpc17_dmaregs_s
struct lpc17_dmachanregs_s ch;
};
#endif /* CONFIG_DEBUG_DMA */
#endif /* CONFIG__DEBUG_DMA_INFO */
/****************************************************************************
* Public Data
@ -239,7 +239,7 @@ void lpc17_dmastop(DMA_HANDLE handle);
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA
#ifdef CONFIG__DEBUG_DMA_INFO
void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs);
#else
# define lpc17_dmasample(handle,regs)
@ -253,7 +253,7 @@ void lpc17_dmasample(DMA_HANDLE handle, struct lpc17_dmaregs_s *regs);
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA
#ifdef CONFIG__DEBUG_DMA_INFO
void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
const char *msg);
#else

2
arch/arm/src/lpc17xx/lpc17_i2c.c
View File

@ -485,7 +485,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
if (port > 1)
{
_err("lpc I2C Only support 0,1\n");
i2cerr("ERROR: LPC I2C Only supports ports 0 and 1\n");
return NULL;
}

62
arch/arm/src/lpc17xx/lpc17_lcd.c
View File

@ -202,14 +202,14 @@ struct fb_vtable_s g_fbobject =
static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
ginfo("vtable=%p vinfo=%p\n", vtable, vinfo);
lcdinfo("vtable=%p vinfo=%p\n", vtable, vinfo);
if (vtable && vinfo)
{
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
}
gerr("Returning EINVAL\n");
lcderr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@ -220,14 +220,14 @@ static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
static int lpc17_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
ginfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
lcdinfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
if (vtable && planeno == 0 && pinfo)
{
memcpy(pinfo, &g_planeinfo, sizeof(struct fb_planeinfo_s));
return OK;
}
gerr("Returning EINVAL\n");
lcderr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@ -244,8 +244,8 @@ static int lpc17_getcmap(FAR struct fb_vtable_s *vtable,
int last;
int i;
ginfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
lcdinfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
DEBUGASSERT(vtable && cmap &&
cmap->first < 256 && (cmap->first + cmap->len) < 256);
@ -319,8 +319,8 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
int last;
int i;
ginfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
lcdinfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
DEBUGASSERT(vtable && cmap);
@ -383,27 +383,27 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_cursorattrib_s *attrib)
{
ginfo("vtable=%p attrib=%p\n", vtable, attrib);
lcdinfo("vtable=%p attrib=%p\n", vtable, attrib);
if (vtable && attrib)
{
#ifdef CONFIG_FB_HWCURSORIMAGE
attrib->fmt = LPC17_COLOR_FMT;
#endif
ginfo("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
lcdinfo("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
attrib->pos = g_cpos;
#ifdef CONFIG_FB_HWCURSORSIZE
attrib->mxsize.h = CONFIG_LPC17_LCD_VHEIGHT;
attrib->mxsize.w = CONFIG_LPC17_LCD_HWIDTH;
ginfo("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
lcdinfo("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
attrib->size = g_csize;
#endif
return OK;
}
gerr("Returning EINVAL\n");
lcderr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
#endif
@ -416,34 +416,34 @@ static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
static int lpc17_setcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_setcursor_s *setttings)
{
ginfo("vtable=%p setttings=%p\n", vtable, setttings);
lcdinfo("vtable=%p setttings=%p\n", vtable, setttings);
if (vtable && setttings)
{
ginfo("flags: %02x\n", settings->flags);
lcdinfo("flags: %02x\n", settings->flags);
if ((flags & FB_CUR_SETPOSITION) != 0)
{
g_cpos = settings->pos;
ginfo("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
lcdinfo("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
}
#ifdef CONFIG_FB_HWCURSORSIZE
if ((flags & FB_CUR_SETSIZE) != 0)
{
g_csize = settings->size;
ginfo("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
lcdinfo("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
}
#endif
#ifdef CONFIG_FB_HWCURSORIMAGE
if ((flags & FB_CUR_SETIMAGE) != 0)
{
ginfo("image: (h:%d, w:%d) @ %p\n",
settings->img.height, settings->img.width,
settings->img.image);
lcdinfo("image: (h:%d, w:%d) @ %p\n",
settings->img.height, settings->img.width,
settings->img.image);
}
#endif
return OK;
}
gerr("Returning EINVAL\n");
lcderr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
#endif
@ -473,7 +473,7 @@ int up_fbinitialize(int display)
uint32_t regval;
int i;
ginfo("Entry\n");
lcdinfo("Entry\n");
/* Give LCD bus priority */
@ -485,7 +485,7 @@ int up_fbinitialize(int display)
/* Configure pins */
/* Video data */
ginfo("Configuring pins\n");
lcdinfo("Configuring pins\n");
lpc17_configgpio(GPIO_LCD_VD0);
lpc17_configgpio(GPIO_LCD_VD1);
@ -528,7 +528,7 @@ int up_fbinitialize(int display)
modifyreg32(LPC17_SYSCON_PCONP, 0, SYSCON_PCONP_PCLCD);
ginfo("Configuring the LCD controller\n");
lcdinfo("Configuring the LCD controller\n");
/* Disable the cursor */
@ -686,7 +686,7 @@ int up_fbinitialize(int display)
#endif
putreg32(0, LPC17_LCD_INTMSK);
ginfo("Enabling the display\n");
lcdinfo("Enabling the display\n");
for (i = LPC17_LCD_PWREN_DELAY; i; i--);
@ -727,7 +727,7 @@ int up_fbinitialize(int display)
FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
{
ginfo("vplane: %d\n", vplane);
lcdinfo("vplane: %d\n", vplane);
if (vplane == 0)
{
return &g_fbobject;
@ -801,16 +801,16 @@ void lpc17_lcdclear(nxgl_mxpixel_t color)
#if LPC17_BPP > 16
uint32_t *dest = (uint32_t *)CONFIG_LPC17_LCD_VRAMBASE;
ginfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint32_t));
lcdinfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint32_t));
#else
uint16_t *dest = (uint16_t *)CONFIG_LPC17_LCD_VRAMBASE;
ginfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint16_t));
lcdinfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint16_t));
#endif
for (i = 0; i < (CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT); i++)

2
arch/arm/src/lpc17xx/lpc17_mcpwm.c
View File

@ -655,7 +655,7 @@ FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer)
#endif
default:
pwmerr("No such timer configured\n");
pwmerr("ERROR: No such timer configured\n");
return NULL;
}

2
arch/arm/src/lpc17xx/lpc17_pwm.c
View File

@ -626,7 +626,7 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer)
#endif
default:
pwmerr("No such timer configured\n");
pwmerr("ERROR: No such timer configured\n");
return NULL;
}

14
arch/arm/src/lpc17xx/lpc17_sdcard.c
View File

@ -810,7 +810,7 @@ static void lpc17_dmacallback(DMA_HANDLE handle, void *arg, int status)
if (status < 0)
{
fllerr("DMA error %d, remaining: %d\n", status, priv->remaining);
dmallerr("ERROR: DMA error %d, remaining: %d\n", status, priv->remaining);
result = SDIOWAIT_ERROR;
}
else
@ -1077,7 +1077,7 @@ static void lpc17_eventtimeout(int argc, uint32_t arg)
/* Yes.. wake up any waiting threads */
lpc17_endwait(priv, SDIOWAIT_TIMEOUT);
fllerr("Timeout: remaining: %d\n", priv->remaining);
mcllerr("ERROR: Timeout: remaining: %d\n", priv->remaining);
}
}
@ -1294,7 +1294,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
fllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
mcllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1304,7 +1304,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
fllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
mcllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
}
@ -1314,7 +1314,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
fllerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
mcllerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1324,7 +1324,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
fllerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
mcllerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1334,7 +1334,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
fllerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
mcllerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
}

2
arch/arm/src/lpc17xx/lpc17_serial.c
View File

@ -1153,7 +1153,7 @@ static int up_interrupt(int irq, void *context)
default:
{
_err("Unexpected IIR: %02x\n", status);
_err("ERROR: Unexpected IIR: %02x\n", status);
break;
}
}

6
arch/arm/src/lpc17xx/lpc17_spi.c
View File

@ -267,7 +267,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
spierr("Frequency %d->%d\n", frequency, actual);
spiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -429,7 +429,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
spierr("nwords: %d\n", nwords);
spiinfo("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@ -474,7 +474,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spierr("nwords: %d\n", nwords);
spiinfo("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the

9
arch/arm/src/lpc17xx/lpc17_usbdev.c
View File

@ -102,10 +102,13 @@
#ifdef CONFIG_DEBUG_USB
# define USB_ERROR_INT USBDEV_INT_ERRINT
#else
# undef CONFIG_LPC17_USBDEV_REGDEBUG
# define USB_ERROR_INT 0
#endif
#ifndef CONFIG_DEBUG_USB_INFO
# undef CONFIG_LPC17_USBDEV_REGDEBUG
#endif
/* CLKCTRL enable bits */
#define LPC17_CLKCTRL_ENABLES (USBDEV_CLK_DEVCLK|USBDEV_CLK_AHBCLK)
@ -531,7 +534,7 @@ static struct lpc17_dmadesc_s g_usbddesc[CONFIG_LPC17_USBDEV_NDMADESCRIPTORS];
#ifdef CONFIG_LPC17_USBDEV_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
_llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
ullinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@ -581,7 +584,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
_llerr("[repeats %d more times]\n", count);
ullinfo("[repeats %d more times]\n", count);
}
}

30
arch/arm/src/lpc17xx/lpc17_usbhost.c
View File

@ -88,6 +88,10 @@
# define CONFIG_LPC17_USBHOST_NPREALLOC 8
#endif
#ifndef CONFIG_DEBUG_USB_INFO
# undef CONFIG_LPC17_USBHOST_REGDEBUG
#endif
/* OHCI Setup ******************************************************************/
/* Frame Interval / Periodic Start */
@ -114,7 +118,7 @@
/* Dump GPIO registers */
#if defined(CONFIG_LPC17_USBHOST_REGDEBUG) && defined(CONFIG_DEBUG_GPIO_INFO)
#ifdef CONFIG_LPC17_USBHOST_REGDEBUG
# define usbhost_dumpgpio() \
do { \
lpc17_dumpgpio(GPIO_USB_DP, "D+ P0.29; D- P0.30"); \
@ -456,7 +460,7 @@ static struct lpc17_xfrinfo_s g_xfrbuffers[CONFIG_LPC17_USBHOST_NPREALLOC];
#ifdef CONFIG_LPC17_USBHOST_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
_llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
ullinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@ -506,7 +510,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
_llerr("[repeats %d more times]\n", count);
ullinfo("[repeats %d more times]\n", count);
}
}
@ -1694,7 +1698,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
}
else
{
ullerr("Spurious status change (connected)\n");
ullwarn("WARNING: Spurious status change (connected)\n");
}
/* The LSDA (Low speed device attached) bit is valid
@ -1750,7 +1754,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
}
else
{
ullerr("Spurious status change (disconnected)\n");
ullwarn("WARNING: Spurious status change (disconnected)\n");
}
}
@ -1967,8 +1971,8 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
uerr("RHport Connected: %s\n",
connport->connected ? "YES" : "NO");
uinfo("RHport Connected: %s\n",
connport->connected ? "YES" : "NO");
return OK;
}
@ -1987,7 +1991,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
uerr("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
#endif
@ -2041,7 +2045,7 @@ static int lpc17_rh_enumerate(struct usbhost_connection_s *conn,
{
/* No, return an error */
uerr("Not connected\n");
uwarn("WARNING: Not connected\n");
return -ENODEV;
}
@ -3695,7 +3699,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
lpc17_configgpio(GPIO_USB_OVRCR); /* USB port Over-Current status */
usbhost_dumpgpio();
uerr("Initializing Host Stack\n");
uinfo("Initializing Host Stack\n");
/* Show AHB SRAM memory map */
@ -3825,7 +3829,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt) != 0)
{
uerr("Failed to attach IRQ\n");
uerr("ERROR: Failed to attach IRQ\n");
return NULL;
}
@ -3850,8 +3854,8 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
/* Enable interrupts at the interrupt controller */
up_enable_irq(LPC17_IRQ_USB); /* enable USB interrupt */
uerr("USB host Initialized, Device connected:%s\n",
priv->connected ? "YES" : "NO");
uinfo("USB host Initialized, Device connected:%s\n",
priv->connected ? "YES" : "NO");
return &g_usbconn;
}