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STM32 OTGFS Host: Fix a logic error introduced in the last check-in

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This commit is contained in:
Gregory Nutt 2014-04-12 09:33:52 -06:00
parent aefb741a6a
commit 7bf7d8ebf6
3 changed files with 36 additions and 33 deletions
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4
arch/arm/src/stm32/Make.defs
View File

@ -34,7 +34,7 @@
############################################################################
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
HEAD_ASRC =
HEAD_ASRC =
else
HEAD_ASRC = stm32_vectors.S
endif
@ -90,7 +90,7 @@ CMN_CSRCS += up_copyarmstate.c
endif
endif
CHIP_ASRCS =
CHIP_ASRCS =
CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c
CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c stm32_irq.c

53
arch/arm/src/stm32/stm32_otgfshost.c
View File

@ -98,7 +98,7 @@
* packets. Depends on CONFIG_DEBUG.
*/
/* Pre-requistites (partial) */
/* Pre-requisites (partial) */
#ifndef CONFIG_STM32_SYSCFG
# error "CONFIG_STM32_SYSCFG is required"
@ -135,6 +135,11 @@
# undef CONFIG_STM32_USBHOST_PKTDUMP
#endif
#undef HAVE_USB_TRACE 1
#if defined(CONFIG_USBHOST_TRACE) || (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
# define HAVE_USB_TRACE 1
#endif
/* HCD Setup *******************************************************************/
/* Hardware capabilities */
@ -719,22 +724,26 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
switch (priv->chan[chidx].eptype)
{
case OTGFS_EPTYPE_CTRL:
case OTGFS_EPTYPE_BULK:
{
if (priv->chan[chidx].in)
#ifdef HAVE_USB_TRACE
uint16_t intrace;
uint16_t outtrace;
/* Determine the definitive trace ID to use below */
if (priv->chan[chidx].eptype == OTGFS_EPTYPE_CTRL)
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_CTRL_IN, chidx,
priv->chan[chidx].epno);
intrace = OTGFS_VTRACE2_CHANCONF_CTRL_IN;
outtrace = OTGFS_VTRACE2_CHANCONF_CTRL_OUT;
}
else
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_CTRL_OUT, chidx,
priv->chan[chidx].epno);
intrace = OTGFS_VTRACE2_CHANCONF_BULK_IN;
outtrace = OTGFS_VTRACE2_CHANCONF_BULK_OUT;
}
}
break;
#endif
case OTGFS_EPTYPE_BULK:
{
/* Interrupts required for CTRL and BULK endpoints */
regval |= (OTGFS_HCINT_XFRC | OTGFS_HCINT_STALL | OTGFS_HCINT_NAK |
@ -744,14 +753,12 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
if (priv->chan[chidx].in)
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_BULK_IN, chidx,
priv->chan[chidx].epno);
usbhost_vtrace2(intrace, chidx, priv->chan[chidx].epno);
regval |= OTGFS_HCINT_BBERR;
}
else
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_BULK_OUT, chidx,
priv->chan[chidx].epno);
usbhost_vtrace2(outtrace, chidx, priv->chan[chidx].epno);
regval |= OTGFS_HCINT_NYET;
}
}
@ -772,11 +779,13 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
priv->chan[chidx].epno);
regval |= OTGFS_HCINT_BBERR;
}
#ifdef HAVE_USB_TRACE
else
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_INTR_OUT, chidx,
priv->chan[chidx].epno);
}
#endif
}
break;
@ -794,11 +803,13 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
priv->chan[chidx].epno);
regval |= (OTGFS_HCINT_TXERR | OTGFS_HCINT_BBERR);
}
#ifdef HAVE_USB_TRACE
else
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_ISOC_OUT, chidx,
priv->chan[chidx].epno);
}
#endif
}
break;
}
@ -1044,16 +1055,9 @@ static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv,
if (chan->result != EBUSY && chan->waiter)
{
if (chan->in)
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANWAKEUP_IN, chan->epno,
chan->result);
}
else
{
usbhost_vtrace2(OTGFS_VTRACE2_CHANWAKEUP_OUT, chan->epno,
chan->result);
}
usbhost_vtrace2(chan->in ? OTGFS_VTRACE2_CHANWAKEUP_IN :
OTGFS_VTRACE2_CHANWAKEUP_OUT,
chan->epno, chan->result);
stm32_givesem(&chan->waitsem);
chan->waiter = false;
@ -1112,7 +1116,6 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx)
{
npackets = STM32_MAX_PKTCOUNT;
chan->buflen = STM32_MAX_PKTCOUNT * maxpacket;
usbhost_trace2(OTGFS_TRACE2_CLIP, chidx, chan->buflen);
}
}

12
arch/arm/src/stm32/stm32_usbhost.h
View File

@ -172,14 +172,14 @@ extern "C" {
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32 OTG FS host interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* "The application uses this field to control power to this port, and the core
* clears this bit on an overcurrent condition."
*
* Input Parameters: