From 7bfa4e299c8d806b7daa201872df69d216f5ac10 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 2 Jun 2013 13:16:35 -0600 Subject: [PATCH] Add missing NSH configuration settings. Correct some conditional logic for STM32 FALSH pre-fetch settings. From Lorenz Meier --- ChangeLog | 5 +++++ arch/arm/src/stm32/stm32f20xxx_rcc.c | 2 +- arch/arm/src/stm32/stm32f40xxx_rcc.c | 2 +- configs/mikroe-stm32f4/src/up_clockconfig.c | 2 +- 4 files changed, 8 insertions(+), 3 deletions(-) diff --git a/ChangeLog b/ChangeLog index 3fdb1e4158..248130c1be 100644 --- a/ChangeLog +++ b/ChangeLog @@ -4858,3 +4858,8 @@ * arch/arm/src/sam3u: Renamed files to sam_* vs. sam3u_*. Eliminated sam3u_internal.h; instead uses individual header files for each SAM interface block (2013-6-2). + * arch/arm/src/stm32/stm32f20xxx_rcc.c and stm32f40xxx_rcc.c, and + configs/mikroe-stm32f4/src/up_clockconfig.c. Correct some bad + conditional compilation (CONFIG_ missing from setting name). This + affects some STM32 FLASH pre-fetch settings. From Lorenz Meier + (2013-6-2). diff --git a/arch/arm/src/stm32/stm32f20xxx_rcc.c b/arch/arm/src/stm32/stm32f20xxx_rcc.c index ac72fb60bc..dd796f86c2 100644 --- a/arch/arm/src/stm32/stm32f20xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f20xxx_rcc.c @@ -631,7 +631,7 @@ static void stm32_stdclockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); diff --git a/arch/arm/src/stm32/stm32f40xxx_rcc.c b/arch/arm/src/stm32/stm32f40xxx_rcc.c index fc7fe1697d..82757c43f6 100644 --- a/arch/arm/src/stm32/stm32f40xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f40xxx_rcc.c @@ -669,7 +669,7 @@ static void stm32_stdclockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); diff --git a/configs/mikroe-stm32f4/src/up_clockconfig.c b/configs/mikroe-stm32f4/src/up_clockconfig.c index 9618cf8dd5..3c55bd9501 100644 --- a/configs/mikroe-stm32f4/src/up_clockconfig.c +++ b/configs/mikroe-stm32f4/src/up_clockconfig.c @@ -128,7 +128,7 @@ void stm32_board_clockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);