Fix for clean PIC32 compile with DEBUG on
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3639 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
parent
f2fcf596a0
commit
7c1bb4bce3
@ -137,7 +137,7 @@ static void up_registerdump(uint32_t *regs)
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#ifdef CONFIG_NUTTX_KERNEL
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static inline void dispatch_syscall(uint32_t *regs)
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{
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uint32_t cmd = regs[REG_R0];
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uint32_t cmd = regs[REG_A0];
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FAR _TCB *rtcb = sched_self();
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uintptr_t ret = (uintptr_t)ERROR;
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@ -182,43 +182,43 @@ static inline void dispatch_syscall(uint32_t *regs)
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/* Number of parameters: 1 */
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case 1:
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ret = g_stublookup[index].stub1(regs[REG_R5]);
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ret = g_stublookup[index].stub1(regs[REG_A1]);
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break;
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/* Number of parameters: 2 */
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case 2:
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ret = g_stublookup[index].stub2(regs[REG_R5], regs[REG_R6]);
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ret = g_stublookup[index].stub2(regs[REG_A1], regs[REG_A2]);
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break;
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/* Number of parameters: 3 */
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case 3:
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ret = g_stublookup[index].stub3(regs[REG_R5], regs[REG_R6],
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regs[REG_R7]);
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ret = g_stublookup[index].stub3(regs[REG_A1], regs[REG_A2],
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regs[REG_A3]);
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break;
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/* Number of parameters: 4 */
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case 4:
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ret = g_stublookup[index].stub4(regs[REG_R5], regs[REG_R6],
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regs[REG_R7], regs[REG_R8]);
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ret = g_stublookup[index].stub4(regs[REG_A1], regs[REG_A2],
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regs[REG_A3], regs[REG_T0]);
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break;
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/* Number of parameters: 5 */
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case 5:
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ret = g_stublookup[index].stub5(regs[REG_R5], regs[REG_R6],
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regs[REG_R7], regs[REG_R8],
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regs[REG_R9]);
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ret = g_stublookup[index].stub5(regs[REG_A1], regs[REG_A2],
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regs[REG_A3], regs[REG_T0],
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regs[REG_T1]);
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break;
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/* Number of parameters: 6 */
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case 6:
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ret = g_stublookup[index].stub6(regs[REG_R5], regs[REG_R6],
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regs[REG_R7], regs[REG_R8],
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regs[REG_R9], regs[REG_R10]);
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ret = g_stublookup[index].stub6(regs[REG_A1], regs[REG_A2],
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regs[REG_A3], regs[REG_T0],
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regs[REG_T1], regs[REG_T2]);
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break;
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/* Unsupported number of paramters. Report error and return ERROR */
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@ -245,10 +245,10 @@ static inline void dispatch_syscall(uint32_t *regs)
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regs = rtcb->xcp.regs;
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}
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/* Then return the result in R0 */
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/* Then return the result in v0 */
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swidbg("Return value regs: %p value: %d\n", regs, ret);
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regs[REG_R0] = (uint32_t)ret;
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regs[REG_v0] = (uint32_t)ret;
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}
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#endif
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@ -271,8 +271,9 @@ int up_swint0(int irq, FAR void *context)
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DEBUGASSERT(regs && regs == current_regs);
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/* Software interrupt 0 is invoked with REG_R4 = system call command and
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* REG_R5..R10 = variable number of arguments depending on the system call.
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/* Software interrupt 0 is invoked with REG_A0 (REG_R4) = system call
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* command and REG_A1-3 and REG_T0-2 (REG_R5-10) = variable number of
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* arguments depending on the system call.
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*/
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#ifdef DEBUG_SWINT0
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@ -301,8 +302,8 @@ int up_swint0(int irq, FAR void *context)
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case SYS_restore_context:
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{
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DEBUGASSERT(regs[REG_R5] != 0);
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current_regs = (uint32_t*)regs[REG_R5];
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DEBUGASSERT(regs[REG_A1] != 0);
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current_regs = (uint32_t*)regs[REG_A1];
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}
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break;
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@ -324,9 +325,9 @@ int up_swint0(int irq, FAR void *context)
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case SYS_switch_context:
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{
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DEBUGASSERT(regs[REG_R5] != 0 && regs[REG_R6] != 0);
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memcpy((uint32_t*)regs[REG_R5], regs, XCPTCONTEXT_SIZE);
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current_regs = (uint32_t*)regs[REG_R6];
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DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0);
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memcpy((uint32_t*)regs[REG_A1], regs, XCPTCONTEXT_SIZE);
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current_regs = (uint32_t*)regs[REG_A2];
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}
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break;
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@ -339,7 +340,7 @@ int up_swint0(int irq, FAR void *context)
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#ifdef CONFIG_NUTTX_KERNEL
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dispatch_syscall(regs);
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#else
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slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
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slldbg("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
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#endif
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break;
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}
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@ -354,7 +355,7 @@ int up_swint0(int irq, FAR void *context)
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}
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else
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{
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swidbg("SWInt Return: %d\n", regs[REG_R2]);
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swidbg("SWInt Return: %d\n", regs[REG_V0]);
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}
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#endif
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@ -484,6 +484,19 @@
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# error "CONFIG_PIC32MX_USBPRIO is too large"
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#endif
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/* SYS calls ************************************************************************/
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/* SYS call 0 and 1 are defined for internal use by the PIC32MX port (see
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* arch/mips/include/mips32/syscall.h
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*/
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#ifdef CONFIG_NUTTX_KERNEL
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# if !defined(CONFIG_SYS_RESERVED) || CONFIG_SYS_RESERVED < 2
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# error "CONFIG_SYS_RESERVED must be defined to be 2 for a kernel build"
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# elif CONFIG_SYS_RESERVED > 2
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# warning "CONFIG_SYS_RESERVED should be defined to be 2 for a kernel build"
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# endif
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#endif
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/* UARTs ****************************************************************************/
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/* Don't enable UARTs not supported by the chip. */
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@ -41,10 +41,13 @@
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include <arch/pic32mx/cp0.h>
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#include "up_arch.h"
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#include "os_internal.h"
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@ -9,10 +9,157 @@ MCU plus voltage regulation, debug interface, and an OTG connector.
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Contents
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========
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PIC32MX460F512L Pin Out
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MAX3232 Connection
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Toolchains
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PIC32MX Configuration Options
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Configurations
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PIC32MX460F512L Pin Out
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=======================
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PIC32MX460F512L 100-Pin TQFP (USB) Pin Out. The mapping to the pins on
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the PCL Logic board are very simple, each pin is brought out to a connector
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label with the PIC32MX460F512L pin number.
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On board logic only manages power, crystal, and USB signals.
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LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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1 RG15
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2 Vdd
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3 PMD5/RE5
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4 PMD6/RE6
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5 PMD7/RE7
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6 T2CK/RC1
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7 T3CK/RC2
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8 T4CK/RC3
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9 T5CK/SDI1/RC4
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10 SCK2/PMA5/CN8/RG6
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11 SDI2/PMA4/CN9/RG7
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12 SDO2/PMA3/CN10/RG8
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13 MCLR
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14 SS2/PMA2/CN11/RG9
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15 Vss
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16 Vdd
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17 TMS/RA0
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18 INT1/RE8
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19 INT2/RE9
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20 AN5/C1IN+/VBUSON/CN7/RB5
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21 AN4/C1IN-/CN6/RB4
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22 AN3/C2IN+/CN5/RB3
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23 AN2/C2IN-/CN4/RB2
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24 PGEC1/AN1/CN3/RB1
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25 PGED1/AN0/CN2/RB0
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BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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26 PGEC2/AN6/OCFA/RB6
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27 PGED2/AN7/RB7
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28 VREF-/CVREF-/PMA7/RA9
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29 VREF+/CVREF+/PMA6/RA10
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30 AVdd
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31 AVss
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32 AN8/C1OUT/RB8
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33 AN9/C2OUT/RB9
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34 AN10/CVREFOUT/PMA13/RB10
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35 AN11/PMA12/RB11
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36 Vss
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37 Vdd
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38 TCK/RA1
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39 U2RTS/RF13
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40 U2CTS/RF12
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41 AN12/PMA11/RB12
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42 AN13/PMA10/RB13
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43 AN14/PMALH/PMA1/RB14
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44 AN15/OCFB/PMALL/PMA0/CN12/RB15
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45 Vss
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46 Vdd
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47 U1CTS/CN20/RD14
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48 U1RTS/CN21/RD15
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49 U2RX/PMA9/CN17/RF4
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50 U2TX/PMA8/CN18/RF5
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RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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75 Vss
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74 SOSCO/T1CK/CN0/RC14
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73 SOSCI/CN1/RC13
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72 SDO1/OC1/INT0/RD0
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71 IC4/PMCS1/PMA14/RD11
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70 SCK1/IC3/PMCS2/PMA15/RD10
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69 SS1/IC2/RD9
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68 RTCC/IC1/RD8
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67 SDA1/INT4/RA15
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66 SCL1/INT3/RA14
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65 Vss
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64 OSC2/CLKO/RC15
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63 OSC1/CLKI/RC12
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62 Vdd
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61 TDO/RA5
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60 TDI/RA4
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59 SDA2/RA3
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58 SCL2/RA2
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57 D+/RG2
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56 D-/RG3
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55 VUSB
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54 VBUS
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53 U1TX/RF8
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52 U1RX/RF2
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51 USBID/RF3
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TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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100 PMD4/RE4
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99 PMD3/RE3
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98 PMD2/RE2
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97 TRD0/RG13
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96 TRD1/RG12
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95 TRD2/RG14
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94 PMD1/RE1
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93 PMD0/RE0
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92 TRD3/RA7
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91 TRCLK/RA6
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90 PMD8/RG0
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89 PMD9/RG1
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88 PMD10/RF1
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87 PMD11/RF0
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86 ENVREG
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85 Vcap/Vddcore
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84 PMD15/CN16/RD7
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83 PMD14/CN15/RD6
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82 PMRD/CN14/RD5
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81 OC5/PMWR/CN13/RD4
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80 PMD13/CN19/RD13
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79 IC5/PMD12/RD12
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78 OC4/RD3
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77 OC3/RD2
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76 OC2/RD1
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Additional Signals available from the board:
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PROGRAM CONNECTOR: Vpp Vdd GND PGED1 PGEC1 NC PGED2 PGEC2
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POWER POINTS: +5Vin +3.3V AVdd AGND Vdd GND USB+5V
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MAX3232 Connection
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==================
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I use a tiny, MAX3232 board that I got from the eBay made by NKC
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Electronics (http://www.nkcelectronics.com/). As of this writing, it
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is also available here: http://www.nkcelectronics.com/rs232-to-ttl-3v--55v-convert232356.html
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CTS -- Not connected
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RTS -- Not connected
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TX -- Pin 53: U1TX/RF8
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RX -- Pin 52: U1RX/RF2
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GND -- POWER POINT: GND
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Vcc -- POWER POINT: Vdd (3.3V) -- Or P32_VBUS (+5V)
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-- Or +5V from a USB PC port.
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Toolchains
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==========
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@ -66,7 +213,7 @@ Toolchains
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building on C:), then you may need to modify tools/mkdeps.sh
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PIC32MX Configuration Options
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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=============================
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General Architecture Settings:
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@ -246,7 +393,7 @@ PIC32MX Configuration Options
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PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host)
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Configurations
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^^^^^^^^^^^^^^
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==============
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Each PIC32MX configuration is maintained in a sudirectory and can be
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selected as follow:
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@ -166,4 +166,4 @@ int fputs(FAR const char *s, FAR FILE *stream)
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}
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return nput;
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}
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#endif
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#endif
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