arch/stm32f7: Fix nxstyle errors
arch/arm/src/stm32f7/stm32_config.h,
arch/arm/src/stm32f7/stm32_dma.h,
arch/arm/src/stm32f7/stm32_dma2d.h,
arch/arm/src/stm32f7/stm32_dtcm.h,
arch/arm/src/stm32f7/stm32_dumpgpio.c,
arch/arm/src/stm32f7/stm32_ethernet.h,
arch/arm/src/stm32f7/stm32_gpio.c,
arch/arm/src/stm32f7/stm32_gpio.h:
* Fix nxstyle errors.
This commit is contained in:
Nathan Hartman
Abdelatif Guettouche
parent
01699e00e0
commit
7c5174a53b
@ -48,6 +48,7 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* GPIO IRQs ****************************************************************/
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#ifndef CONFIG_STM32F7_GPIO_IRQ
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@ -75,6 +76,7 @@
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#endif
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/* UARTs ********************************************************************/
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/* Don't enable UARTs not supported by the chip. */
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#if STM32F7_NUART < 1
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@ -109,6 +111,7 @@
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#endif
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/* USARTs *******************************************************************/
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/* If the USART is not being used as a UART, then it really isn't enabled
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* for our purposes.
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*/
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@ -145,6 +148,7 @@
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#endif
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/* UART Flow Control ********************************************************/
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/* UARTs do not support flow control */
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#undef CONFIG_UART0_IFLOWCONTROL
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@ -164,8 +168,11 @@
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#endif
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/* Serial Console ***********************************************************/
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/* Is there a serial console? There should be no more than one defined. It
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* could be on any UARTn, n=1,..,STM32F7_NUART, or USARTn, n=1,.., STM32F7_NUSART
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/* Is there a serial console? There should be no more than one defined.
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* It could be on any:
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* UARTn, n=1..STM32F7_NUART, or
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* USARTn, n=1..STM32F7_NUSART
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*/
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#undef HAVE_SERIAL_CONSOLE
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@ -252,7 +259,8 @@
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# undef CONFIG_USART2_SERIAL_CONSOLE
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#endif
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/* SPI ******************************************************************************/
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/* SPI **********************************************************************/
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/* Don't enable SPI peripherals not supported by the chip. */
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#if CHIP_NSPI < 1
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@ -286,7 +294,7 @@
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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* Public Function Prototypes
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****************************************************************************/
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#endif /* __ARCH_ARM_SRC_STM32F7_STM32_CONFIG_H */
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@ -1,4 +1,4 @@
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/************************************************************************************
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/****************************************************************************
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* arch/arm/src/stm32f7/stm32_dma.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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@ -31,22 +31,22 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F7_STM32_DMA_H
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#define __ARCH_ARM_SRC_STM32F7_STM32_DMA_H
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/************************************************************************************
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/****************************************************************************
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* Included Files
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************************************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include "hardware/stm32_dma.h"
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/* These definitions provide the bit encoding of the 'status' parameter passed to the
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* DMA callback function (see dma_callback_t).
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/* These definitions provide the bit encoding of the 'status' parameter
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* passed to the DMA callback function (see dma_callback_t).
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*/
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#define DMA_STATUS_FEIF 0 /* Stream FIFO error (ignored) */
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@ -55,14 +55,14 @@
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#define DMA_STATUS_HTIF DMA_STREAM_HTIF_BIT /* Stream Half Transfer */
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#define DMA_STATUS_TCIF DMA_STREAM_TCIF_BIT /* Stream Transfer Complete */
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#define DMA_STATUS_ERROR (DMA_STATUS_FEIF|DMA_STATUS_DMEIF|DMA_STATUS_TEIF)
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#define DMA_STATUS_SUCCESS (DMA_STATUS_TCIF|DMA_STATUS_HTIF)
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#define DMA_STATUS_ERROR (DMA_STATUS_FEIF | DMA_STATUS_DMEIF | DMA_STATUS_TEIF)
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#define DMA_STATUS_SUCCESS (DMA_STATUS_TCIF | DMA_STATUS_HTIF)
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/************************************************************************************
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/****************************************************************************
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* Public Types
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************************************************************************************/
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****************************************************************************/
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/* DMA_HANDLE Provides an opaque are reference that can be used to represent a DMA
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/* DMA_HANDLE Provides an opaque are reference that can be used to represent
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* a DMA stream.
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*/
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@ -70,16 +70,16 @@ typedef FAR void *DMA_HANDLE;
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/* Description:
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* This is the type of the callback that is used to inform the user of the
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* completion of the DMA. NOTE: The DMA module does *NOT* perform any cache
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* operations. It is the responsibility of the DMA client to invalidate DMA
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* buffers after completion of the DMA RX operations.
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* completion of the DMA. NOTE: The DMA module does *NOT* perform any
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* cache operations. It is the responsibility of the DMA client to
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* invalidate DMA buffers after completion of the DMA RX operations.
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*
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* Input Parameters:
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* handle - Refers tot he DMA channel or stream
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* status - A bit encoded value that provides the completion status. See the
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* DMASTATUS_* definitions above.
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* arg - A user-provided value that was provided when stm32_dmastart() was
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* called.
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* status - A bit encoded value that provides the completion status. See
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* the DMASTATUS_* definitions above.
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* arg - A user-provided value that was provided when stm32_dmastart()
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* was called.
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*/
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typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
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@ -96,9 +96,9 @@ struct stm32_dmaregs_s
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uint32_t sfcr;
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};
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/************************************************************************************
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/****************************************************************************
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* Public Data
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************************************************************************************/
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****************************************************************************/
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#ifndef __ASSEMBLY__
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@ -111,9 +111,9 @@ extern "C"
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_dmachannel
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@ -158,11 +158,13 @@ DMA_HANDLE stm32_dmachannel(unsigned int chan);
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* Name: stm32_dmafree
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*
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* Description:
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* Release a DMA channel. If another thread is waiting for this DMA channel
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* in a call to stm32_dmachannel, then this function will re-assign the
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* DMA channel to that thread and wake it up. NOTE: The 'handle' used
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* in this argument must NEVER be used again until stm32_dmachannel() is
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* called again to re-gain access to the channel.
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* Release a DMA channel. If another thread is waiting for this DMA
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* channel in a call to stm32_dmachannel, then this function will re-
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* assign the DMA channel to that thread and wake it up.
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*
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* NOTE: The 'handle' used in this argument must NEVER be used again
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* until stm32_dmachannel() is called again to re-gain access to
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* the channel.
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*
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* Returned Value:
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* None
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@ -237,15 +239,15 @@ size_t stm32_dmaresidual(DMA_HANDLE handle);
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* Description:
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* Check if the DMA controller can transfer data to/from given memory
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* address with the given configuration. This depends on the internal
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* connections in the ARM bus matrix of the processor. Note that this
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* only applies to memory addresses, it will return false for any peripheral
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* connections in the ARM bus matrix of the processor. Note that this only
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* applies to memory addresses, it will return false for any peripheral
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* address.
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*
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* Input Parameters:
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*
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* maddr - starting memory address
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* count - number of unit8 or uint16 or uint32 items as defined by MSIZE of
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* ccr.
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* count - number of unit8 or uint16 or uint32 items as defined by MSIZE
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* of ccr.
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* ccr - DMA stream configuration register
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*
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* Returned Value:
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@ -85,9 +85,8 @@ struct dma2d_layer_s
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/* Name: fillcolor
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*
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* Description:
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* Fill a specific memory region with a color.
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* The caller must ensure that the memory region (area) is within the entire
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* overlay.
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* Fill a specific memory region with a color. The caller must ensure
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* that the memory region (area) is within the entire overlay.
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*
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* Parameter:
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* oinfo - Reference to overlay information
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@ -106,9 +105,9 @@ struct dma2d_layer_s
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*
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* Description:
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* Copies memory from a source overlay (defined by sarea) to destination
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* overlay position (defined by destxpos and destypos) without pixelformat
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* conversion. The caller must ensure that the memory region (area) is
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* within the entire overlay.
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* overlay position (defined by destxpos and destypos) without
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* pixelformat conversion. The caller must ensure that the memory region
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* (area) is within the entire overlay.
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*
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* Parameter:
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* doverlay - Reference destination overlay
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@ -159,7 +158,7 @@ struct dma2d_layer_s
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};
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/****************************************************************************
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* Public Functions
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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@ -49,7 +49,9 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* Assume that we can support the DTCM heap */
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#define HAVE_DTCM_HEAP 1
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@ -65,6 +65,7 @@
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* Port letters for prettier debug output */
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static const char g_portchar[STM32F7_NGPIO] =
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@ -1,4 +1,4 @@
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/************************************************************************************
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/****************************************************************************
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* arch/arm/src/stm32f7/stm32_ethernet.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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@ -31,14 +31,14 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F7_STM32_ETHERNET_H
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#define __ARCH_ARM_SRC_STM32F7_STM32_ETHERNET_H
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/************************************************************************************
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/****************************************************************************
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* Included Files
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************************************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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@ -47,9 +47,9 @@
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#if STM32F7_NETHERNET > 0
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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@ -60,38 +60,40 @@ extern "C"
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#define EXTERN extern
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#endif
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/************************************************************************************
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/****************************************************************************
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* Function: stm32_ethinitialize
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*
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* Description:
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* Initialize the Ethernet driver for one interface. If the STM32 chip supports
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* multiple Ethernet controllers, then board specific logic must implement
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* arm_netinitialize() and call this function to initialize the desired interfaces.
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* Initialize the Ethernet driver for one interface. If the STM32 chip
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* supports multiple Ethernet controllers, then board specific logic must
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* implement arm_netinitialize() and call this function to initialize the
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* desired interfaces.
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*
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* Input Parameters:
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* intf - In the case where there are multiple EMACs, this value identifies which
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* EMAC is to be initialized.
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* intf - In the case where there are multiple EMACs, this value
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* identifies which EMAC is to be initialized.
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*
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* Returned Value:
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* OK on success; Negated errno on failure.
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*
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* Assumptions:
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*
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************************************************************************************/
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****************************************************************************/
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#if STM32F7_NETHERNET > 1 || defined(CONFIG_NETDEV_LATEINIT)
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int stm32_ethinitialize(int intf);
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#endif
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/************************************************************************************
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/****************************************************************************
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* Function: stm32_phy_boardinitialize
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*
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* Description:
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* Some boards require specialized initialization of the PHY before it can be used.
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* This may include such things as configuring GPIOs, resetting the PHY, etc. If
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* CONFIG_STM32F7_PHYINIT is defined in the configuration then the board specific
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* logic must provide stm32_phyinitialize(); The STM32 Ethernet driver will call
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* this function one time before it first uses the PHY.
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* Some boards require specialized initialization of the PHY before it can
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* be used. This may include such things as configuring GPIOs, resetting
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* the PHY, etc. If CONFIG_STM32F7_PHYINIT is defined in the
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* configuration then the board specific logic must provide
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* stm32_phyinitialize(); The STM32 Ethernet driver will call this
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* function one time before it first uses the PHY.
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*
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* Input Parameters:
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* intf - Always zero for now.
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@ -101,7 +103,7 @@ int stm32_ethinitialize(int intf);
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*
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* Assumptions:
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*
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************************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_STM32F7_PHYINIT
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int stm32_phy_boardinitialize(int intf);
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@ -64,6 +64,7 @@
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* Base addresses for each GPIO block */
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const uint32_t g_gpiobase[STM32F7_NGPIO] =
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@ -164,7 +165,10 @@ int stm32_configgpio(uint32_t cfgset)
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break;
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case GPIO_OUTPUT: /* General purpose output mode */
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stm32_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0); /* Set the initial output value */
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/* Set the initial output value */
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stm32_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0);
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pinmode = GPIO_MODER_OUTPUT;
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break;
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@ -294,18 +298,22 @@ int stm32_configgpio(uint32_t cfgset)
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putreg32(regval, base + STM32_GPIO_OTYPER_OFFSET);
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/* Otherwise, it is an input pin. Should it configured as an EXTI interrupt? */
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/* Otherwise, it is an input pin. Should it configured as an EXTI
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* interrupt?
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*/
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if (pinmode != GPIO_MODER_OUTPUT && (cfgset & GPIO_EXTI) != 0)
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{
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/* "In STM32 F1 the selection of the EXTI line source is performed through
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* the EXTIx bits in the AFIO_EXTICRx registers, while in F2 series this
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* selection is done through the EXTIx bits in the SYSCFG_EXTICRx registers.
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/* "In STM32 F1 the selection of the EXTI line source is performed
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* through the EXTIx bits in the AFIO_EXTICRx registers, while in F2
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* series this selection is done through the EXTIx bits in the
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* SYSCFG_EXTICRx registers.
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*
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* "Only the mapping of the EXTICRx registers has been changed, without any
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* changes to the meaning of the EXTIx bits. However, the range of EXTI
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* bits values has been extended to 0b1000 to support the two ports added
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* in F2, port H and I (in F1 series the maximum value is 0b0110)."
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* "Only the mapping of the EXTICRx registers has been changed,
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* without any changes to the meaning of the EXTIx bits. However, the
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* range of EXTI bits values has been extended to 0b1000 to support
|
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* the two ports added in F2, port H and I (in F1 series the maximum
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* value is 0b0110)."
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*/
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uint32_t regaddr;
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@ -330,14 +338,15 @@ int stm32_configgpio(uint32_t cfgset)
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* Name: stm32_unconfiggpio
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*
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* Description:
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* Unconfigure a GPIO pin based on bit-encoded description of the pin, set it
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* into default HiZ state (and possibly mark it's unused) and unlock it whether
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* it was previously selected as alternative function (GPIO_ALT|GPIO_CNF_AFPP|...).
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* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
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* it into default HiZ state (and possibly mark it's unused) and unlock it
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* whether it was previously selected as alternative function
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* (GPIO_ALT|GPIO_CNF_AFPP|...).
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*
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* This is a safety function and prevents hardware from schocks, as unexpected
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* write to the Timer Channel Output GPIO to fixed '1' or '0' while it should
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* operate in PWM mode could produce excessive on-board currents and trigger
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* over-current/alarm function.
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* This is a safety function and prevents hardware from schocks, as
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* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
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* while it should operate in PWM mode could produce excessive on-board
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* currents and trigger over-current/alarm function.
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*
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* Returned Value:
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* OK on success
|
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@ -425,6 +434,7 @@ bool stm32_gpioread(uint32_t pinset)
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pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
|
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return ((getreg32(base + STM32_GPIO_IDR_OFFSET) & (1 << pin)) != 0);
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}
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return 0;
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}
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@ -437,10 +447,11 @@ bool stm32_gpioread(uint32_t pinset)
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* By default the I/O compensation cell is not used. However when the I/O
|
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* output buffer speed is configured in 50 MHz or 100 MHz mode, it is
|
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* recommended to use the compensation cell for slew rate control on I/O
|
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* tf(IO)out)/tr(IO)out commutation to reduce the I/O noise on power supply.
|
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* tf(IO)out)/tr(IO)out commutation to reduce the I/O noise on power
|
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* supply.
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*
|
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* The I/O compensation cell can be used only when the supply voltage ranges
|
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* from 2.4 to 3.6 V.
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* The I/O compensation cell can be used only when the supply voltage
|
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* ranges from 2.4 to 3.6 V.
|
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*
|
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* Input Parameters:
|
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* None
|
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|
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@ -1,4 +1,4 @@
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/************************************************************************************
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32f7/stm32_gpio.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
@ -31,14 +31,14 @@
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_STM32F7_STM32_GPIO_H
|
||||
#define __ARCH_ARM_SRC_STM32F7_STM32_GPIO_H
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
@ -52,14 +52,14 @@
|
||||
#include "chip.h"
|
||||
#include "hardware/stm32_gpio.h"
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Pre-Processor Declarations
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/* Bit-encoded input to stm32_configgpio() */
|
||||
|
||||
/* Each port bit of the general-purpose I/O (GPIO) ports can be individually configured
|
||||
* by software in several modes:
|
||||
/* Each port bit of the general-purpose I/O (GPIO) ports can be individually
|
||||
* configured by software in several modes:
|
||||
*
|
||||
* - Input floating
|
||||
* - Input pull-up
|
||||
@ -162,7 +162,9 @@
|
||||
#define GPIO_OPENDRAIN (1 << 9) /* Bit9: 1=Open-drain output */
|
||||
#define GPIO_PUSHPULL (0) /* Bit9: 0=Push-pull output */
|
||||
|
||||
/* If the pin is a GPIO digital output, then this identifies the initial output value.
|
||||
/* If the pin is a GPIO digital output, then this identifies the initial
|
||||
* output value.
|
||||
*
|
||||
* If the pin is an input, this bit is overloaded to provide the qualifier to
|
||||
* distinguish input pull-up and -down:
|
||||
*
|
||||
@ -234,9 +236,9 @@
|
||||
# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
|
||||
# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
@ -253,11 +255,11 @@ extern "C"
|
||||
|
||||
EXTERN const uint32_t g_gpiobase[STM32F7_NGPIO];
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_configgpio
|
||||
*
|
||||
* Description:
|
||||
@ -270,48 +272,49 @@ EXTERN const uint32_t g_gpiobase[STM32F7_NGPIO];
|
||||
* OK on success
|
||||
* ERROR on invalid port, or when pin is locked as ALT function.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_configgpio(uint32_t cfgset);
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_unconfiggpio
|
||||
*
|
||||
* Description:
|
||||
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set it
|
||||
* into default HiZ state (and possibly mark it's unused) and unlock it whether
|
||||
* it was previously selected as alternative function (GPIO_ALT|GPIO_CNF_AFPP|...).
|
||||
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
|
||||
* it into default HiZ state (and possibly mark it's unused) and unlock it
|
||||
* whether it was previously selected as alternative function
|
||||
* (GPIO_ALT|GPIO_CNF_AFPP|...).
|
||||
*
|
||||
* This is a safety function and prevents hardware from schocks, as unexpected
|
||||
* write to the Timer Channel Output GPIO to fixed '1' or '0' while it should
|
||||
* operate in PWM mode could produce excessive on-board currents and trigger
|
||||
* over-current/alarm function.
|
||||
* This is a safety function and prevents hardware from schocks, as
|
||||
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
|
||||
* while it should operate in PWM mode could produce excessive on-board
|
||||
* currents and trigger over-current/alarm function.
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success
|
||||
* ERROR on invalid port
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_unconfiggpio(uint32_t cfgset);
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_gpiowrite
|
||||
*
|
||||
* Description:
|
||||
* Write one or zero to the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
void stm32_gpiowrite(uint32_t pinset, bool value);
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_gpioread
|
||||
*
|
||||
* Description:
|
||||
* Read one or zero from the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
bool stm32_gpioread(uint32_t pinset);
|
||||
|
||||
@ -324,10 +327,11 @@ bool stm32_gpioread(uint32_t pinset);
|
||||
* By default the I/O compensation cell is not used. However when the I/O
|
||||
* output buffer speed is configured in 50 MHz or 100 MHz mode, it is
|
||||
* recommended to use the compensation cell for slew rate control on I/O
|
||||
* tf(IO)out)/tr(IO)out commutation to reduce the I/O noise on power supply.
|
||||
* tf(IO)out)/tr(IO)out commutation to reduce the I/O noise on power
|
||||
* supply.
|
||||
*
|
||||
* The I/O compensation cell can be used only when the supply voltage ranges
|
||||
* from 2.4 to 3.6 V.
|
||||
* The I/O compensation cell can be used only when the supply voltage
|
||||
* ranges from 2.4 to 3.6 V.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
@ -357,18 +361,18 @@ void stm32_iocompensation(void);
|
||||
* Zero (OK) on success; a negated errno value on failure indicating the
|
||||
* nature of the failure.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
|
||||
bool event, xcpt_t func, void *arg);
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Function: stm32_dumpgpio
|
||||
*
|
||||
* Description:
|
||||
* Dump all GPIO registers associated with the provided base address
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_GPIO_INFO
|
||||
int stm32_dumpgpio(uint32_t pinset, const char *msg);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user