diff --git a/arch/arm/src/lpc17xx/lpc17_usbdev.c b/arch/arm/src/lpc17xx/lpc17_usbdev.c
index 2e527f670b..5de88aa07f 100644
--- a/arch/arm/src/lpc17xx/lpc17_usbdev.c
+++ b/arch/arm/src/lpc17xx/lpc17_usbdev.c
@@ -1713,7 +1713,7 @@ static inline void lpc17_ep0setup(struct lpc17_usbdev_s *priv)
                  (privep = lpc17_epfindbyaddr(priv, index)) != NULL)
           {
             privep->halted = 0;
-            ret = lpc17_epstall(&privep->ep, true);
+            (void)lpc17_epstall(&privep->ep, true);
             lpc17_epwrite(LPC17_EP0_IN, NULL, 0);
             priv->ep0state = LPC17_EP0STATUSIN;
           }
diff --git a/arch/arm/src/lpc17xx/lpc17_usbhost.c b/arch/arm/src/lpc17xx/lpc17_usbhost.c
index 230821af88..e4e3d9d967 100644
--- a/arch/arm/src/lpc17xx/lpc17_usbhost.c
+++ b/arch/arm/src/lpc17xx/lpc17_usbhost.c
@@ -1089,7 +1089,7 @@ static inline int lpc17_reminted(struct lpc17_usbhost_s *priv,
 
       /* Save the new minimum interval */
 
-      if ((ed->hw.ctrl && ED_CONTROL_D_MASK) == ED_CONTROL_D_IN)
+      if ((ed->hw.ctrl & ED_CONTROL_D_MASK) == ED_CONTROL_D_IN)
         {
           priv->ininterval  = interval;
         }
diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.c b/arch/arm/src/lpc214x/lpc214x_usbdev.c
index f2d1658d8f..bfb2a1e540 100644
--- a/arch/arm/src/lpc214x/lpc214x_usbdev.c
+++ b/arch/arm/src/lpc214x/lpc214x_usbdev.c
@@ -1670,7 +1670,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv)
                  (privep = lpc214x_epfindbyaddr(priv, index)) != NULL)
           {
             privep->halted = 0;
-            ret = lpc214x_epstall(&privep->ep, true);
+            (void)lpc214x_epstall(&privep->ep, true);
             lpc214x_epwrite(LPC214X_EP0_IN, NULL, 0);
             priv->ep0state = LPC214X_EP0STATUSIN;
           }
@@ -2067,6 +2067,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context)
 
           errcode  = (uint8_t)lpc214x_usbcmd(CMD_USB_DEV_READERRORSTATUS, 0) & 0x0f;
           usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPRINT), (uint16_t)errcode);
+          UNUSED(errcode);
         }
 #endif
 
diff --git a/arch/arm/src/lpc2378/lpc23xx_spi.c b/arch/arm/src/lpc2378/lpc23xx_spi.c
index f0e48d3d27..3392e6478e 100644
--- a/arch/arm/src/lpc2378/lpc23xx_spi.c
+++ b/arch/arm/src/lpc2378/lpc23xx_spi.c
@@ -247,14 +247,18 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 
 static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
 {
+#ifndef CONFIG_SPI_OWNBUS
   FAR struct lpc23xx_spidev_s *priv = (FAR struct lpc23xx_spidev_s *)dev;
+#endif
   uint32_t divisor;
   uint32_t actual;
 
-  /* Check if the requested frequence is the same as the frequency selection */
+  DEBUGASSERT(frequency <= SPI_CLOCK / 2);
 
-  DEBUGASSERT(priv && frequency <= SPI_CLOCK / 2);
 #ifndef CONFIG_SPI_OWNBUS
+  /* Check if the requested frequency is the same as the frequency selection */
+
+  DEBUGASSERT(priv);
   if (priv->frequency == frequency)
     {
       /* We are already at this frequency.  Return the actual. */
@@ -316,12 +320,15 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
 
 static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 {
+#ifndef CONFIG_SPI_OWNBUS
   FAR struct lpc23xx_spidev_s *priv = (FAR struct lpc23xx_spidev_s *)dev;
+#endif
   uint32_t regval;
 
+#ifndef CONFIG_SPI_OWNBUS
   /* Has the mode changed? */
 
-#ifndef CONFIG_SPI_OWNBUS
+  DEBUGASSERT(priv);
   if (mode != priv->mode)
     {
 #endif
@@ -379,24 +386,27 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 
 static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
 {
+#ifndef CONFIG_SPI_OWNBUS
   FAR struct lpc23xx_spidev_s *priv = (FAR struct lpc23xx_spidev_s *)dev;
+#endif
   uint32_t regval;
 
-  /* Has the number of bits changed? */
-
-  DEBUGASSERT(priv && nbits > 7 && nbits < 17);
+  DEBUGASSERT(nbits > 7 && nbits < 17);
 
 #ifndef CONFIG_SPI_OWNBUS
+  /* Has the number of bits changed? */
+
+  DEBUGASSERT(priv);
   if (nbits != priv->nbits)
     {
 #endif
       /* Yes... Set CR appropriately */
 
-      regval = getreg32(SPI_CR);
+      regval  = getreg32(SPI_CR);
       regval &= ~SPI_CR_BITS_MASK;
       regval |= (nbits << SPI_CR_BITS_SHIFT) & SPI_CR_BITS_MASK;
       regval |= SPI_CR_BITENABLE;
-      regval = getreg32(SPI_CR);
+      putreg32(regval, SPI_CR);
 
       /* Save the selection so the subsequence re-configurations will be faster */