Squashed commit of the following:

configs/flipnclick-pic32mz:  Switch the serial console to UART4.  Clean up some minor issues the LED options.
    configs/flipnclick-pic32mz:  Add support for two on-board buttons:  T1 and T2.
    configs/flipnclick-pic32mz:  Adds basic board support for the Mikroe Flip&Click PIC32MZ board.  Initial commit is just the configs/pic32mz-starterkit with some name chanages.
This commit is contained in:
Gregory Nutt 2018-01-08 14:21:49 -06:00
parent 6fe1f5a96c
commit 7d4451ee86
29 changed files with 3507 additions and 45 deletions

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@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
<p>Last Updated: January 6, 2018</p>
<p>Last Updated: January 8, 2018</p>
</td>
</tr>
</table>
@ -103,6 +103,8 @@ nuttx/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- fire-stm32v2/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/fire-stm32v2/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- flipnclick-pic32mz/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/flipnclick-pic32mz/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- flipnclick-sam3x/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/flipnclick-sam3x/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- freedom-k64f/

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@ -1647,7 +1647,9 @@ nuttx/
| | `- README.txt
| |- fire-stm32v2/
| | `- README.txt
| |-configs/flipnclick-sam3x/
| |- flipnclick-pic32mz/
| | `- README.txt
| |- flipnclick-sam3x/
| | `- README.txt
| |- freedom-k64f/
| | `- README.txt

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@ -32,7 +32,7 @@ config ARCH_CHIP_PIC32MZ2048EFH
---help---
Microchip PIC32MZ2048EFH (MIPS32 M14K) such as the
PIC32MZ2048EFH144-I/PH used in the PIC32MZ EF STARTER KIT or as the
PIC32MZ2048EFH100 used with the Mikro Flip&Clip for PIC32MZ.
PIC32MZ2048EFH100 used with the Mikroe Flip&Click for PIC32MZ.
config ARCH_CHIP_PIC32MZ2048EFM
bool "PIC32MZ2048EFM"

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@ -196,6 +196,20 @@ config ARCH_BOARD_FIRE_STM32
and 3 of the boards are supported but only version 2 has been
tested.
config ARCH_BOARD_FLIPNCLICK_PIC32MZ
bool "Mikroe Flip&Click PIC32MZ"
depends on ARCH_CHIP_PIC32MZ2048EFH
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
This options selects the Mikroe Flip&Click PIC32MZ board. This
board is an chipKit Arduino-compatible board (but can also be used
with the Mikroe bootloader). It has with four Mikroe Click bus
interfaces in addition to standard Arduino connectors. This board
features the Microchip PIC32MZ2048EFH100 MCU running at 200 MHz
(252Mhz capable).
config ARCH_BOARD_FLIPNCLICK_SAM3X
bool "Mikroe Flip&Click SAM3X"
depends on ARCH_CHIP_ATSAM3X8E
@ -1619,6 +1633,7 @@ config ARCH_BOARD
default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG
default "ez80f910200zco" if ARCH_BOARD_EZ80F910200ZCO
default "fire-stm32v2" if ARCH_BOARD_FIRE_STM32
default "flipnclick-pic32mz" if ARCH_BOARD_FLIPNCLICK_PIC32MZ
default "flipnclick-sam3x" if ARCH_BOARD_FLIPNCLICK_SAM3X
default "freedom-k64f" if ARCH_BOARD_FREEDOM_K64F
default "freedom-k66f" if ARCH_BOARD_FREEDOM_K66F
@ -1844,6 +1859,9 @@ endif
if ARCH_BOARD_FIRE_STM32
source "configs/fire-stm32v2/Kconfig"
endif
if ARCH_BOARD_FLIPNCLICK_PIC32MZ
source "configs/flipnclick-pic32mz/Kconfig"
endif
if ARCH_BOARD_FLIPNCLICK_SAM3X
source "configs/flipnclick-sam3x/Kconfig"
endif

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@ -260,6 +260,13 @@ configs/fire-stm32v2
STM32F103VET6 chip. See http://firestm32.taobao.com . Version 2 and 3 of
the boards are supported but only version 2 has been tested.
configs/flipnclick-pic32mz
Board support for the Mikroe Flip&Click PIC32MZ board. This board is an
chipKit Arduino-compatible board (but can also be used with the Mikroe
bootloader). It has with four Mikroe Click bus interfaces in addition to
standard Arduino connectors. This board features the Microchip
PIC32MZ2048EFH100 MCU running at 200 MHz (252Mhz capable).
configs/flipnclick-sam3x
Board support for the Mikroe Flip&Click STM32X board. This board is an
Arduino-Due work-alike with four Mikroe Click bus interfaces. Like the

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@ -0,0 +1,7 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_FLIPNCLICK_PIC32MZ
endif

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@ -0,0 +1,256 @@
configs/flipnclick-pic32mz README
===============================
This README file discusses the port of NuttX to the Mikroe Flip&Click PIC32MZ
board. That board features the PIC32MZ2048EFH100 MCU.
Contents
========
Port Status
On Board Debug Support
Creating Compatible NuttX HEX files
Tool Issues
Serial Console
LEDs
Configurations
Port Status
===========
2018-01-07: Added architecture support for the PIC32MZ2048EFH100 used on
the Flip&Click PIC32MZ board.
2018-01-08: Created the basic board configuration for the Mikroe
Flip&Click PIC32MZ board. No testing has yet been performed. I need
understand how the memory map is set up when used with the mikroBootloader.
On Board Debug Support
======================
There are several debug options:
1. Using the Aduino IDE (chipKIT core). This is available on the USB-UART
port between the C and D MikroBUS sockets. Usage is described in the
Flip&Click User Manual.
2. Using the mikroC USB HID bootloader. This is is available on the USB
port between the A and B MikroBUS sockets. Usage is described in the
Flip&Click User Manual.
3. There is an undocumented and unpopulated PICKit3 connector between the
B and C mikroBUS sockets.
4. There is an undocumented and unpopulated mikroProg connector between
the A and D mikroBUS sockets.
Creating Compatible NuttX HEX files
===================================
Intel Hex Format Files:
-----------------------
When NuttX is built it will produce two files in the top-level NuttX
directory:
1) nuttx - This is an ELF file, and
2) nuttx.hex - This is an Intel Hex format file. This is controlled by
the setting CONFIG_INTELHEX_BINARY in the .config file.
The PICkit tool wants an Intel Hex format file to burn into FLASH. However,
there is a problem with the generated nutt.hex: The tool expects the nuttx.hex
file to contain physical addresses. But the nuttx.hex file generated from the
top-level make will have address in the KSEG0 and KSEG1 regions.
tools/pic32mx/mkpichex:
----------------------
There is a simple tool in the NuttX tools/pic32mx directory that can be
used to solve both issues with the nuttx.hex file. But, first, you must
build the tool:
cd tools/pic32mx
make
Now you will have an excecutable file call mkpichex (or mkpichex.exe on
Cygwin). This program will take the nutt.hex file as an input, it will
convert all of the KSEG0 and KSEG1 addresses to physical address, and
it will write the modified file, replacing the original nuttx.hex.
To use this file, you need to do the following things:
export PATH=??? # Add the NuttX tools/pic32mx directory to your
# PATH variable
make # Build nuttx and nuttx.hex
mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path
# to the top-level build directory. It is the only
# required input to mkpichex.
Tool Issues
===========
Segger J-Link
-------------
If using a Jlink that only these versions work with PIC32:
J-Link BASE / EDU V9 or later
J-Link ULTRA+ / PRO V4 or later
This is the command to use:
JLinkGDBServer -device PIC32MZ2048EFH100 -if 2-wire-JTAG-PIC32 -speed 12000
Serial Console
==============
[REVISIT: I am not sure if the USB VCOM ports are available to the
software. That is likely another serial port option].
Convenient U[S]ARTs that may be used as the Serial console include:
1) An Arduino Serial Shield. The RX and TX pins are available on the
Arduino connector D0 and D1 pins, respectively. These are connected
to UART5, UART5_RX and UART5_TX which are RD14 and RD15, respectively.
2) Mikroe Click Serial Shield. There are four Click bus connectors with
serial ports available as follows:
Click A: UART4 UART4_RX and UART4_TX which are RG9 and RE3, respectively.
Click B: UART3 UART3_RX and UART3_TX which are RF0 and RF1, respectively.
Click C: UART1 UART1_RX and UART1_TX which are RC1 and RE5, respectively.
Click D: UART2 UART2_RX and UART2_TX which are RC3 and RC2, respectively.
Other serial ports are probably available on the Arduino connector. I
will leave that as an exercise for the interested reader.
The outputs from these pins is 3.3V. You will need to connect RS232
transceiver to get the signals to RS232 levels (or connect to the
USB virtual COM port in the case of UART0).
LEDs and Buttons
================
LEDs
----
There are four LEDs on the top, red side of the board. Only
one can be controlled by software:
LED L - RB14 (SPI3_SCK)
There are also four LEDs on the back, white side of the board:
LED A - RA6
LED B - RA7
LED C - RE0
LED D - RE1
A high output value illuminates the LEDs.
These LEDs are available to the application and are all available to the
application unless CONFIG_ARCH_LEDS is defined. In that case, the usage
by the board port is defined in include/board.h and src/sam_autoleds.c.
The LEDs are used to encode OS-related events as follows:
SYMBOL MEANING LED STATE
L A B C D
---------------- ----------------------- --- --- --- --- ---
LED_STARTED NuttX has been started OFF ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled OFF OFF OFF ON OFF
LED_STACKCREATED Idle stack created OFF OFF OFF OFF ON
LED_INIRQ In an interrupt GLO N/C N/C N/C N/C
LED_SIGNAL In a signal handler GLO N/C N/C N/C N/C
LED_ASSERTION An assertion failed GLO N/C N/C N/C N/C
LED_PANIC The system has crashed 2Hz N/C N/C N/C N/C
LED_IDLE MCU is is sleep mode ---- Not used -----
Thus if LED L is glowing on and all other LEDs are off (except LED D which
was left on but is no longer controlled by NuttX and so may be in any
state), NuttX has successfully booted and is, apparently, running normally
and taking interrupts. If any of LEDs A-D are statically set, then NuttX
failed to boot and the LED indicates the initialization phase where the
failure occurred. If LED L is flashing at approximately 2Hz, then a fatal
error has been detected and the system has halted.
NOTE: After booting, LEDs A-D are no longer used by the system and may
be controlled the application.
Buttons
-------
The Flip&Click PIC32MZ has 2 user push buttons labeled T1 and T2 on the
white side of the board:
PIN LED Notes
----- ---- -------------------------
RD10 T1 Sensed low when closed
RD11 T2 Sensed low when closed
The switches have external pull-up resistors. The switches are pulled high
(+3.3V) and grounded when pressed.
Configurations
==============
Information Common to All Configurations
----------------------------------------
1. Each PIC32MZ configuration is maintained in a sub-directory and can be
selected as follow:
tools/configure.sh flipnclick-pic32mz/<subdir>
Where typical options are -l to configure to build on Linux or -c to
configure for Cygwin under Linux. 'tools/configure.sh -h' will show
you all of the options.
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion
of the make, the nuttx binary will reside in an ELF file called, simply,
nuttx.
make
The <subdir> that is provided above as an argument to the
tools/configure.sh must be is one of the directories listed in the
following paragraph.
2. These configurations uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in the top-level nuttx in order to start
the reconfiguration process.
Configuration Directories
-------------------------
Where <subdir> is one of the following:
nsh:
This is the NuttShell (NSH) using the NSH startup logic at
apps/examples/nsh.
NOTES:
1. Serial Console. UART 4 is configured as the Serial Console. This
assumes that you will be using a Mikroe RS-232 Click card in the
mikroBUS A slot. Other serial consoles may be selected by re-
configuring (see the section "Serial Consoles" above).
2. Toolchain
By default, the Pinguino MIPs tool chain is used. This toolchain
selection can easily be changed with 'make menuconfig'.
3. Default configuration: These are other things that you may want to
change in the configuration:
CONFIG_PIC32MZ_DEBUGGER_ENABLE=n : Debugger is disabled
CONFIG_PIC32MZ_TRACE_ENABLE=n : Trace is disabled
CONFIG_PIC32MZ_JTAG_ENABLE=n : JTAG is disabled

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@ -0,0 +1,334 @@
/****************************************************************************
* configs/flipnclick-pic32mz/include/board.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __CONFIGS_FLIPNCLICK_PIC32MZ_INCLUDE_BOARD_H
#define __CONFIGS_FLIPNCLICK_PIC32MZ_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdbool.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* REVISIT: The PIC32MZ2048EFH100 is capable of operating at 252MHz */
/* Crystal frequencies
*
* - A 24 MHz oscillator circuit (Y4) is connected to the on-board
* microcontroller. This oscillator circuit functions as the controllers
* primary oscillator. Depending on which is populated on the starter kit
* board, a 24 MHz crystal (Y1) may be used instead of Y4.
* - The starter kit also has provisions for an external secondary 32 kHz
* oscillator (Y2); however, this is not populated.
*/
#define BOARD_POSC_FREQ 24000000 /* Primary OSC XTAL frequency (Y4, 24MHz) */
#define BOARD_SOSC_FREQ 32000 /* Secondary OSC XTAL frequency (Y2, 32KHz) */
/* Oscillator modes.
*
* - BOARD_POSC_ECMODE: An external oscillator is connected to OSC1/OSC2
* - BOARD_POSC_HSMODE: An external crystal or resonator is connected to
* OSC1/OSC2
*/
#define BOARD_FNOSC_SPLL 1 /* Use system PLL */
#define BOARD_POSC_ECMODE 1 /* External clock (EC) mode */
#define BOARD_POSC_SWITCH 1 /* Enable clock switching */
#undef BOARD_POSC_FSCM /* Disable clock monitoring */
/* PLL configuration and resulting CPU clock.
* CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV
*/
#define BOARD_PLL_INPUT BOARD_POSC_FREQ
#define BOARD_PLL_IDIV 3 /* PLL input divider */
#define BOARD_PLL_MULT 50 /* PLL multiplier */
#define BOARD_PLL_ODIV 2 /* PLL output divider */
#define BOARD_CPU_CLOCK 200000000 /* CPU clock: 200MHz = (24MHz / 3) * 50 / 2) */
/* Peripheral clocks */
/* PBCLK1
* Peripherals: OSC2 pin
*
* NOTES:
* - PBCLK1 is used by system modules and cannot be turned off
* - PBCLK1 divided by 2 is available on the OSC2 pin in certain clock
* modes.
*/
#define BOARD_PB1DIV 5 /* Divider = 5 */
#define BOARD_PBCLK1 40000000 /* PBCLK1 frequency = 200MHz/5 = 40MHz */
/* PBCLK2
* Peripherals: PMP, I2C, UART, SPI
*/
#define BOARD_PBCLK2_ENABLE 1 /* Enable PBCLK2 */
#define BOARD_PB2DIV 2 /* Divider = 2 */
#define BOARD_PBCLK2 100000000 /* PBCLK2 frequency = 200MHz/2 = 100MHz */
/* PBCLK3
* Peripherals: ADC, Comparator, Timers, Output Compare, Input Compare
*
* NOTES:
* - Timer 1 uses SOSC
*/
#define BOARD_PBCLK3_ENABLE 1 /* Enable PBCLK3 */
#define BOARD_PB3DIV 4 /* Divider = 4 */
#define BOARD_PBCLK3 50000000 /* PBCLK3 frequency = 200MHz/4 = 50MHz */
/* PBCLK4
* Peripherals: Ports
*/
#define BOARD_PBCLK4_ENABLE 1 /* Enable PBCLK4 */
#define BOARD_PB4DIV 2 /* Divider = 2 */
#define BOARD_PBCLK4 100000000 /* PBCLK4 frequency = 200MHz/2 = 100MHz */
/* PBCLK5
* Peripherals: Flash, Crypto, RND, USB, CAN, Ethernet, SQI
*
* NOTES:
* - PBCLK5 is used to fetch data from/to the Flash Controller, while the
* FRC clock is used for programming
*/
#define BOARD_PBCLK5_ENABLE 1 /* Enable PBCLK5 */
#define BOARD_PB5DIV 2 /* Divider = 2 */
#define BOARD_PBCLK5 100000000 /* PBCLK5 frequency = 200MHz/2 = 100MHz */
/* PBCLK6
* Peripherals:
*/
#undef BOARD_PBCLK6_ENABLE
/* PBCLK7
* Peripherals: CPU, Deadman timer
*/
#undef BOARD_PBCLK7_ENABLE
/* PBCLK8
* Peripherals: EBI
*/
#undef BOARD_PBCLK8_ENABLE
/* Watchdog pre-scaler (re-visit) */
#define BOARD_WD_PRESCALER 1048576 /* Watchdog pre-scaler */
/* Ethernet MII clocking.
*
* The clock divider used to create the MII Management Clock (MDC). The MIIM
* module uses the PBCLK5 as an input clock. According to the IEEE 802.3
* Specification this should be no faster than 2.5 MHz. However, some PHYs
* support clock rates up to 12.5 MHz.
*/
#define BOARD_EMAC_MIIM_DIV 40 /* Ideal: 100MHz/40 = 2.5MHz */
/* LED definitions **********************************************************/
/* There are four LEDs on the top, red side of the board. Only one can be
* controlled by software:
*
* LED L - RB14 (SPI3_SCK)
*
* There are also four LEDs on the back, white side of the board:
*
* LED A - RA6
* LED B - RA7
* LED C - RE0
* LED D - RE1
*
* A high output value illuminates the LEDs.
*/
#ifdef CONFIG_ARCH_LEDS
/* LED index values for use with board_userled(): */
# define BOARD_LED_A 0
# define BOARD_LED_B 1
# define BOARD_LED_C 2
# define BOARD_LED_D 3
# define BOARD_NLEDS 4
/* LED bits for use with board_userled_all() */
# define BOARD_LED_A_BIT (1 << BOARD_LED_A)
# define BOARD_LED_B_BIT (1 << BOARD_LED_B)
# define BOARD_LED_C_BIT (1 << BOARD_LED_C)
# define BOARD_LED_D_BIT (1 << BOARD_LED_D)
#else
/* LED index values for use with board_userled(): */
# define BOARD_LED_L 0
# define BOARD_LED_A 1
# define BOARD_LED_B 2
# define BOARD_LED_C 3
# define BOARD_LED_D 4
# define BOARD_NLEDS 5
/* LED bits for use with board_userled_all() */
# define BOARD_LED_L_BIT (1 << BOARD_LED_L)
# define BOARD_LED_A_BIT (1 << BOARD_LED_A)
# define BOARD_LED_B_BIT (1 << BOARD_LED_B)
# define BOARD_LED_C_BIT (1 << BOARD_LED_C)
# define BOARD_LED_D_BIT (1 << BOARD_LED_D)
#endif
/* These LEDs are available to the application and are all available to the
* application unless CONFIG_ARCH_LEDS is defined. In that case, the usage by the
* board port is defined in include/board.h and src/sam_autoleds.c. The LEDs are
* used to encode OS-related events as follows:
*
* SYMBOL MEANING LED STATE
* L A B C D
* ---------------- ----------------------- --- --- --- --- ---*/
#define LED_STARTED 0 /* NuttX has been started OFF ON OFF OFF OFF */
#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON OFF OFF */
#define LED_IRQSENABLED 2 /* Interrupts enabled OFF OFF OFF ON OFF */
#define LED_STACKCREATED 3 /* Idle stack created OFF OFF OFF OFF ON */
#define LED_INIRQ 4 /* In an interrupt GLO N/C N/C N/C N/C */
#define LED_SIGNAL 4 /* In a signal handler GLO N/C N/C N/C N/C */
#define LED_ASSERTION 4 /* An assertion failed GLO N/C N/C N/C N/C */
#define LED_PANIC 4 /* The system has crashed 2Hz N/C N/C N/C N/C */
#undef LED_IDLE /* MCU is is sleep mode ---- Not used ----- */
/* Thus if LED L is glowing on and all other LEDs are off (except LED D which
* was left on but is no longer controlled by NuttX and so may be in any state),
* NuttX has successfully booted and is, apparently, running normally and taking
* interrupts. If any of LEDs A-D are statically set, then NuttX failed to boot
* and the LED indicates the initialization phase where the failure occurred. If
* LED L is flashing at approximately 2Hz, then a fatal error has been detected and
* the system has halted.
*
* NOTE: After booting, LEDs A-D are no longer used by the system and may be
* controlled the application.
*/
/* Switch definitions *******************************************************/
/* The Flip&Click PIC32MZ has 2 user push buttons labeled T1 and T2 on the
* white side of the board:
*
* PIN LED Notes
* ----- ---- -------------------------
* RD10 T1 Sensed low when closed
* RD11 T2 Sensed low when closed
*
* The switches have external pull-up resistors. The switches are pulled high
* (+3.3V) and grounded when pressed.
*/
#define BUTTON_T1 0
#define BUTTON_T2 1
#define NUM_BUTTONS 2
#define BUTTON_T1_BIT (1 << BUTTON_T1)
#define BUTTON_T2_BIT (1 << BUTTON_T2)
/* UARTS ********************************************************************/
/* Convenient U[S]ARTs that may be used as the Serial console include:
*
* 1) An Arduino Serial Shield. The RX and TX pins are available on the
* Arduino connector D0 and D1 pins, respectively. These are connected
* to UART5, UART5_RX and UART5_TX which are RD14 and RD15, respectively.
*
* 2) Mikroe Click Serial Shield. There are four Click bus connectors with
* serial ports available as follows:
*
* Click A: UART4 UART4_RX and UART4_TX which are RG9 and RE3, respectively.
* Click B: UART3 UART3_RX and UART3_TX which are RF0 and RF1, respectively.
* Click C: UART1 UART1_RX and UART1_TX which are RC1 and RE5, respectively.
* Click D: UART2 UART2_RX and UART2_TX which are RC3 and RC2, respectively.
*/
#define BOARD_U1RX_PPS U1RXR_RPC1
#define BOARD_U1TX_PPS U1TX_RPE5R
#define BOARD_U2RX_PPS U2RXR_RPC3
#define BOARD_U2TX_PPS U2TX_RPC2R
#define BOARD_U3RX_PPS U3RXR_RPF0
#define BOARD_U3TX_PPS U3TX_RPF1R
#define BOARD_U4RX_PPS U4RXR_RPG9
#define BOARD_U4TX_PPS U4TX_RPE3R
#define BOARD_U5RX_PPS U5RXR_RPD14
#define BOARD_U5TX_PPS U5TX_RPD15R
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Inline Functions
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_FLIPNCLICK_PIC32MZ_INCLUDE_BOARD_H */

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@ -0,0 +1,51 @@
# CONFIG_ARCH_RAMFUNCS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_FLIPNCLICK_PIC32MZ=y
CONFIG_ARCH_BOARD="flipnclick-pic32mz"
CONFIG_ARCH_CHIP_PIC32MZ=y
CONFIG_ARCH_CHIP_PIC32MZ2048EFH=y
CONFIG_ARCH_CHIP_PIC32MZEF=y
CONFIG_ARCH_MIPS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="mips"
CONFIG_BOARD_LOOPSPERMSEC=7245
CONFIG_BUILTIN=y
CONFIG_DISABLE_POLL=y
CONFIG_EXAMPLES_NSH=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_HOST_WINDOWS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MIPS_MICROMIPS=y
CONFIG_MIPS32_TOOLCHAIN_PINGUINOW=y
CONFIG_MMCSD=y
CONFIG_MTD=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PIC32MZ_ICESEL_CH2=y
CONFIG_PIC32MZ_UART4=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=8
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0xa0000000
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=7
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2012
CONFIG_TASK_NAME_SIZE=0
CONFIG_UART4_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WDOG_INTRESERVE=1

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@ -0,0 +1,137 @@
############################################################################
# configs/flipnclick-pic32mz/scripts/Make.defs
#
# Copyright (C) 2018 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_GNU_ELF),y)
LDSCRIPT = mips-debug.ld
endif
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_PINGUINOW),y)
LDSCRIPT = pinguino-debug.ld
endif
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y)
LDSCRIPT = xc32-debug.ld
MIPS_MPROCESSOR = 32MZ2048EFH100
endif
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32),y)
LDSCRIPT = xc32-debug.ld
MIPS_MPROCESSOR = 32MZ2048EFH100
endif
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW),y)
LDSCRIPT = c32-debug.ld
endif
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE),y)
LDSCRIPT = c32-debug.ld
endif
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y)
ifeq ($(CONFIG_DEBUG_FEATURES),y)
ARCHCFLAGS += -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist
endif
endif
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y)
LDFLAGS = -nostdlib --defsym=__MPLAB_BUILD=1 --defsym=__MPLAB_DEBUG=1 --defsym=__DEBUG=1 --defsym=__MPLAB_DEBUGGER_PK3=1 --defsym=_min_heap_size=0 --gc-sections
else
LDFLAGS = # -no-isn32 --relax
endif
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

View File

@ -0,0 +1,336 @@
/****************************************************************************
* configs/flipnclick-pic32mz/nsh/c32-debug.ld
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* Memory Regions ***********************************************************/
MEMORY
{
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of
* program FLASH at physical address 0x1d000000 but is always accessed
* at KSEG0 address 0x9d00:0000
*/
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot
* FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and
* 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either
* may be mappled to the lower boot alias region (0x1fc00000,
* boolalias1) or the upper boot alias region (0x1fc20000, bootalias2).
* This linker script assumes that Boot Flash 1 is mapped to the lower
* alias region and Boot Flash 2 to the upper region.
*
* NOTE: This linker script simply writes into the lower boot alias,
* whichever boot FLASH that may correspond to. The other boot FLASH
* is simply ignored.
*
* The initial reset vector is in KSEG1, but all other accesses are in
* KSEG0.
*
* REGION PHYSICAL KSEG SIZE
* DESCRIPTION START ADDR (BYTES)
* ------------- ---------- ------ ----------------------
* Exceptions:*
* Reset 0x1fc00000 KSEG1 512 512
* TLB Refill 0x1fc00200 KSEG1 256 768
* Cache Error 0x1fc00300 KSEG1 128 896
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
* Interrupt 0x1fc00400 KSEG1 128 1152
* JTAG 0x1fc00480 KSEG1 16 1168
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
* Debug code 0x1fc02000 KSEG1 4096-16 12272
* ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb)
* DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb)
*
* Exceptions assume:
*
* STATUS: BEV=0/1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*/
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128
kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128
/* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb
* of data memory at physical address 0x00000000. Since the PIC32MZ
* has no data cache, this memory is always accessed through KSEG1.
*
* When used with MPLABX, we need to set aside 512 bytes of memory
* for use by MPLABX and 128 for DSP register storage.
*/
kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640
}
OUTPUT_FORMAT("elf32-tradlittlemips")
OUTPUT_ARCH(pic32mz)
ENTRY(__start)
SECTIONS
{
/* Boot FLASH sections */
.reset :
{
KEEP (*(.reset))
} > kseg1_reset
/* Exception handlers. The following is assumed:
*
* STATUS: BEV=1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*
* In that configuration, the vector locations become:
*
* Reset, Soft Reset bfc0:0000
* TLB Refill bfc0:0200
* Cache Error bfc0:0300
* All others bfc0:0380
* Interrupt bfc0:0400
* EJTAG Debug bfc0:0480
*/
/* KSEG1 exception handler "trampolines" */
.gen_excpt :
{
KEEP (*(.gen_excpt))
} > kseg1_genexcpt
.ebase_excpt :
{
KEEP (*(.ebase_excpt))
} > kseg1_ebexcpt
.bev_excpt :
{
KEEP (*(.bev_excpt))
} > kseg1_bevexcpt
.int_excpt :
{
KEEP (*(.int_excpt))
} > kseg1_intexcpt
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
.start :
{
/* KSEG0 Reset startup logic */
*(.start)
/* KSEG0 exception handlers */
*(.nmi_handler)
*(.bev_handler)
*(.int_handler)
} > kseg0_bootmem
.dbg_code = ORIGIN(kseg1_dbgcode);
.adevcfg :
{
KEEP (*(.adevcfg))
} > kseg1_adevcfg
.devcfg :
{
KEEP (*(.devcfg))
} > kseg1_devcfg
/* Program FLASH sections */
.text :
{
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.stub)
KEEP (*(.text.*personality*))
*(.gnu.linkonce.t.*)
*(.gnu.warning)
*(.mips16.fn.*)
*(.mips16.call.*)
/* Read-only data is included in the text section */
*(.rodata .rodata.*)
*(.rodata1)
*(.gnu.linkonce.r.*)
/* Small initialized constant global and static data */
*(.sdata2 .sdata2.*)
*(.gnu.linkonce.s2.*)
/* Uninitialized constant global and static data */
*(.sbss2 .sbss2.*)
*(.gnu.linkonce.sb2.*)
_etext = ABSOLUTE(.);
} > kseg0_progmem
/* Initialization data begins here in progmem */
_data_loaddr = LOADADDR(.data);
.eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) }
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
/* RAM functions are positioned at the beginning of RAM so that
* they can be guaranteed to satisfy the 2Kb alignment requirement.
*/
/* This causes failures if there are no RAM functions
.ramfunc ALIGN(2K) :
{
_sramfunc = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfunc = ABSOLUTE(.);
} > kseg1_datamem AT > kseg0_progmem
_ramfunc_loadaddr = LOADADDR(.ramfunc);
_ramfunc_sizeof = SIZEOF(.ramfunc);
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
_bmxdudba_address = LENGTH(kseg1_datamem) ;
_bmxdupba_address = LENGTH(kseg1_datamem) ;
*/
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
*(.data1)
} > kseg1_datamem AT > kseg0_progmem
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
_gp = ALIGN(16) + 0x7FF0 ;
.got :
{
*(.got.plt) *(.got)
} > kseg1_datamem AT > kseg0_progmem
.sdata :
{
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > kseg1_datamem AT > kseg0_progmem
.lit8 :
{
*(.lit8)
} > kseg1_datamem AT > kseg0_progmem
.lit4 :
{
*(.lit4)
_edata = ABSOLUTE(.);
} >kseg1_datamem AT>kseg0_progmem
.sbss :
{
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
*(.scommon)
} >kseg1_datamem
.bss :
{
*(.dynbss)
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > kseg1_datamem
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}

View File

@ -0,0 +1,336 @@
/****************************************************************************
* configs/flipnclick-pic32mz/nsh/mips-debug.ld
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* Memory Regions ***********************************************************/
MEMORY
{
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of
* program FLASH at physical address 0x1d000000 but is always accessed
* at KSEG0 address 0x9d00:0000
*/
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot
* FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and
* 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either
* may be mappled to the lower boot alias region (0x1fc00000,
* boolalias1) or the upper boot alias region (0x1fc20000, bootalias2).
* This linker script assumes that Boot Flash 1 is mapped to the lower
* alias region and Boot Flash 2 to the upper region.
*
* NOTE: This linker script simply writes into the lower boot alias,
* whichever boot FLASH that may correspond to. The other boot FLASH
* is simply ignored.
*
* The initial reset vector is in KSEG1, but all other accesses are in
* KSEG0.
*
* REGION PHYSICAL KSEG SIZE
* DESCRIPTION START ADDR (BYTES)
* ------------- ---------- ------ ----------------------
* Exceptions:*
* Reset 0x1fc00000 KSEG1 512 512
* TLB Refill 0x1fc00200 KSEG1 256 768
* Cache Error 0x1fc00300 KSEG1 128 896
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
* Interrupt 0x1fc00400 KSEG1 128 1152
* JTAG 0x1fc00480 KSEG1 16 1168
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
* Debug code 0x1fc02000 KSEG1 4096-16 12272
* ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb)
* DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb)
*
* Exceptions assume:
*
* STATUS: BEV=0/1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*/
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128
kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128
/* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb
* of data memory at physical address 0x00000000. Since the PIC32MZ
* has no data cache, this memory is always accessed through KSEG1.
*
* When used with MPLABX, we need to set aside 512 bytes of memory
* for use by MPLABX and 128 for DSP register storage.
*/
kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640
}
OUTPUT_FORMAT("elf32-tradlittlemips")
OUTPUT_ARCH(mips)
ENTRY(__start)
SECTIONS
{
/* Boot FLASH sections */
.reset :
{
KEEP (*(.reset))
} > kseg1_reset
/* Exception handlers. The following is assumed:
*
* STATUS: BEV=1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*
* In that configuration, the vector locations become:
*
* Reset, Soft Reset bfc0:0000
* TLB Refill bfc0:0200
* Cache Error bfc0:0300
* All others bfc0:0380
* Interrupt bfc0:0400
* EJTAG Debug bfc0:0480
*/
/* KSEG1 exception handler "trampolines" */
.gen_excpt :
{
KEEP (*(.gen_excpt))
} > kseg1_genexcpt
.ebase_excpt :
{
KEEP (*(.ebase_excpt))
} > kseg1_ebexcpt
.bev_excpt :
{
KEEP (*(.bev_excpt))
} > kseg1_bevexcpt
.int_excpt :
{
KEEP (*(.int_excpt))
} > kseg1_intexcpt
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
.start :
{
/* KSEG0 Reset startup logic */
*(.start)
/* KSEG0 exception handlers */
*(.nmi_handler)
*(.bev_handler)
*(.int_handler)
} > kseg0_bootmem
.dbg_code = ORIGIN(kseg1_dbgcode);
.adevcfg :
{
KEEP (*(.adevcfg))
} > kseg1_adevcfg
.devcfg :
{
KEEP (*(.devcfg))
} > kseg1_devcfg
/* Program FLASH sections */
.text :
{
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.stub)
KEEP (*(.text.*personality*))
*(.gnu.linkonce.t.*)
*(.gnu.warning)
*(.mips16.fn.*)
*(.mips16.call.*)
/* Read-only data is included in the text section */
*(.rodata .rodata.*)
*(.rodata1)
*(.gnu.linkonce.r.*)
/* Small initialized constant global and static data */
*(.sdata2 .sdata2.*)
*(.gnu.linkonce.s2.*)
/* Uninitialized constant global and static data */
*(.sbss2 .sbss2.*)
*(.gnu.linkonce.sb2.*)
_etext = ABSOLUTE(.);
} > kseg0_progmem
/* Initialization data begins here in progmem */
_data_loaddr = LOADADDR(.data);
.eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) }
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
/* RAM functions are positioned at the beginning of RAM so that
* they can be guaranteed to satisfy the 2Kb alignment requirement.
*/
/* This causes failures if there are no RAM functions
.ramfunc ALIGN(2K) :
{
_sramfunc = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfunc = ABSOLUTE(.);
} > kseg1_datamem AT > kseg0_progmem
_ramfunc_loadaddr = LOADADDR(.ramfunc);
_ramfunc_sizeof = SIZEOF(.ramfunc);
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
_bmxdudba_address = LENGTH(kseg1_datamem) ;
_bmxdupba_address = LENGTH(kseg1_datamem) ;
*/
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
*(.data1)
} > kseg1_datamem AT > kseg0_progmem
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
_gp = ALIGN(16) + 0x7FF0 ;
.got :
{
*(.got.plt) *(.got)
} > kseg1_datamem AT > kseg0_progmem
.sdata :
{
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > kseg1_datamem AT > kseg0_progmem
.lit8 :
{
*(.lit8)
} > kseg1_datamem AT > kseg0_progmem
.lit4 :
{
*(.lit4)
_edata = ABSOLUTE(.);
} >kseg1_datamem AT>kseg0_progmem
.sbss :
{
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
*(.scommon)
} >kseg1_datamem
.bss :
{
*(.dynbss)
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > kseg1_datamem
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}

View File

@ -0,0 +1,336 @@
/****************************************************************************
* configs/flipnclick-pic32mz/nsh/mips-debug.ld
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* Memory Regions ***********************************************************/
MEMORY
{
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of
* program FLASH at physical address 0x1d000000 but is always accessed
* at KSEG0 address 0x9d00:0000
*/
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot
* FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and
* 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either
* may be mappled to the lower boot alias region (0x1fc00000,
* boolalias1) or the upper boot alias region (0x1fc20000, bootalias2).
* This linker script assumes that Boot Flash 1 is mapped to the lower
* alias region and Boot Flash 2 to the upper region.
*
* NOTE: This linker script simply writes into the lower boot alias,
* whichever boot FLASH that may correspond to. The other boot FLASH
* is simply ignored.
*
* The initial reset vector is in KSEG1, but all other accesses are in
* KSEG0.
*
* REGION PHYSICAL KSEG SIZE
* DESCRIPTION START ADDR (BYTES)
* ------------- ---------- ------ ----------------------
* Exceptions:*
* Reset 0x1fc00000 KSEG1 512 512
* TLB Refill 0x1fc00200 KSEG1 256 768
* Cache Error 0x1fc00300 KSEG1 128 896
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
* Interrupt 0x1fc00400 KSEG1 128 1152
* JTAG 0x1fc00480 KSEG1 16 1168
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
* Debug code 0x1fc02000 KSEG1 4096-16 12272
* ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb)
* DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb)
*
* Exceptions assume:
*
* STATUS: BEV=0/1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*/
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128
kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128
/* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb
* of data memory at physical address 0x00000000. Since the PIC32MZ
* has no data cache, this memory is always accessed through KSEG1.
*
* When used with MPLABX, we need to set aside 512 bytes of memory
* for use by MPLABX and 128 for DSP register storage.
*/
kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640
}
OUTPUT_FORMAT("elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(__start)
SECTIONS
{
/* Boot FLASH sections */
.reset :
{
KEEP (*(.reset))
} > kseg1_reset
/* Exception handlers. The following is assumed:
*
* STATUS: BEV=1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*
* In that configuration, the vector locations become:
*
* Reset, Soft Reset bfc0:0000
* TLB Refill bfc0:0200
* Cache Error bfc0:0300
* All others bfc0:0380
* Interrupt bfc0:0400
* EJTAG Debug bfc0:0480
*/
/* KSEG1 exception handler "trampolines" */
.gen_excpt :
{
KEEP (*(.gen_excpt))
} > kseg1_genexcpt
.ebase_excpt :
{
KEEP (*(.ebase_excpt))
} > kseg1_ebexcpt
.bev_excpt :
{
KEEP (*(.bev_excpt))
} > kseg1_bevexcpt
.int_excpt :
{
KEEP (*(.int_excpt))
} > kseg1_intexcpt
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
.start :
{
/* KSEG0 Reset startup logic */
*(.start)
/* KSEG0 exception handlers */
*(.nmi_handler)
*(.bev_handler)
*(.int_handler)
} > kseg0_bootmem
.dbg_code = ORIGIN(kseg1_dbgcode);
.adevcfg :
{
KEEP (*(.adevcfg))
} > kseg1_adevcfg
.devcfg :
{
KEEP (*(.devcfg))
} > kseg1_devcfg
/* Program FLASH sections */
.text :
{
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.stub)
KEEP (*(.text.*personality*))
*(.gnu.linkonce.t.*)
*(.gnu.warning)
*(.mips16.fn.*)
*(.mips16.call.*)
/* Read-only data is included in the text section */
*(.rodata .rodata.*)
*(.rodata1)
*(.gnu.linkonce.r.*)
/* Small initialized constant global and static data */
*(.sdata2 .sdata2.*)
*(.gnu.linkonce.s2.*)
/* Uninitialized constant global and static data */
*(.sbss2 .sbss2.*)
*(.gnu.linkonce.sb2.*)
_etext = ABSOLUTE(.);
} > kseg0_progmem
/* Initialization data begins here in progmem */
_data_loaddr = LOADADDR(.data);
.eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) }
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
/* RAM functions are positioned at the beginning of RAM so that
* they can be guaranteed to satisfy the 2Kb alignment requirement.
*/
/* This causes failures if there are no RAM functions
.ramfunc ALIGN(2K) :
{
_sramfunc = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfunc = ABSOLUTE(.);
} > kseg1_datamem AT > kseg0_progmem
_ramfunc_loadaddr = LOADADDR(.ramfunc);
_ramfunc_sizeof = SIZEOF(.ramfunc);
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
_bmxdudba_address = LENGTH(kseg1_datamem) ;
_bmxdupba_address = LENGTH(kseg1_datamem) ;
*/
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
*(.data1)
} > kseg1_datamem AT > kseg0_progmem
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
_gp = ALIGN(16) + 0x7FF0 ;
.got :
{
*(.got.plt) *(.got)
} > kseg1_datamem AT > kseg0_progmem
.sdata :
{
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > kseg1_datamem AT > kseg0_progmem
.lit8 :
{
*(.lit8)
} > kseg1_datamem AT > kseg0_progmem
.lit4 :
{
*(.lit4)
_edata = ABSOLUTE(.);
} >kseg1_datamem AT>kseg0_progmem
.sbss :
{
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
*(.scommon)
} >kseg1_datamem
.bss :
{
*(.dynbss)
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > kseg1_datamem
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}

View File

@ -0,0 +1,336 @@
/****************************************************************************
* configs/flipnclick-pic32mz/nsh/mips-debug.ld
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* Memory Regions ***********************************************************/
MEMORY
{
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of
* program FLASH at physical address 0x1d000000 but is always accessed
* at KSEG0 address 0x9d00:0000
*/
kseg0_program_mem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K
/* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot
* FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and
* 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either
* may be mappled to the lower boot alias region (0x1fc00000,
* boolalias1) or the upper boot alias region (0x1fc20000, bootalias2).
* This linker script assumes that Boot Flash 1 is mapped to the lower
* alias region and Boot Flash 2 to the upper region.
*
* NOTE: This linker script simply writes into the lower boot alias,
* whichever boot FLASH that may correspond to. The other boot FLASH
* is simply ignored.
*
* The initial reset vector is in KSEG1, but all other accesses are in
* KSEG0.
*
* REGION PHYSICAL KSEG SIZE
* DESCRIPTION START ADDR (BYTES)
* ------------- ---------- ------ ----------------------
* Exceptions:*
* Reset 0x1fc00000 KSEG1 512 512
* TLB Refill 0x1fc00200 KSEG1 256 768
* Cache Error 0x1fc00300 KSEG1 128 896
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
* Interrupt 0x1fc00400 KSEG1 128 1152
* JTAG 0x1fc00480 KSEG1 16 1168
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
* Debug code 0x1fc02000 KSEG1 4096-16 12272
* ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb)
* DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb)
*
* Exceptions assume:
*
* STATUS: BEV=0/1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*/
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128
kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128
/* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb
* of data memory at physical address 0x00000000. Since the PIC32MZ
* has no data cache, this memory is always accessed through KSEG1.
*
* When used with MPLABX, we need to set aside 512 bytes of memory
* for use by MPLABX and 128 for DSP register storage.
*/
kseg1_data_mem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640
}
OUTPUT_FORMAT("elf32-tradlittlemips")
OUTPUT_ARCH(pic32mx)
ENTRY(__start)
SECTIONS
{
/* Boot FLASH sections */
.reset :
{
KEEP (*(.reset))
} > kseg1_reset
/* Exception handlers. The following is assumed:
*
* STATUS: BEV=1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*
* In that configuration, the vector locations become:
*
* Reset, Soft Reset bfc0:0000
* TLB Refill bfc0:0200
* Cache Error bfc0:0300
* All others bfc0:0380
* Interrupt bfc0:0400
* EJTAG Debug bfc0:0480
*/
/* KSEG1 exception handler "trampolines" */
.gen_excpt :
{
KEEP (*(.gen_excpt))
} > kseg1_genexcpt
.ebase_excpt :
{
KEEP (*(.ebase_excpt))
} > kseg1_ebexcpt
.bev_excpt :
{
KEEP (*(.bev_excpt))
} > kseg1_bevexcpt
.int_excpt :
{
KEEP (*(.int_excpt))
} > kseg1_intexcpt
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
.start :
{
/* KSEG0 Reset startup logic */
*(.start)
/* KSEG0 exception handlers */
*(.nmi_handler)
*(.bev_handler)
*(.int_handler)
} > kseg0_bootmem
.dbg_code = ORIGIN(kseg1_dbgcode);
.adevcfg :
{
KEEP (*(.adevcfg))
} > kseg1_adevcfg
.devcfg :
{
KEEP (*(.devcfg))
} > kseg1_devcfg
/* Program FLASH sections */
.text :
{
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.stub)
KEEP (*(.text.*personality*))
*(.gnu.linkonce.t.*)
*(.gnu.warning)
*(.mips16.fn.*)
*(.mips16.call.*)
/* Read-only data is included in the text section */
*(.rodata .rodata.*)
*(.rodata1)
*(.gnu.linkonce.r.*)
/* Small initialized constant global and static data */
*(.sdata2 .sdata2.*)
*(.gnu.linkonce.s2.*)
/* Uninitialized constant global and static data */
*(.sbss2 .sbss2.*)
*(.gnu.linkonce.sb2.*)
_etext = ABSOLUTE(.);
} > kseg0_program_mem
/* Initialization data begins here in progmem */
_data_loaddr = LOADADDR(.data);
.eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) }
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
/* RAM functions are positioned at the beginning of RAM so that
* they can be guaranteed to satisfy the 2Kb alignment requirement.
*/
/* This causes failures if there are no RAM functions
.ramfunc ALIGN(2K) :
{
_sramfunc = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfunc = ABSOLUTE(.);
} > kseg1_data_mem AT > kseg0_program_mem
_ramfunc_loadaddr = LOADADDR(.ramfunc);
_ramfunc_sizeof = SIZEOF(.ramfunc);
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_data_mem) ;
_bmxdudba_address = LENGTH(kseg1_data_mem) ;
_bmxdupba_address = LENGTH(kseg1_data_mem) ;
*/
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
*(.data1)
} > kseg1_data_mem AT > kseg0_program_mem
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
_gp = ALIGN(16) + 0x7FF0 ;
.got :
{
*(.got.plt) *(.got)
} > kseg1_data_mem AT > kseg0_program_mem
.sdata :
{
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > kseg1_data_mem AT > kseg0_program_mem
.lit8 :
{
*(.lit8)
} > kseg1_data_mem AT > kseg0_program_mem
.lit4 :
{
*(.lit4)
_edata = ABSOLUTE(.);
} >kseg1_data_mem AT>kseg0_program_mem
.sbss :
{
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
*(.scommon)
} >kseg1_data_mem
.bss :
{
*(.dynbss)
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > kseg1_data_mem
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}

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@ -0,0 +1,2 @@
/.depend
/Make.dep

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############################################################################
# configs/flipnclick-pic32mz/src/Makefile
#
# Copyright (C) 2015 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = pic32mz_boot.c pic32mz_bringup.c pic32mz_userleds.c pic32mz_spi.c
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += pic32mz_appinit.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += pic32mz_autoleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += pic32mz_buttons.c
endif
include $(TOPDIR)/configs/Board.mk

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/****************************************************************************
* configs/flipnclick-pic32mz/src/flipnclick-pic32mz.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __CONFIGS_FLIPNCLICK_PIC32MZ_SRC_FLIPNCLICK_PIC32MZ_H
#define __CONFIGS_FLIPNCLICK_PIC32MZ_SRC_FLIPNCLICK_PIC32MZ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* LEDs *********************************************************************/
/* There are four LEDs on the top, red side of the board. Only one can be
* controlled by software:
*
* LED L - RB14 (SPI3_SCK)
*
* There are also four LEDs on the back, white side of the board:
*
* LED A - RA6
* LED B - RA7
* LED C - RE0
* LED D - RE1
*
* A high output value illuminates the LEDs.
*/
#define GPIO_LED_L (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTB | GPIO_PIN14)
#define GPIO_LED_A (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTA | GPIO_PIN6)
#define GPIO_LED_B (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTA | GPIO_PIN7)
#define GPIO_LED_C (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTE | GPIO_PIN0)
#define GPIO_LED_D (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTE | GPIO_PIN1)
/* The Flip&Click PIC32MZ has 2 user push buttons labeled T1 and T2 on the
* white side of the board:
*
* PIN LED Notes
* ----- ---- -------------------------
* RD10 T1 Sensed low when closed
* RD11 T2 Sensed low when closed
*
* The switches have external pull-up resistors. The switches are pulled high
* (+3.3V) and grounded when pressed.
*/
#define GPIO_T1 (GPIO_INPUT | GPIO_INTERRUPT | GPIO_PORTD | GPIO_PIN10)
#define GPIO_T2 (GPIO_INPUT | GPIO_INTERRUPT | GPIO_PORTD | GPIO_PIN11)
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Name: pic32mz_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the PCB Logic board.
*
************************************************************************************/
#ifdef CONFIG_PIC32MZ_SPI
void weak_function pic32mz_spidev_initialize(void);
#endif
/************************************************************************************
* Name: pic32mz_led_initialize
*
* Description:
* Configure on-board LEDs if LED support has been selected.
*
************************************************************************************/
#ifdef CONFIG_ARCH_LEDS
void pic32mz_led_initialize(void);
#endif
/****************************************************************************
* Name: pic32mz_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
int pic32mz_bringup(void);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_FLIPNCLICK_PIC32MZ_SRC_FLIPNCLICK_PIC32MZ_H */

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/****************************************************************************
* config/flipnclick-pic32mz/src/pic32mz_appinit.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include "flipnclick-pic32mz.h"
#ifdef CONFIG_LIB_BOARDCTL
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initalization logic and the
* matching application logic. The value cold be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
/* If CONFIG_BOARD_INITIALIZE is selected then board initialization was
* already performed in board_initialize.
*/
#ifndef CONFIG_BOARD_INITIALIZE
return pic32mz_bringup();
#else
return OK;
#endif
}
#endif /* CONFIG_LIB_BOARDCTL */

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/****************************************************************************
* configs/flipnclick-pic32mz/src/pic32mz_leds.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "pic32mz-gpio.h"
#include "flipnclick-pic32mz.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* There are four LEDs on the top, red side of the board. Only one can be
* controlled by software:
*
* LED L - RB14 (SPI3_SCK)
*
* There are also four LEDs on the back, white side of the board:
*
* LED A - RA6
* LED B - RA7
* LED C - RE0
* LED D - RE1
*
* A high output value illuminates the LEDs.
*
* These LEDs are available to the application and are all available to the
* application unless CONFIG_ARCH_LEDS is defined. In that case, the usage
* by the board port is defined in include/board.h and src/sam_autoleds.c.
* The LEDs are used to encode OS-related events as follows:
*
* SYMBOL MEANING LED STATE
* L A B C D
* ---------------- ----------------------- --- --- --- --- ---
* LED_STARTED NuttX has been started OFF ON OFF OFF OFF
* LED_HEAPALLOCATE Heap has been allocated OFF OFF ON OFF OFF
* LED_IRQSENABLED Interrupts enabled OFF OFF OFF ON OFF
* LED_STACKCREATED Idle stack created OFF OFF OFF OFF ON
* LED_INIRQ In an interrupt GLO N/C N/C N/C N/C
* LED_SIGNAL In a signal handler GLO N/C N/C N/C N/C
* LED_ASSERTION An assertion failed GLO N/C N/C N/C N/C
* LED_PANIC The system has crashed 2Hz N/C N/C N/C N/C
* LED_IDLE MCU is is sleep mode ---- Not used -----
*
* Thus if LED L is glowing on and all other LEDs are off (except LED D
* which was left on but is no longer controlled by NuttX and so may be in
* any state), NuttX has successfully booted and is, apparently, running
* normally and taking interrupts. If any of LEDs A-D are statically set,
* then NuttX failed to boot and the LED indicates the initialization phase
* where the failure occurred. If LED L is flashing at approximately 2Hz,
* then a fatal error has been detected and the system has halted.
*
* NOTE: After booting, LEDs A-D are no longer used by the system and may
* be controlled the application.
*/
/* LED indices */
#define INDEX_LED_L 0
#define INDEX_LED_A 1
#define INDEX_LED_B 2
#define INDEX_LED_C 3
#define INDEX_LED_D 4
#define NLEDS 5
/****************************************************************************
* Private Functions
****************************************************************************/
static void board_autoled_setone(int ledndx)
{
bool ledon[NLEDS] = {false, false, false, false, false};
ledon[ledndx] = true;
pic32mz_gpiowrite(GPIO_LED_L, ledon[INDEX_LED_L]);
pic32mz_gpiowrite(GPIO_LED_A, ledon[INDEX_LED_A]);
pic32mz_gpiowrite(GPIO_LED_B, ledon[INDEX_LED_B]);
pic32mz_gpiowrite(GPIO_LED_C, ledon[INDEX_LED_D]);
pic32mz_gpiowrite(GPIO_LED_D, ledon[INDEX_LED_D]);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: pic32mz_led_initialize
****************************************************************************/
void pic32mz_led_initialize(void)
{
/* Configure LED GPIOs for output */
pic32mz_configgpio(GPIO_LED_L);
pic32mz_configgpio(GPIO_LED_A);
pic32mz_configgpio(GPIO_LED_B);
pic32mz_configgpio(GPIO_LED_C);
pic32mz_configgpio(GPIO_LED_D);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
/* SYMBOL MEANING LED STATE
* L A B C D
* ------------------- ----------------------- --- --- --- --- ---
* LED_STARTED 0 NuttX has been started OFF ON OFF OFF OFF
* LED_HEAPALLOCATE 1 Heap has been allocated OFF OFF ON OFF OFF
* LED_IRQSENABLED 2 Interrupts enabled OFF OFF OFF ON OFF
* LED_STACKCREATED 3 Idle stack created OFF OFF OFF OFF ON
* LED_INIRQ 4 In an interrupt GLO N/C N/C N/C N/C
* LED_SIGNAL 4 In a signal handler GLO N/C N/C N/C N/C
* LED_ASSERTION 4 An assertion failed GLO N/C N/C N/C N/C
* LED_PANIC 4 The system has crashed 2Hz N/C N/C N/C N/C
*/
switch (led)
{
default:
case 0:
board_autoled_setone(INDEX_LED_A);
break;
case 1:
board_autoled_setone(INDEX_LED_B);
break;
case 2:
board_autoled_setone(INDEX_LED_C);
break;
case 3:
board_autoled_setone(INDEX_LED_D);
break;
case 4:
pic32mz_gpiowrite(GPIO_LED_L, true);
break;
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
/* SYMBOL MEANING LED STATE
* L A B C D
* ------------------- ----------------------- --- --- --- --- ---
* LED_STARTED 0 NuttX has been started OFF ON OFF OFF OFF
* LED_HEAPALLOCATE 1 Heap has been allocated OFF OFF ON OFF OFF
* LED_IRQSENABLED 2 Interrupts enabled OFF OFF OFF ON OFF
* LED_STACKCREATED 3 Idle stack created OFF OFF OFF OFF ON
* LED_INIRQ 4 In an interrupt GLO N/C N/C N/C N/C
* LED_SIGNAL 4 In a signal handler GLO N/C N/C N/C N/C
* LED_ASSERTION 4 An assertion failed GLO N/C N/C N/C N/C
* LED_PANIC 4 The system has crashed 2Hz N/C N/C N/C N/C
*/
switch (led)
{
default:
pic32mz_gpiowrite(GPIO_LED_L, false);
pic32mz_gpiowrite(GPIO_LED_A, false);
pic32mz_gpiowrite(GPIO_LED_B, false);
pic32mz_gpiowrite(GPIO_LED_C, false);
pic32mz_gpiowrite(GPIO_LED_D, false);
break;
case 4:
pic32mz_gpiowrite(GPIO_LED_L, false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */

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/************************************************************************************
* configs/flipnclick-pic32mz/src/pic32mz_boot.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include "flipnclick-pic32mz.h"
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: pic32mz_boardinitialize
*
* Description:
* All PIC32MZ architectures must provide the following entry point. This entry
* point is called early in the initialization -- after all memory has been
* configured and mapped but before any devices have been initialized.
*
************************************************************************************/
void pic32mz_boardinitialize(void)
{
/* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak
* function pic32mz_spidev_initialize() has been brought into the link.
*/
#ifdef CONFIG_PIC32MZ_SPI
if (pic32mz_spidev_initialize)
{
pic32mz_spidev_initialize();
}
#endif
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
pic32mz_led_initialize();
#endif
}
/****************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_initialize(). board_initialize() will be
* called immediately after up_intiialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
/* Perform board initialization */
(void)pic32mz_bringup();
}
#endif /* CONFIG_BOARD_INITIALIZE */

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/****************************************************************************
* config/flipnclick-pic32mz/src/pic32mz_bringup.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include "flipnclick-pic32mz.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: pic32mz_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
int pic32mz_bringup(void)
{
int ret;
UNUSED(ret);
return OK;
}

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/****************************************************************************
* configs/flipnclick-pic32mz/src/pic32mz_buttons.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "pic32mz-gpio.h"
#include "flipnclick-pic32mz.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each switch. This array is indexed by the BUTTON_*
* definitions in board.h
*/
static const pinset_t g_buttons[NUM_BUTTONS] =
{
GPIO_T1, GPIO_T2,
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
void board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for all pins.
*/
for (i = 0; i < NUM_BUTTONS; i++)
{
pic32mz_configgpio(g_buttons[i]);
}
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
int i;
/* Check that state of each key */
for (i = 0; i < NUM_BUTTONS; i++)
{
/* A LOW value means that the key is pressed. */
bool released = pic32mz_gpioread(g_buttons[i]);
/* Accumulate the set of depressed (not released) keys */
if (!released)
{
ret |= (1 << i);
}
}
return ret;
}
/****************************************************************************
* Button interrupt support.
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons. board_buttons() returns an
* 32-bit bit set with each bit associated with a button. See the
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is
* a button enumeration value that uniquely identifies a button resource.
* See the BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
#ifdef CONFIG_PIC32MZ_GPIOIRQ_PORTD
int ret = OK;
if ((unsigned)id < NUM_BUTTONS)
{
/* Perform the attach/detach operation */
ret = pic32mz_gpioattach(g_buttons[id], irqhandler, arg);
/* The interrupt is now disabled. Are we attaching or detaching from
* button interrupt?
*/
if (ret >= 0)
{
/* Attaching... enable button interrupts now */
pic32mz_gpioirqenable(g_buttons[id]);
}
}
return ret;
#else
return -ENOSYS;
#endif
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */

View File

@ -0,0 +1,235 @@
/************************************************************************************
* configs/flipnclick-pic32mz/src/pic32mz_spi.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "flipnclick-pic32mz.h"
#ifdef CONFIG_PIC32MZ_SPI
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: pic32mz_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Sure PIC32MZ board.
*
************************************************************************************/
void weak_function pic32mz_spidev_initialize(void)
{
/* Configure the SPI chip select GPIOs */
#warning "Missing logic"
}
/************************************************************************************
* Name: pic32mz_spiNselect, pic32mz_spiNstatus, and pic32mz_spiNcmddata
*
* Description:
* These external functions must be provided by board-specific logic. They are
* implementations of the select, status, and cmddata methods of the SPI interface
* defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
* including pic32mz_spibus_initialize()) are provided by common PIC32MZ logic. To use
* this common SPI logic on your board:
*
* 1. Provide logic in pic32mz_boardinitialize() to configure SPI/SPI chip select
* pins.
* 2. Provide pic32mz_spiNselect() and pic32mz_spiNstatus() functions
* in your board-specific logic. These functions will perform chip selection
* and status operations using GPIOs in the way your board is configured.
* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
* pic32mz_spiNcmddata() functions in your board-specific logic. These
* functions will perform cmd/data selection operations using GPIOs in the way
* your board is configured.
* 3. Add a call to pic32mz_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by pic32mz_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
************************************************************************************/
struct spi_dev_s;
#ifdef CONFIG_PIC32MZ_SPI1
void pic32mz_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
#warning "Missing logic"
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
#warning "Missing logic"
return 0;
}
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI2
void pic32mz_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
#warning "Missing logic"
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
#warning "Missing logic"
return 0;
}
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI3
void pic32mz_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
#warning "Missing logic"
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
#warning "Missing logic"
return 0;
}
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI4
void pic32mz_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
#warning "Missing logic"
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
#warning "Missing logic"
return 0;
}
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI5
void pic32mz_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
#warning "Missing logic"
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
#warning "Missing logic"
return 0;
}
#endif
#endif
#ifdef CONFIG_PIC32MZ_SPI6
void pic32mz_spi6select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, uint32_t devid)
{
spiinfo("Returning nothing\n");
#warning "Missing logic"
return 0;
}
#ifdef CONFIG_SPI_CMDDATA
int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
#warning "Missing logic"
return 0;
}
#endif
#endif
#endif /* CONFIG_PIC32MZ_SPI */

View File

@ -0,0 +1,156 @@
/****************************************************************************
* configs/flipnclick-pic32mz/src/pic32mz_userleds.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* There are four LEDs on the top, red side of the board. Only one can be
* controlled by software:
*
* LED L - RB14 (SPI3_SCK)
*
* There are also four LEDs on the back, white side of the board:
*
* LED A - RA6
* LED B - RA7
* LED C - RE0
* LED D - RE1
*
* A high output value illuminates the LEDs.
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "pic32mz-gpio.h"
#include "flipnclick-pic32mz.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
void board_userled_initialize(void)
{
#ifndef CONFIG_ARCH_LEDS
/* Configure LED GPIOs for output */
pic32mz_configgpio(GPIO_LED_L);
pic32mz_configgpio(GPIO_LED_A);
pic32mz_configgpio(GPIO_LED_B);
pic32mz_configgpio(GPIO_LED_C);
pic32mz_configgpio(GPIO_LED_D);
#endif
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
uint32_t ledcfg;
switch (led)
{
#ifndef CONFIG_ARCH_LEDS
case BOARD_LED_L:
ledcfg = GPIO_LED_L;
break;
#endif
case BOARD_LED_A:
ledcfg = GPIO_LED_A;
break;
case BOARD_LED_B:
ledcfg = GPIO_LED_B;
break;
case BOARD_LED_C:
ledcfg = GPIO_LED_C;
break;
case BOARD_LED_D:
ledcfg = GPIO_LED_D;
break;
default:
return;
}
pic32mz_gpiowrite(ledcfg, ledon);
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint8_t ledset)
{
bool ledon;
#ifndef CONFIG_ARCH_LEDS
ledon = ((ledset & BOARD_LED_L_BIT) != 0);
pic32mz_gpiowrite(GPIO_LED_L, ledon);
#endif
ledon = ((ledset & BOARD_LED_A_BIT) != 0);
pic32mz_gpiowrite(GPIO_LED_A, ledon);
ledon = ((ledset & BOARD_LED_B_BIT) != 0);
pic32mz_gpiowrite(GPIO_LED_B, ledon);
ledon = ((ledset & BOARD_LED_C_BIT) != 0);
pic32mz_gpiowrite(GPIO_LED_C, ledon);
ledon = ((ledset & BOARD_LED_D_BIT) != 0);
pic32mz_gpiowrite(GPIO_LED_D, ledon);
}
#endif /* !CONFIG_ARCH_LEDS */

View File

@ -157,24 +157,41 @@
* LED D - PC8
*
* A high output value illuminates the LEDs.
*
* LED index values for use with board_userled():
*/
#define BOARD_LED_L 0
#define BOARD_LED_A 1
#define BOARD_LED_B 2
#define BOARD_LED_C 3
#define BOARD_LED_D 4
#define BOARD_NLEDS 5
#ifdef CONFIG_ARCH_LEDS
/* LED index values for use with board_userled(): */
# define BOARD_LED_A 0
# define BOARD_LED_B 1
# define BOARD_LED_C 2
# define BOARD_LED_D 3
# define BOARD_NLEDS 4
/* LED bits for use with board_userled_all() */
#define BOARD_LED_L_BIT (1 << BOARD_LED_L)
#define BOARD_LED_A_BIT (1 << BOARD_LED_A)
#define BOARD_LED_B_BIT (1 << BOARD_LED_B)
#define BOARD_LED_C_BIT (1 << BOARD_LED_C)
#define BOARD_LED_D_BIT (1 << BOARD_LED_D)
# define BOARD_LED_A_BIT (1 << BOARD_LED_A)
# define BOARD_LED_B_BIT (1 << BOARD_LED_B)
# define BOARD_LED_C_BIT (1 << BOARD_LED_C)
# define BOARD_LED_D_BIT (1 << BOARD_LED_D)
#else
/* LED index values for use with board_userled(): */
# define BOARD_LED_L 0
# define BOARD_LED_A 1
# define BOARD_LED_B 2
# define BOARD_LED_C 3
# define BOARD_LED_D 4
# define BOARD_NLEDS 5
/* LED bits for use with board_userled_all() */
# define BOARD_LED_L_BIT (1 << BOARD_LED_L)
# define BOARD_LED_A_BIT (1 << BOARD_LED_A)
# define BOARD_LED_B_BIT (1 << BOARD_LED_B)
# define BOARD_LED_C_BIT (1 << BOARD_LED_C)
# define BOARD_LED_D_BIT (1 << BOARD_LED_D)
#endif
/* These LEDs are available to the application and are all available to the
* application unless CONFIG_ARCH_LEDS is defined. In that case, the usage by the

View File

@ -99,8 +99,34 @@
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
* Processor Definitinos
****************************************************************************/
/* LED indices */
#define INDEX_LED_L 0
#define INDEX_LED_A 1
#define INDEX_LED_B 2
#define INDEX_LED_C 3
#define INDEX_LED_D 4
#define NLEDS 5
/****************************************************************************
* Private Functions
****************************************************************************/
static void board_autoled_setone(int ledndx)
{
bool ledon[NLEDS] = {false, false, false, false, false};
ledon[ledndx] = true;
sam_gpiowrite(GPIO_LED_L, ledon[INDEX_LED_L]);
sam_gpiowrite(GPIO_LED_A, ledon[INDEX_LED_A]);
sam_gpiowrite(GPIO_LED_B, ledon[INDEX_LED_B]);
sam_gpiowrite(GPIO_LED_C, ledon[INDEX_LED_D]);
sam_gpiowrite(GPIO_LED_D, ledon[INDEX_LED_D]);
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -143,35 +169,19 @@ void board_autoled_on(int led)
{
default:
case 0:
sam_gpiowrite(GPIO_LED_L, false);
sam_gpiowrite(GPIO_LED_A, true);
sam_gpiowrite(GPIO_LED_B, false);
sam_gpiowrite(GPIO_LED_C, false);
sam_gpiowrite(GPIO_LED_D, false);
board_autoled_setone(INDEX_LED_A);
break;
case 1:
sam_gpiowrite(GPIO_LED_L, false);
sam_gpiowrite(GPIO_LED_A, false);
sam_gpiowrite(GPIO_LED_B, true);
sam_gpiowrite(GPIO_LED_C, false);
sam_gpiowrite(GPIO_LED_D, false);
board_autoled_setone(INDEX_LED_B);
break;
case 2:
sam_gpiowrite(GPIO_LED_L, false);
sam_gpiowrite(GPIO_LED_A, false);
sam_gpiowrite(GPIO_LED_B, false);
sam_gpiowrite(GPIO_LED_C, true);
sam_gpiowrite(GPIO_LED_D, false);
board_autoled_setone(INDEX_LED_C);
break;
case 3:
sam_gpiowrite(GPIO_LED_L, false);
sam_gpiowrite(GPIO_LED_A, false);
sam_gpiowrite(GPIO_LED_B, false);
sam_gpiowrite(GPIO_LED_C, false);
sam_gpiowrite(GPIO_LED_D, true);
board_autoled_setone(INDEX_LED_D);
break;
case 4:

View File

@ -96,9 +96,11 @@ void board_userled(int led, bool ledon)
switch (led)
{
#ifndef CONFIG_ARCH_LEDS
case BOARD_LED_L:
ledcfg = GPIO_LED_L;
break;
#endif
case BOARD_LED_A:
ledcfg = GPIO_LED_A;
@ -131,8 +133,10 @@ void board_userled_all(uint8_t ledset)
{
bool ledon;
#ifndef CONFIG_ARCH_LEDS
ledon = ((ledset & BOARD_LED_L_BIT) != 0);
sam_gpiowrite(GPIO_LED_L, ledon);
#endif
ledon = ((ledset & BOARD_LED_A_BIT) != 0);
sam_gpiowrite(GPIO_LED_A, ledon);

View File

@ -357,14 +357,32 @@ LEDs and Buttons
Configurations
==============
Information Common to All Configurations
----------------------------------------
Each PIC32MZ configuration is maintained in a sub-directory and can be
selected as follow:
cd tools
./configure.sh pic32mz-starterkit/<subdir>
cd -
tools/configure.sh [OPTIONS] pic32mz-starterkit/<subdir>
Where <subdir> is one of the following:
Where typical options are -l to configure to build on Linux or -c to
configure for Cygwin under Linux. 'tools/configure.sh -h' will show
you all of the options.
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply,
nuttx.
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
Configuration Directories
-------------------------
nsh:

View File

@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __CONFIGS_SURE_PIC32MZ_INCLUDE_BOARD_H
#define __CONFIGS_SURE_PIC32MZ_INCLUDE_BOARD_H
#ifndef __CONFIGS_PIC32MZ_STARTERKIT_INCLUDE_BOARD_H
#define __CONFIGS_PIC32MZ_STARTERKIT_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
@ -140,7 +140,6 @@
#define BOARD_PB5DIV 2 /* Divider = 2 */
#define BOARD_PBCLK5 100000000 /* PBCLK5 frequency = 200MHz/2 = 100MHz */
/* PBCLK6
* Peripherals:
*/
@ -313,4 +312,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_SURE_PIC32MZ_INCLUDE_BOARD_H */
#endif /* __CONFIGS_PIC32MZ_STARTERKIT_INCLUDE_BOARD_H */