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Very initial SDHC driver for Kinetis parts

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3901 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-08-21 16:00:32 +00:00
parent 927f0f0d50
commit 7d501f3c42
10 changed files with 3054 additions and 5 deletions
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5
ChangeLog
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@ -2016,3 +2016,8 @@
6.9 2011-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
* arch/arm/src/kinetis/kinetis_sdhc.c: SDHC driver for Kinetis parts.
Initially check-in is just a crude port of the STM32 SDIO driver.
Much more is needed.

4
arch/arm/src/kinetis/Make.defs
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@ -71,6 +71,10 @@ ifeq ($(CONFIG_DEBUG_GPIO),y)
CHIP_CSRCS += kinetis_pindbg.c
endif
ifeq ($(CONFIG_KINETIS_SDHC),y)
CHIP_CSRCS += kinetis_sdhc.c
endif
ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += kinetis_usbdev.c
endif

2973
arch/arm/src/kinetis/kinetis_sdhc.c Normal file
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File diff suppressed because it is too large Load Diff

3
arch/arm/src/kinetis/kinetis_sdhc.h
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@ -222,6 +222,7 @@
# define SDHC_SYSCTL_DVS_DIV(n) (((n)-1) << SDHC_SYSCTL_DVS_SHIFT) /* Divide by n, n=1..16 */
#define SDHC_SYSCTL_SDCLKFS_SHIFT (8) /* Bits 8-15: SDCLK Frequency Select */
#define SDHC_SYSCTL_SDCLKFS_MASK (0xff << SDHC_SYSCTL_SDCLKFS_SHIFT)
# define SDHC_SYSCTL_SDCLKFS_BYPASS (0x00 << SDHC_SYSCTL_SDCLKFS_SHIFT) /* Bypass the prescaler */
# define SDHC_SYSCTL_SDCLKFS_DIV2 (0x01 << SDHC_SYSCTL_SDCLKFS_SHIFT) /* Base clock / 2 */
# define SDHC_SYSCTL_SDCLKFS_DIV4 (0x02 << SDHC_SYSCTL_SDCLKFS_SHIFT) /* Base clock / 4 */
# define SDHC_SYSCTL_SDCLKFS_DIV8 (0x04 << SDHC_SYSCTL_SDCLKFS_SHIFT) /* Base clock / 8 */
@ -265,6 +266,8 @@
/* Bits 25-27: Reserved */
#define SDHC_INT_DMAE (1 << 28) /* Bit 28: DMA Error */
/* Bits 29-31: Reserved */
#define SDHC_INT_ALL 0x117f01ff
/* Auto CMD12 Error Status Register */
#define SDHC_AC12ERR_NE (1 << 0) /* Bit 0: Auto CMD12 Not Executed */

6
arch/arm/src/stm32/stm32_sdio.c
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@ -1436,7 +1436,7 @@ static uint8_t stm32_status(FAR struct sdio_dev_s *dev)
}
/****************************************************************************
* Name: SDIO_WIDEBUS
* Name: stm32_widebus
*
* Description:
* Called after change in Bus width has been selected (via ACMD6). Most
@ -1629,7 +1629,7 @@ static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg
* Name: stm32_recvsetup
*
* Description:
* Setup hardware in preparation for data trasfer from the card in non-DMA
* Setup hardware in preparation for data transfer from the card in non-DMA
* (interrupt driven mode). This method will do whatever controller setup
* is necessary. This would be called for SD memory just BEFORE sending
* CMD13 (SEND_STATUS), CMD17 (READ_SINGLE_BLOCK), CMD18
@ -1685,7 +1685,7 @@ static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
* Name: stm32_sendsetup
*
* Description:
* Setup hardware in preparation for data trasfer from the card. This method
* Setup hardware in preparation for data transfer from the card. This method
* will do whatever controller setup is necessary. This would be called
* for SD memory just AFTER sending CMD24 (WRITE_BLOCK), CMD25
* (WRITE_MULTIPLE_BLOCK), ... and before SDIO_SENDDATA is called.

2
configs/kwikstik-k40/README.txt
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@ -419,6 +419,8 @@ KwikStik-K40-specific Configuration Options
CONFIG_KINETIS_UART4PRIO
CONFIG_KINETIS_UART5PRIO
CONFIG_KINETIS_SDHC_PRIO
PIN Interrupt Support
CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs

30
configs/kwikstik-k40/include/board.h
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@ -84,6 +84,36 @@
#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
/* SDHC clocking ********************************************************************/
/* SDCLK configurations corresponding to various modes of operation. Formula is:
*
* SDCLK frequency = (base clock) / (prescaler * divisor)
*
* The SDHC module is always configure configured so that the core clock is the base
* clock.
*/
/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */
#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16
#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15)
/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) */
#define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2)
/* LED definitions ******************************************************************/
/* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */

2
configs/twr-k60n512/README.txt
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@ -561,6 +561,8 @@ TWR-K60N512-specific Configuration Options
CONFIG_KINETIS_EMACRX_PRIO
CONFIG_KINETIS_EMACMISC_PRIO
CONFIG_KINETIS_SDHC_PRIO
PIN Interrupt Support
CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs

30
configs/twr-k60n512/include/board.h
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@ -85,6 +85,36 @@
#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
/* SDHC clocking ********************************************************************/
/* SDCLK configurations corresponding to various modes of operation. Formula is:
*
* SDCLK frequency = (base clock) / (prescaler * divisor)
*
* The SDHC module is always configure configured so that the core clock is the base
* clock.
*/
/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */
#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16
#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15)
/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) */
#define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2)
/* LED definitions ******************************************************************/
/* The TWR-K60N512 has four LEDs:
*

4
include/nuttx/sdio.h
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@ -466,7 +466,7 @@
* Name: SDIO_RECVSETUP
*
* Description:
* Setup hardware in preparation for data trasfer from the card in non-DMA
* Setup hardware in preparation for data transfer from the card in non-DMA
* (interrupt driven mode). This method will do whatever controller setup
* is necessary. This would be called for SD memory just BEFORE sending
* CMD13 (SEND_STATUS), CMD17 (READ_SINGLE_BLOCK), CMD18
@ -489,7 +489,7 @@
* Name: SDIO_SENDSETUP
*
* Description:
* Setup hardware in preparation for data trasfer from the card. This method
* Setup hardware in preparation for data transfer from the card. This method
* will do whatever controller setup is necessary. This would be called
* for SD memory just AFTER sending CMD24 (WRITE_BLOCK), CMD25
* (WRITE_MULTIPLE_BLOCK), ... and before SDIO_SENDDATA is called.