arch/arm/src/stm32/stm32f30xxx_i2c.c: Fix compile error with I2C reset
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eb02b28428
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@ -135,7 +135,7 @@
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#endif
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#endif
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#define I2C_OUTPUT \
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#define I2C_OUTPUT \
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(GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_CNF_OUTOD | GPIO_MODE_50MHz)
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(GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_OPENDRAIN | GPIO_SPEED_50MHz)
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#define MKI2C_OUTPUT(p) \
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#define MKI2C_OUTPUT(p) \
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(((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
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(((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
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@ -602,7 +602,6 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
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{
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{
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struct timespec abstime;
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struct timespec abstime;
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irqstate_t flags;
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irqstate_t flags;
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uint32_t regval;
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int ret;
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int ret;
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flags = enter_critical_section();
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flags = enter_critical_section();
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@ -1797,6 +1796,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
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#ifdef CONFIG_I2C_RESET
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#ifdef CONFIG_I2C_RESET
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static int stm32_i2c_reset(FAR struct i2c_master_s * dev)
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static int stm32_i2c_reset(FAR struct i2c_master_s * dev)
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{
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{
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FAR struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
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unsigned int clock_count;
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unsigned int clock_count;
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unsigned int stretch_count;
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unsigned int stretch_count;
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uint32_t scl_gpio;
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uint32_t scl_gpio;
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