sergiotarxz/nuttx
sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

STM32 FLASH pre-fetch is no long enabled unless it is so configured

Browse Source 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5388 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-11-26 13:22:51 +00:00
parent d80e24e792
commit 7dbb26184c
3 changed files with 17 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/arm/src/stm32/Kconfig
View File

@ -689,6 +689,15 @@ endchoice
endmenu endmenu
config STM32_FLASH_PREFETCH
bool "Enable FLASH Pre-fetch"
depends on STM32_STM32F20XX || STM32_STM32F40XX
default n
---help---
Enable FLASH prefetch and F2 and F4 parts (FLASH pre-fetch is always enabled
on F1 parts). Some early revisions of F4 parts do not support FLASH pre-fetch
properly and enabling this option may interfere with ADC accuracy.
choice choice
prompt "JTAG Configuration" prompt "JTAG Configuration"
default STM32_JTAG_DISABLE default STM32_JTAG_DISABLE

4
arch/arm/src/stm32/stm32f20xxx_rcc.c
View File

@ -631,7 +631,11 @@ static void stm32_stdclockconfig(void)
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
#ifdef STM32_FLASH_PREFETCH
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
#else
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
#endif
putreg32(regval, STM32_FLASH_ACR); putreg32(regval, STM32_FLASH_ACR);
/* Select the main PLL as system clock source */ /* Select the main PLL as system clock source */

4
arch/arm/src/stm32/stm32f40xxx_rcc.c
View File

@ -633,7 +633,11 @@ static void stm32_stdclockconfig(void)
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
#ifdef STM32_FLASH_PREFETCH
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
#else
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
#endif
putreg32(regval, STM32_FLASH_ACR); putreg32(regval, STM32_FLASH_ACR);
/* Select the main PLL as system clock source */ /* Select the main PLL as system clock source */