STM32 FLASH pre-fetch is no long enabled unless it is so configured
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5388 42af7a65-404d-4744-a932-0658087f49c3
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@ -689,6 +689,15 @@ endchoice
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endmenu
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config STM32_FLASH_PREFETCH
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bool "Enable FLASH Pre-fetch"
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depends on STM32_STM32F20XX || STM32_STM32F40XX
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default n
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---help---
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Enable FLASH prefetch and F2 and F4 parts (FLASH pre-fetch is always enabled
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on F1 parts). Some early revisions of F4 parts do not support FLASH pre-fetch
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properly and enabling this option may interfere with ADC accuracy.
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choice
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prompt "JTAG Configuration"
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default STM32_JTAG_DISABLE
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@ -631,7 +631,11 @@ static void stm32_stdclockconfig(void)
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/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
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#ifdef STM32_FLASH_PREFETCH
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
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#else
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
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#endif
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putreg32(regval, STM32_FLASH_ACR);
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/* Select the main PLL as system clock source */
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@ -633,7 +633,11 @@ static void stm32_stdclockconfig(void)
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/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
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#ifdef STM32_FLASH_PREFETCH
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
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#else
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
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#endif
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putreg32(regval, STM32_FLASH_ACR);
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/* Select the main PLL as system clock source */
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