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SAM3/4 SPI phase control (CPHA) is inverted

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This commit is contained in:
Gregory Nutt 2013-06-18 09:29:55 -06:00
parent 2d6a50a1ce
commit 7e372171c2
1 changed files with 16 additions and 8 deletions
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24
arch/arm/src/sam34/sam_spi.c
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@ -547,7 +547,15 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
if (mode != priv->mode)
{
#endif
/* Yes... Set the mode appropriately */
/* Yes... Set the mode appropriately:
*
* SPI CPOL NCPHA
* MODE
* 0 0 1
* 1 0 0
* 2 1 1
* 3 1 0
*/
regaddr = g_csraddr[priv->cs];
regval = getreg32(regaddr);
@ -555,19 +563,19 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
switch (mode)
{
case SPIDEV_MODE0: /* CPOL=0; NCPHA=0 */
case SPIDEV_MODE0: /* CPOL=0; NCPHA=1 */
regval |= SPI_CSR_NCPHA;
break;
case SPIDEV_MODE1: /* CPOL=0; NCPHA=1 */
regval |= SPI_CSR_NCPHA;
case SPIDEV_MODE1: /* CPOL=0; NCPHA=0 */
break;
case SPIDEV_MODE2: /* CPOL=1; NCPHA=0 */
regval |= SPI_CSR_CPOL;
case SPIDEV_MODE2: /* CPOL=1; NCPHA=1 */
regval |= (SPI_CSR_CPOL | SPI_CSR_NCPHA);
break;
case SPIDEV_MODE3: /* CPOL=1; NCPHA=1 */
regval |= (SPI_CSR_CPOL|SPI_CSR_NCPHA);
case SPIDEV_MODE3: /* CPOL=1; NCPHA=0 */
regval |= SPI_CSR_CPOL;
break;
default: