From 7e372171c230b1ea33fcc454c31fde0cd7172ec0 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Tue, 18 Jun 2013 09:29:55 -0600
Subject: [PATCH] SAM3/4 SPI phase control (CPHA) is inverted

---
 arch/arm/src/sam34/sam_spi.c | 24 ++++++++++++++++--------
 1 file changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/arm/src/sam34/sam_spi.c b/arch/arm/src/sam34/sam_spi.c
index 35160ff04c..7582e94958 100644
--- a/arch/arm/src/sam34/sam_spi.c
+++ b/arch/arm/src/sam34/sam_spi.c
@@ -547,7 +547,15 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   if (mode != priv->mode)
     {
 #endif
-      /* Yes... Set the mode appropriately */
+      /* Yes... Set the mode appropriately:
+       *
+       * SPI  CPOL NCPHA
+       * MODE
+       *  0    0    1
+       *  1    0    0
+       *  2    1    1
+       *  3    1    0
+       */
 
       regaddr = g_csraddr[priv->cs];
       regval  = getreg32(regaddr);
@@ -555,19 +563,19 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 
       switch (mode)
         {
-        case SPIDEV_MODE0: /* CPOL=0; NCPHA=0 */
+        case SPIDEV_MODE0: /* CPOL=0; NCPHA=1 */
+          regval |= SPI_CSR_NCPHA;
           break;
 
-        case SPIDEV_MODE1: /* CPOL=0; NCPHA=1 */
-            regval |= SPI_CSR_NCPHA;
+        case SPIDEV_MODE1: /* CPOL=0; NCPHA=0 */
           break;
 
-        case SPIDEV_MODE2: /* CPOL=1; NCPHA=0 */
-            regval |= SPI_CSR_CPOL;
+        case SPIDEV_MODE2: /* CPOL=1; NCPHA=1 */
+          regval |= (SPI_CSR_CPOL | SPI_CSR_NCPHA);
           break;
 
-        case SPIDEV_MODE3: /* CPOL=1; NCPHA=1 */
-          regval |= (SPI_CSR_CPOL|SPI_CSR_NCPHA);
+        case SPIDEV_MODE3: /* CPOL=1; NCPHA=0 */
+          regval |= SPI_CSR_CPOL;
           break;
 
         default: