STM32 F4 RTC is functional
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4178 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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69fabd1351
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7f2ec55f1f
@ -2266,3 +2266,4 @@
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* arch/arm/srcm/stm32/stm32_rtc.c, stm32f10xxx_rtc.c, and stm32f40xxx_rtc:
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Broke out separate drivers to handle the very different RTC implementations
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in the STM32 F1 and F4 family.
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* arch/arm/srcm/stm32/stm32f10xxx_rtc.c: STM32 F4 RTC is functional (12/14/2011)
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@ -55,6 +55,7 @@
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#define STM32_RTC_SSR_OFFSET 0x0028 /* RTC sub second register */
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#define STM32_RTC_SHIFTR_OFFSET 0x002c /* RTC shift control register */
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#define STM32_RTC_TSTR_OFFSET 0x0030 /* RTC time stamp time register */
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#define STM32_RTC_TSDR_OFFSET 0x0030 /* RTC time stamp date register */
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#define STM32_RTC_TSSSR_OFFSET 0x0038 /* RTC timestamp sub second register */
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#define STM32_RTC_CALR_OFFSET 0x003c /* RTC calibration register */
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#define STM32_RTC_TAFCR_OFFSET 0x0040 /* RTC tamper and alternate function configuration register */
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@ -98,6 +99,7 @@
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#define STM32_RTC_SSR (STM32_RTC_BASE+STM32_RTC_SSR_OFFSET)
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#define STM32_RTC_SHIFTR (STM32_RTC_BASE+STM32_RTC_SHIFTR_OFFSET)
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#define STM32_RTC_TSTR (STM32_RTC_BASE+STM32_RTC_TSTR_OFFSET)
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#define STM32_RTC_TSDR (STM32_RTC_BASE+STM32_RTC_TSDR_OFFSET)
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#define STM32_RTC_TSSSR (STM32_RTC_BASE+STM32_RTC_TSSSR_OFFSET)
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#define STM32_RTC_CALR (STM32_RTC_BASE+STM32_RTC_CALR_OFFSET)
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#define STM32_RTC_TAFCR (STM32_RTC_BASE+STM32_RTC_TAFCR_OFFSET)
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@ -151,7 +153,7 @@
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#define RTC_DR_DU_MASK (15 << RTC_DR_DU_SHIFT)
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#define RTC_DR_DT_SHIFT (4) /* Bits 4-5: Date tens in BCD format */
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#define RTC_DR_DT_MASK (3 << RTC_DR_DT_SHIFT)
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#define RTC_DR_MU_SHIFT (20) /* Bits 8-11: Month units in BCD format */
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#define RTC_DR_MU_SHIFT (8) /* Bits 8-11: Month units in BCD format */
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#define RTC_DR_MU_MASK (15 << RTC_DR_MU_SHIFT)
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#define RTC_DR_MT (1 << 12) /* Bit 12: Month tens in BCD format */
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#define RTC_DR_WDU_SHIFT (13) /* Bits 13-15: Week day units */
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@ -298,6 +300,18 @@
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#define RTC_TSTR_HT_MASK (3 << RTC_TSTR_HT_SHIFT)
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#define RTC_TSTR_PM (1 << 22) /* Bit 22: AM/PM notation */
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/* RTC time stamp date register */
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#define RTC_TSDR_DU_SHIFT (0) /* Bit 0-3: Date units in BCD format */
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#define RTC_TSDR_DU_MASK (15 << RTC_TSDR_DU_SHIFT) */
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#define RTC_TSDR_DT_SHIFT (4) /* Bits 4-5: Date tens in BCD format */
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#define RTC_TSDR_DT_MASK (3 << RTC_TSDR_DT_SHIFT)
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#define RTC_TSDR_MU_SHIFT (8) /* Bits 8-11: Month units in BCD format */
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#define RTC_TSDR_MU_MASK (xx << RTC_TSDR_MU_SHIFT)
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#define RTC_TSDR_MT (1 << 12) /* Bit 12: Month tens in BCD format */
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#define RTC_TSDR_WDU_SHIFT (13) /* Bits 13-15: Week day units */
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#define RTC_TSDR_WDU_MASK (7 << RTC_TSDR_WDU_SHIFT)
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/* RTC timestamp sub second register */
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#define RTC_TSSSR_MASK (0xffff) /* Bits 0-15: Sub second value */
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@ -45,6 +45,7 @@
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#include <time.h>
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#include <errno.h>
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#include <debug.h>
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#include <arch/board/board.h>
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@ -72,6 +73,10 @@
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# error "CONFIG_STM32_PWR must selected to use this driver"
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#endif
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_RTC
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#endif
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/* Constants ************************************************************************/
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#define SYNCHRO_TIMEOUT (0x00020000)
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@ -80,6 +85,20 @@
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#define RTC_PREDIV_S (0xff)
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#define RTC_PREDIV_A (0x7f)
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/* Debug ****************************************************************************/
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#ifdef CONFIG_DEBUG_RTC
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# define rtcdbg dbg
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# define rtcvdbg vdbg
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# define rtclldbg lldbg
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# define rtcllvdbg llvdbg
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#else
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# define rtcdbg(x...)
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# define rtcvdbg(x...)
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# define rtclldbg(x...)
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# define rtcllvdbg(x...)
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#endif
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/************************************************************************************
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* Private Types
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************************************************************************************/
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@ -105,6 +124,76 @@ volatile bool g_rtc_enabled = false;
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Name: rtc_dumpregs
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*
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* Description:
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* Disable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG_RTC
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static void rtc_dumpregs(FAR const char *msg)
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{
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rtclldbg("%s:\n", msg);
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rtclldbg(" TR: %08x\n", getreg32(STM32_RTC_TR));
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rtclldbg(" DR: %08x\n", getreg32(STM32_RTC_DR));
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rtclldbg(" CR: %08x\n", getreg32(STM32_RTC_CR));
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rtclldbg(" ISR: %08x\n", getreg32(STM32_RTC_ISR));
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rtclldbg(" PRER: %08x\n", getreg32(STM32_RTC_PRER));
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rtclldbg(" WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
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rtclldbg(" CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR));
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rtclldbg(" ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
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rtclldbg(" ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
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rtclldbg(" SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
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rtclldbg(" TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
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rtclldbg(" TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
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rtclldbg(" TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
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rtclldbg(" CALR: %08x\n", getreg32(STM32_RTC_CALR));
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rtclldbg(" TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
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rtclldbg("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
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rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
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rtclldbg(" BK0: %08x\n", getreg32(STM32_RTC_BK0R));
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}
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#else
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# define tc_dumpregs(msg)
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#endif
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/************************************************************************************
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* Name: rtc_dumptime
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*
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* Description:
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* Disable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG_RTC
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static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
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{
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rtclldbg("%s:\n", msg);
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rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
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rtclldbg(" tm_min: %08x\n", tp->tm_min);
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rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
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rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
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rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
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rtclldbg(" tm_year: %08x\n", tp->tm_year);
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}
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#else
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# define rtc_dumptime(tp, msg)
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#endif
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/************************************************************************************
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* Name: rtc_wprunlock
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*
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@ -485,6 +574,8 @@ int up_rtcinitialize(void)
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uint32_t regval;
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int ret;
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rtc_dumpregs("On reset");
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/* Clocking for the PWR block must be provided. However, this is done
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* unconditionally in stm32f40xxx_rcc.c on power up. This done unconditionally
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* because the PWR block is also needed to set the internal voltage regulator for
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@ -508,6 +599,10 @@ int up_rtcinitialize(void)
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/* Perform the one-time setup of the LSE clocking to the RTC */
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ret = rtc_setup();
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/* Remember that the RTC is initialized */
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putreg32(RTC_MAGIC, STM32_RTC_BK0R);
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}
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else
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{
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@ -527,7 +622,7 @@ int up_rtcinitialize(void)
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*/
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#ifdef CONFIG_RTC_ALARM
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# warning "Missing logic"
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# warning "Missing EXTI setup logic"
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/* Then attach the ALARM interrupt handler */
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@ -536,6 +631,7 @@ int up_rtcinitialize(void)
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#endif
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g_rtc_enabled = true;
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rtc_dumpregs("After Initialzation");
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return OK;
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}
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@ -581,6 +677,8 @@ int up_rtc_getdatetime(FAR struct tm *tp)
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}
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while (tmp != dr);
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rtc_dumpregs("Reading Time");
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/* Convert the RTC time to fields in struct tm format. All of the STM32
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* All of the ranges of values correspond between struct tm and the time
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* register.
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@ -612,6 +710,8 @@ int up_rtc_getdatetime(FAR struct tm *tp)
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tmp = (dr & (RTC_DR_YU_MASK|RTC_DR_YT_MASK)) >> RTC_DR_YU_SHIFT;
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tp->tm_year = rtc_bcd2bin(tmp) + 100;
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rtc_dumptime(tp, "Returning");
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return OK;
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}
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@ -640,6 +740,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
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/* Break out the time values (not that the time is set only to units of seconds) */
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(void)gmtime_r(&tp->tv_sec, &newtime);
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rtc_dumptime(&newtime, "Setting time");
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/* Then write the broken out values to the RTC */
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@ -663,8 +764,8 @@ int up_rtc_settime(FAR const struct timespec *tp)
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*/
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dr = (rtc_bin2bcd(newtime.tm_mday) << RTC_DR_DU_SHIFT) |
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((rtc_bin2bcd(newtime.tm_mon) + 1) << RTC_DR_MU_SHIFT) |
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((rtc_bin2bcd(newtime.tm_year) - 100) << RTC_DR_YU_SHIFT);
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((rtc_bin2bcd(newtime.tm_mon + 1)) << RTC_DR_MU_SHIFT) |
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((rtc_bin2bcd(newtime.tm_year - 100)) << RTC_DR_YU_SHIFT);
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dr &= ~RTC_DR_RESERVED_BITS;
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/* Disable the write protection for RTC registers */
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@ -692,6 +793,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
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/* Re-enable the write protection for RTC registers */
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rtc_wprlock();
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rtc_dumpregs("New time setting");
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return ret;
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}
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