diff --git a/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h b/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h
index 5be34dc3ea..c2db11db88 100644
--- a/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h
+++ b/arch/arm/src/lpc43xx/chip/lpc43_ethernet.h
@@ -209,7 +209,7 @@
 #  define ETH_MACMIIA_CR_20_35       (2 << ETH_MACMIIA_CR_SHIFT)  /* 20-35   MHz CLK_M4_ETHERNET/16 */
 #  define ETH_MACMIIA_CR_35_60       (3 << ETH_MACMIIA_CR_SHIFT)  /* 35-60   MHz CLK_M4_ETHERNET/26 */
 #  define ETH_MACMIIA_CR_150_168     (4 << ETH_MACMIIA_CR_SHIFT)  /* 150-168 MHz CLK_M4_ETHERNET/102 */
-#  define ETH_MACMIIA_CR_150_168     (5 << ETH_MACMIIA_CR_SHIFT)  /* 250 - 300 MHz CLK_M4_ETHERNET/124 */
+#  define ETH_MACMIIA_CR_250_300     (5 << ETH_MACMIIA_CR_SHIFT)  /* 250-300 MHz CLK_M4_ETHERNET/124 */
 #  define ETH_MACMIIA_CR_DIV42       (8 << ETH_MACMIIA_CR_SHIFT)  /* 60-100  MHz CLK_M4_ETHERNET/42 */
 #  define ETH_MACMIIA_CR_DIV62       (9 << ETH_MACMIIA_CR_SHIFT)  /* 100-150 MHz CLK_M4_ETHERNET/62 */
 #  define ETH_MACMIIA_CR_DIV16       (10 << ETH_MACMIIA_CR_SHIFT) /* 20-35   MHz CLK_M4_ETHERNET/16 */
diff --git a/arch/arm/src/stm32/chip/stm32_eth.h b/arch/arm/src/stm32/chip/stm32_eth.h
index e074c520c4..ac078aacbe 100644
--- a/arch/arm/src/stm32/chip/stm32_eth.h
+++ b/arch/arm/src/stm32/chip/stm32_eth.h
@@ -261,7 +261,7 @@
 #  define ETH_MACMIIAR_CR_100_150    (1 << ETH_MACMIIAR_CR_SHIFT) /* 001 100-150 MHz HCLK/62 */
 #  define ETH_MACMIIAR_CR_20_35      (2 << ETH_MACMIIAR_CR_SHIFT) /* 010 20-35   MHz HCLK/16 */
 #  define ETH_MACMIIAR_CR_35_60      (3 << ETH_MACMIIAR_CR_SHIFT) /* 011 35-60   MHz HCLK/26 */
-#  define ETH_MACMIIAR_CR_150_168    (4 << ETH_MACMIIAR_CR_SHIFT) /* 100 150-168 MHz HCLK/102 */
+#  define ETH_MACMIIAR_CR_150_180    (4 << ETH_MACMIIAR_CR_SHIFT) /* 100 150-180 MHz HCLK/102 */
 #endif
 #define ETH_MACMIIAR_MR_SHIFT        (6)       /* Bits 6-10: MII register */
 #define ETH_MACMIIAR_MR_MASK         (31 << ETH_MACMIIAR_MR_SHIFT)
diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c
index b9b3da2e0e..1ef3687c04 100644
--- a/arch/arm/src/stm32/stm32_eth.c
+++ b/arch/arm/src/stm32/stm32_eth.c
@@ -255,8 +255,8 @@
 #  define ETH_MACMIIAR_CR ETH_MACMIIAR_CR_60_100
 #elif STM32_HCLK_FREQUENCY >= 100000000 && STM32_HCLK_FREQUENCY < 150000000
 #  define ETH_MACMIIAR_CR ETH_MACMIIAR_CR_100_150
-#elif STM32_HCLK_FREQUENCY >= 150000000 && STM32_HCLK_FREQUENCY <= 168000000
-#  define ETH_MACMIIAR_CR ETH_MACMIIAR_CR_150_168
+#elif STM32_HCLK_FREQUENCY >= 150000000 && STM32_HCLK_FREQUENCY <= 180000000
+#  define ETH_MACMIIAR_CR ETH_MACMIIAR_CR_150_180
 #else
 #  error "STM32_HCLK_FREQUENCY not supportable"
 #endif
@@ -3662,9 +3662,11 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
 #endif
 #endif
 
+#ifdef CONFIG_STM32_ETH_PTP
   /* Enable pulse-per-second (PPS) output signal */
 
   stm32_configgpio(GPIO_ETH_PPS_OUT);
+#endif
 }
 
 /****************************************************************************