SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected
This commit is contained in:
Gregory Nutt
parent
371639637f
commit
7f733b0472
@ -695,6 +695,7 @@ uintptr_t sam_physregaddr(uintptr_t virtregaddr)
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* address
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*/
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dbg("Bad virtual address: %08lx\n|", virtregaddr);
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DEBUGPANIC();
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return virtregaddr;
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}
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@ -791,10 +792,15 @@ uintptr_t sam_physramaddr(uintptr_t virtramaddr)
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#endif
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/* We will not get here unless we are called with an invalid or
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* unsupported RAM address
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* unsupported RAM address. Special case the NULL address.
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*/
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if (virtramaddr != 0)
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{
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dbg("Bad virtual address: %08lx\n|", virtramaddr);
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DEBUGPANIC();
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}
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return virtramaddr;
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}
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@ -802,7 +808,7 @@ uintptr_t sam_physramaddr(uintptr_t virtramaddr)
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* Name: sam_virtramaddr
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*
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* Description:
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* Give the phsical address of a RAM memory location, return the virtual
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* Give the physical address of a RAM memory location, return the virtual
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* address of that location.
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*
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****************************************************************************/
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@ -890,9 +896,14 @@ uintptr_t sam_virtramaddr(uintptr_t physramaddr)
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#endif
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/* We will not get here unless we are called with an invalid or
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* unsupported RAM address
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* unsupported RAM address. Special case the NULL address.
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*/
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if (physramaddr != 0)
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{
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dbg("Bad physical address: %08lx\n|", physramaddr);
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DEBUGPANIC();
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}
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return physramaddr;
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}
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@ -181,6 +181,7 @@ struct sam_rhport_s
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volatile bool connected; /* Connected to device */
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volatile bool lowspeed; /* Low speed device attached. */
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uint8_t rhpndx; /* Root hub port index */
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bool ep0init; /* True: EP0 initialized */
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/* The bound device class driver */
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@ -324,6 +325,8 @@ static inline int sam_remisoced(struct sam_ed_s *ed);
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static int sam_enqueuetd(struct sam_rhport_s *rhport, struct sam_ed_s *ed,
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uint32_t dirpid, uint32_t toggle,
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volatile uint8_t *buffer, size_t buflen);
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static void sam_ep0enqueue(int rhpndx);
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static void sam_ep0dequeue(int rhpndx);
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static int sam_wdhwait(struct sam_rhport_s *rhport, struct sam_ed_s *ed);
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static int sam_ctrltd(struct sam_rhport_s *rhport, uint32_t dirpid,
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uint8_t *buffer, size_t buflen);
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@ -361,10 +364,6 @@ static int sam_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
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FAR uint8_t *buffer, size_t buflen);
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static void sam_disconnect(FAR struct usbhost_driver_s *drvr);
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/* Initialization **************************************************************/
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static inline void sam_ep0init(void);
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/*******************************************************************************
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* Private Data
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*******************************************************************************/
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@ -969,7 +968,7 @@ static inline int sam_addinted(const FAR struct usbhost_epdesc_s *epdesc,
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*/
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ed->hw.nexted = physhead;
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physed = sam_virtramaddr((uintptr_t)ed);
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physed = sam_physramaddr((uintptr_t)ed);
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sam_setinttab((uint32_t)physed, interval, offset);
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uvdbg("head: %08x next: %08x\n", physed, physhead);
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@ -1190,6 +1189,8 @@ static int sam_enqueuetd(struct sam_rhport_s *rhport, struct sam_ed_s *ed,
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/* Skip processing of this ED */
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ed->hw.ctrl |= ED_CONTROL_K;
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cp15_coherent_dcache((uintptr_t)ed,
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(uintptr_t)ed + sizeof(struct sam_ed_s));
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/* Select the common tail ED for this root hub port */
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@ -1224,20 +1225,223 @@ static int sam_enqueuetd(struct sam_rhport_s *rhport, struct sam_ed_s *ed,
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/* Flush the buffer, the new TD, and the modified ED to RAM */
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cp15_coherent_dcache((uintptr_t)buffer, buflen);
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cp15_coherent_dcache((uintptr_t)tdtail, sizeof(struct sam_gtd_s));
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cp15_coherent_dcache((uintptr_t)td, sizeof(struct sam_gtd_s));
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cp15_coherent_dcache((uintptr_t)buffer,
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(uintptr_t)buffer + buflen);
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cp15_coherent_dcache((uintptr_t)tdtail,
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(uintptr_t)tdtail + sizeof(struct sam_gtd_s));
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cp15_coherent_dcache((uintptr_t)td,
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(uintptr_t)td + sizeof(struct sam_gtd_s));
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/* Resume processing of this ED */
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ed->hw.ctrl &= ~ED_CONTROL_K;
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cp15_coherent_dcache((uintptr_t)ed, sizeof(struct sam_ed_s));
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cp15_coherent_dcache((uintptr_t)ed,
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(uintptr_t)ed + sizeof(struct sam_ed_s));
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ret = OK;
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}
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return ret;
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}
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/*******************************************************************************
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* Name: sam_ep0enqueue
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*
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* Description:
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* Initialize ED for EP0, add it to the control ED list, and enable control
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* transfers.
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*
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* Input Parameters:
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* rhpndx - Root hub port index.
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*
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* Returned Values:
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* None
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*
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*******************************************************************************/
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static void sam_ep0enqueue(int rhpndx)
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{
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struct sam_ed_s *edctrl;
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struct sam_gtd_s *tdtail;
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irqstate_t flags;
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uintptr_t physaddr;
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uint32_t regval;
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/* ControlListEnable. This bit is cleared to disable the processing of the
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* Control list. We should never modify the control list while CLE is set.
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*/
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flags = irqsave();
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regval = sam_getreg(SAM_USBHOST_CTRL);
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regval &= ~OHCI_CTRL_CLE;
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sam_putreg(regval, SAM_USBHOST_CTRL);
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/* Get some pointers to the EP0 control ED and to the common tail TD
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* for this root hub port.
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*/
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tdtail = &g_tdtail[rhpndx];
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edctrl = &g_edctrl[rhpndx];
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/* Initialize the common tail TD for this port */
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memset(tdtail, 0, sizeof(struct sam_gtd_s));
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tdtail->ed = edctrl;
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tdtail->prealloc = true;
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/* Initialize the control endpoint for this port */
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memset(edctrl, 0, sizeof(struct sam_ed_s));
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sem_init(&edctrl->wdhsem, 0, 0);
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/* Set up some default values (like max packetsize = 8).
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* NOTE that the SKIP bit is set until the first readl TD is added.
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*/
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(void)sam_ep0configure(&g_ohci.rhport[rhpndx].drvr, 0, 8);
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edctrl->hw.ctrl |= ED_CONTROL_K;
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/* Link the common tail TD to the ED's TD list */
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physaddr = sam_physramaddr((uintptr_t)tdtail);
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edctrl->hw.headp = (uint32_t)physaddr;
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edctrl->hw.tailp = (uint32_t)physaddr;
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/* The new ED will be the first ED in the list. Set the nexted
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* pointer of the ED old head of the list
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*/
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physaddr = sam_getreg(SAM_USBHOST_CTRLHEADED);
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edctrl->hw.nexted = physaddr;
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/* Set the control list head to the new ED */
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physaddr = (uintptr_t)sam_physramaddr((uintptr_t)edctrl);
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sam_putreg(physaddr, SAM_USBHOST_CTRLHEADED);
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/* Flush the affected control ED and tail TD to RAM */
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cp15_coherent_dcache((uintptr_t)edctrl,
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(uintptr_t)edctrl + sizeof(struct sam_ed_s));
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cp15_coherent_dcache((uintptr_t)tdtail,
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(uintptr_t)tdtail + sizeof(struct sam_gtd_s));
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/* ControlListEnable. This bit is set to (re-)enable the processing of the
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* Control list. Note: once enabled, it remains enabled and we may even
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* complete list processing before we get the bit set.
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*/
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regval = sam_getreg(SAM_USBHOST_CTRL);
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regval |= OHCI_CTRL_CLE;
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sam_putreg(regval, SAM_USBHOST_CTRL);
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irqrestore(flags);
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}
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/*******************************************************************************
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* Name: sam_ep0dequeue
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*
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* Description:
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* Remove the ED for EP0 from the control ED list and posssibly disable control
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* list processing.
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*
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* Input Parameters:
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* rhpndx - Root hub port index.
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*
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* Returned Values:
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* None
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*
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*******************************************************************************/
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static void sam_ep0dequeue(int rhpndx)
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{
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struct sam_ed_s *edctrl;
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struct sam_ed_s *curred;
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struct sam_ed_s *preved;
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struct sam_gtd_s *tdtail;
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struct sam_gtd_s *currtd;
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irqstate_t flags;
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uintptr_t physcurr;
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uint32_t regval;
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/* ControlListEnable. This bit is cleared to disable the processing of the
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* Control list. We should never modify the control list while CLE is set.
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*/
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flags = irqsave();
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regval = sam_getreg(SAM_USBHOST_CTRL);
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regval &= ~OHCI_CTRL_CLE;
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sam_putreg(regval, SAM_USBHOST_CTRL);
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/* Search the control list to find the entry to be removed (and its
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* precedessor).
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*/
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edctrl = &g_edctrl[rhpndx];
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physcurr = sam_getreg(SAM_USBHOST_CTRLHEADED);
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for (curred = (struct sam_ed_s *)sam_virtramaddr(physcurr),
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preved = NULL;
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curred && curred != edctrl;
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preved = curred,
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curred =(struct sam_ed_s *)sam_virtramaddr(physcurr))
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{
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physcurr = curred->hw.nexted;
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}
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DEBUGASSERT(curred);
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/* Remove the ED from the control list */
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if (preved)
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{
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/* Unlink the ED from the previous ED in the list */
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preved->hw.nexted = edctrl->hw.nexted;
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/* Flush the modified ED to RAM */
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cp15_coherent_dcache((uintptr_t)preved,
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(uintptr_t)preved + sizeof(struct sam_ed_s));
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}
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else
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{
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/* Set the new control list head ED */
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sam_putreg(edctrl->hw.nexted, SAM_USBHOST_CTRLHEADED);
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/* If the control list head is still non-NULL, then (re-)enable
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* processing of the Control list.
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*/
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if (edctrl->hw.nexted != 0)
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{
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regval = sam_getreg(SAM_USBHOST_CTRL);
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regval |= OHCI_CTRL_CLE;
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sam_putreg(regval, SAM_USBHOST_CTRL);
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}
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}
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irqrestore(flags);
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/* Release any TDs that may still be attached to the ED */
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tdtail = &g_tdtail[rhpndx];
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physcurr = edctrl->hw.headp;
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for (currtd = (struct sam_gtd_s *)sam_virtramaddr(physcurr);
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currtd && currtd != tdtail;
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currtd =(struct sam_gtd_s *)sam_virtramaddr(physcurr))
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{
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physcurr = currtd->hw.nexttd;
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sam_tdfree(currtd);
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}
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/* Reset the control Ed and tail the common tail TD for this port.
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* This is totally unnecessary but helps with debug.
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*/
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memset(tdtail, 0, sizeof(struct sam_gtd_s));
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memset(edctrl, 0, sizeof(struct sam_ed_s));
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}
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/*******************************************************************************
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* Name: sam_wdhwait
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*
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@ -1514,8 +1718,21 @@ static void sam_wdh_interrupt(void)
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* cleared in the interrupt status register.
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*/
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/* Invalidate D-cache to force re-reading of the Done Head */
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# if 0 /* Apparently insufficient */
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cp15_invalidate_dcache((uintptr_t)&g_hcca.donehead,
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(uintptr_t)&g_hcca.donehead + sizeof(uint32_t));
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#else
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cp15_invalidate_dcache((uintptr_t)&g_hcca,
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(uintptr_t)&g_hcca + sizeof(struct ohci_hcca_s));
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#endif
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/* Now read the done head */
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td = (struct sam_gtd_s *)sam_virtramaddr(g_hcca.donehead);
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g_hcca.donehead = 0;
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DEBUGASSERT(td);
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/* Process each TD in the write done list */
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@ -1526,6 +1743,11 @@ static void sam_wdh_interrupt(void)
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struct sam_ed_s *ed = td->ed;
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DEBUGASSERT(ed != NULL);
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/* Invalidate the ED D-cache to force reload from memory */
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cp15_invalidate_dcache((uintptr_t)ed,
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(uintptr_t)ed + sizeof( struct sam_ed_s));
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/* Save the condition code from the (single) TD status/control
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* word.
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*/
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@ -1544,7 +1766,7 @@ static void sam_wdh_interrupt(void)
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/* Return the TD to the free list */
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next = (struct sam_gtd_s *)td->hw.nexttd;
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next = (struct sam_gtd_s *)sam_virtramaddr(td->hw.nexttd);
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sam_tdfree(td);
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/* And wake up the thread waiting for the WDH event */
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@ -1758,6 +1980,14 @@ static int sam_enumerate(FAR struct usbhost_connection_s *conn, int rhpndx)
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return -ENODEV;
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}
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/* Add EP0 to the control list */
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if (!rhport->ep0init)
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{
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sam_ep0enqueue(rhport->rhpndx);
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rhport->ep0init = true;
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}
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/* USB 2.0 spec says at least 50ms delay before port reset */
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up_mdelay(100);
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@ -1842,7 +2072,8 @@ static int sam_ep0configure(FAR struct usbhost_driver_s *drvr, uint8_t funcaddr,
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/* Flush the modified control ED to RAM */
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cp15_coherent_dcache((uintptr_t)edctrl, sizeof(struct sam_ed_s));
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cp15_coherent_dcache((uintptr_t)edctrl,
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(uintptr_t)edctrl + sizeof(struct sam_ed_s));
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sam_givesem(&g_ohci.exclsem);
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uvdbg("RHPort%d EP0 CTRL: %08x\n", rhport->rhpndx + 1, edctrl->hw.ctrl);
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@ -2511,109 +2742,16 @@ static void sam_disconnect(FAR struct usbhost_driver_s *drvr)
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struct sam_rhport_s *rhport = (struct sam_rhport_s *)drvr;
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DEBUGASSERT(rhport);
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/* Remove the disconnected port from the control list */
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sam_ep0dequeue(rhport->rhpndx);
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rhport->ep0init = false;
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/* Unbind the class */
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rhport->class = NULL;
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}
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/*******************************************************************************
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* Initialization
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*******************************************************************************/
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/*******************************************************************************
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* Name: sam_ep0init
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*
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* Description:
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* Initialize ED for EP0, add it to the control ED list, and enable control
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* transfers.
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*
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* Input Parameters:
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* rhport - Root humb state instance.
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*
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* Returned Values:
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* None
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*
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*******************************************************************************/
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static inline void sam_ep0init(void)
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{
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uint32_t regval;
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struct sam_ed_s *edctrl;
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struct sam_ed_s *preved;
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struct sam_gtd_s *tdtail;
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uintptr_t phyctrl;
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uintptr_t phytail;
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int rhpndx;
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/* Initialize the EP0 control EDs */
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for (rhpndx = 0, preved = NULL;
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rhpndx < SAM_USBHOST_NRHPORT;
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rhpndx++, preved = edctrl)
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{
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/* Get some pointers to the EP0 control ED and to the common tail TD
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* for this root hub port.
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*/
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tdtail = &g_tdtail[rhpndx];
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edctrl = &g_edctrl[rhpndx];
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/* We will also need the physical addresses for the DMA */
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phytail = sam_physramaddr((uintptr_t)tdtail);
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/* Initialize the common tail TD for this port */
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memset(tdtail, 0, sizeof(struct sam_gtd_s));
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tdtail->ed = edctrl;
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tdtail->prealloc = true;
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/* Initialize the control endpoint for this port */
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memset(edctrl, 0, sizeof(struct sam_ed_s));
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sem_init(&edctrl->wdhsem, 0, 0);
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/* Set up some default values (like max packetsize = 8). */
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(void)sam_ep0configure(&g_ohci.rhport[rhpndx].drvr, 0, 8);
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/* Link the common tail TD to the ED's TD list */
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edctrl->hw.headp = (uint32_t)phytail;
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edctrl->hw.tailp = (uint32_t)phytail;
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/* If this is not the first ED in the list, then link the previous ED
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* to this one. Because of the memset, the last ED in the list will
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* have nexted = NULL.
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*/
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|
||||
if (preved)
|
||||
{
|
||||
phyctrl = sam_physramaddr((uintptr_t)edctrl);
|
||||
preved->hw.nexted = (uint32_t)phyctrl;
|
||||
}
|
||||
}
|
||||
|
||||
/* Flush all of the control EDs and tail TDs to RAM */
|
||||
|
||||
cp15_coherent_dcache((uintptr_t)g_edctrl,
|
||||
SAM_USBHOST_NRHPORT * sizeof(struct sam_ed_s));
|
||||
cp15_coherent_dcache((uintptr_t)g_tdtail,
|
||||
SAM_USBHOST_NRHPORT * sizeof(struct sam_gtd_s));
|
||||
|
||||
/* Set the head of the control list to the EP0 ED for RHport0. */
|
||||
|
||||
sam_putreg((uint32_t)sam_physramaddr((uintptr_t)&g_edctrl[0]),
|
||||
SAM_USBHOST_CTRLHEADED);
|
||||
|
||||
/* ControlListEnable. This bit is set to enable the processing of the
|
||||
* Control list. Note: once enabled, it remains enabled and we may even
|
||||
* complete list processing before we get the bit set. We really
|
||||
* should never modify the control list while CLE is set.
|
||||
*/
|
||||
|
||||
regval = sam_getreg(SAM_USBHOST_CTRL);
|
||||
regval |= OHCI_CTRL_CLE;
|
||||
sam_putreg(regval, SAM_USBHOST_CTRL);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Public Functions
|
||||
*******************************************************************************/
|
||||
@ -2798,10 +2936,6 @@ FAR struct usbhost_connection_s *sam_ohci_initialize(int controller)
|
||||
|
||||
sam_putreg((uint32_t)&g_hcca, SAM_USBHOST_HCCA);
|
||||
|
||||
/* Set up EP0 */
|
||||
|
||||
sam_ep0init();
|
||||
|
||||
/* Clear pending interrupts */
|
||||
|
||||
regval = sam_getreg(SAM_USBHOST_INTST);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user