Fixes STM32F107 DMA issue
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5182 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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325e6dca8d
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801e07e135
@ -3386,3 +3386,7 @@
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case now (either space or a fieldwidth must be provided). But
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at least some of the bad logic that attempted to handle this
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case has been removed (noted by Kate).
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* arch/arm/src/stm32/stm32_eth.c: DMA buffer sizes must be an
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even multiple of 4, 8, or 16 bytes.
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* arch/arm/src/stm32/stm32_idle.c: Fixes STM32F107 DMA issues:
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We cannot go into sleep mode while Ethernet is actively DMAing.
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@ -711,7 +711,9 @@
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/* RDES0: Receive descriptor Word0 */
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#define ETH_RDES0_PCE (1 << 0) /* Bit 0: Payload checksum error */
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#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define ETH_RDES0_ESA (1 << 0) /* Bit 0: Extended status available */
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#endif
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#define ETH_RDES0_CE (1 << 1) /* Bit 1: CRC error */
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#define ETH_RDES0_DBE (1 << 2) /* Bit 2: Dribble bit error */
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#define ETH_RDES0_RE (1 << 3) /* Bit 3: Receive error */
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@ -737,6 +739,7 @@
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#define ETH_RDES1_RBS1_SHIFT (0) /* Bits 0-12: Receive buffer 1 size */
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#define ETH_RDES1_RBS1_MASK (0x1fff << ETH_RDES1_RBS1_SHIFT)
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/* Bit 13: Reserved */
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#define ETH_RDES1_RCH (1 << 14) /* Bit 14: Second address chained */
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#define ETH_RDES1_RER (1 << 15) /* Bit 15: Receive end of ring */
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#define ETH_RDES1_RBS2_SHIFT (16) /* Bits 16-28: Receive buffer 2 size */
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@ -186,10 +186,12 @@
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#endif
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/* Add 4 to the configured buffer size to account for the 2 byte checksum
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* memory needed at the end of the maximum size packet.
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* memory needed at the end of the maximum size packet. Buffer sizes must
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* be an even multiple of 4, 8, or 16 bytes (depending on buswidth). We
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* will use the 16-byte alignment in all cases.
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*/
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#define OPTIMAL_ETH_BUFSIZE (CONFIG_NET_BUFSIZE+4)
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#define OPTIMAL_ETH_BUFSIZE ((CONFIG_NET_BUFSIZE + 4 + 15) & ~15)
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#ifndef CONFIG_STM32_ETH_BUFSIZE
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# define CONFIG_STM32_ETH_BUFSIZE OPTIMAL_ETH_BUFSIZE
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@ -199,6 +201,10 @@
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# error "CONFIG_STM32_ETH_BUFSIZE is too large"
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#endif
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#if (CONFIG_STM32_ETH_BUFSIZE & 15) != 0
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# error "CONFIG_STM32_ETH_BUFSIZE must be aligned"
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#endif
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#if CONFIG_STM32_ETH_BUFSIZE != OPTIMAL_ETH_BUFSIZE
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# warning "You using an incomplete/untested configuration"
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#endif
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@ -1470,9 +1476,6 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
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{
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priv->segments++;
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nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
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priv->rxhead, priv->rxcurr, priv->segments);
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/* Check if the there is only one segment in the frame */
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if (priv->segments == 1)
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@ -1484,6 +1487,9 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
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rxcurr = priv->rxcurr;
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}
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nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
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priv->rxhead, priv->rxcurr, priv->segments);
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/* Check if any errors are reported in the frame */
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if ((rxdesc->rdes0 & ETH_RDES0_ES) == 0)
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@ -45,6 +45,7 @@
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#include <arch/irq.h>
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#include "chip.h"
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#include "stm32_pm.h"
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#include "up_internal.h"
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@ -178,11 +179,31 @@ void up_idle(void)
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up_idlepm();
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/* Sleep until an interrupt occurs to save power */
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/* Sleep until an interrupt occurs to save power.
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*
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* NOTE: There is an STM32F107 errata that is fixed by the following
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* workaround:
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*
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* "2.17.11 Ethernet DMA not working after WFI/WFE instruction
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* Description
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* If a WFI/WFE instruction is executed to put the system in sleep mode
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* while the Ethernet MAC master clock on the AHB bus matrix is ON and all
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* remaining masters clocks are OFF, the Ethernet DMA will be not able to
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* perform any AHB master accesses during sleep mode."
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*
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* Workaround
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* Enable DMA1 or DMA2 clocks in the RCC_AHBENR register before
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* executing the WFI/WFE instruction."
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*
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* Here the workaround is just don't go into SLEEP mode for the connectivity
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* line parts if Ethernet is enabled.
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*/
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#if !defined(CONFIG_STM32_CONNECTIVITYLINE) || !defined(CONFIG_STM32_ETHMAC)
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BEGIN_IDLE();
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asm("WFI");
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END_IDLE();
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#endif
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#endif
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}
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@ -456,7 +456,7 @@ CONFIG_NET_BUFSIZE=562
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CONFIG_NET_TCP=y
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CONFIG_NET_TCP_CONNS=16
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CONFIG_NET_MAX_LISTENPORTS=16
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CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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# CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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CONFIG_NET_NTCP_READAHEAD_BUFFERS=8
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CONFIG_NET_TCP_RECVDELAY=0
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# CONFIG_NET_TCPBACKLOG is not set
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@ -469,7 +469,7 @@ CONFIG_NET_ICMP_PING=y
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# CONFIG_NET_PINGADDRCONF is not set
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# CONFIG_NET_IGMP is not set
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CONFIG_NET_STATISTICS=y
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CONFIG_NET_RECEIVE_WINDOW=562
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# CONFIG_NET_RECEIVE_WINDOW=562
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CONFIG_NET_ARPTAB_SIZE=16
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# CONFIG_NET_ARP_IPIN is not set
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@ -388,7 +388,7 @@ CONFIG_NET_BUFSIZE=562
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CONFIG_NET_TCP=y
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CONFIG_NET_TCP_CONNS=40
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CONFIG_NET_MAX_LISTENPORTS=40
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CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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# CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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CONFIG_NET_NTCP_READAHEAD_BUFFERS=16
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CONFIG_NET_TCP_RECVDELAY=0
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CONFIG_NET_TCPBACKLOG=y
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@ -401,7 +401,7 @@ CONFIG_NET_ICMP_PING=y
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# CONFIG_NET_PINGADDRCONF is not set
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# CONFIG_NET_IGMP is not set
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CONFIG_NET_STATISTICS=y
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CONFIG_NET_RECEIVE_WINDOW=562
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# CONFIG_NET_RECEIVE_WINDOW=562
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CONFIG_NET_ARPTAB_SIZE=16
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# CONFIG_NET_ARP_IPIN is not set
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@ -388,7 +388,7 @@ CONFIG_NET_BUFSIZE=650
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CONFIG_NET_TCP=y
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CONFIG_NET_TCP_CONNS=40
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CONFIG_NET_MAX_LISTENPORTS=40
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CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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# CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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CONFIG_NET_NTCP_READAHEAD_BUFFERS=16
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CONFIG_NET_TCP_RECVDELAY=0
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CONFIG_NET_TCPBACKLOG=y
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@ -401,7 +401,7 @@ CONFIG_NET_ICMP_PING=y
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# CONFIG_NET_PINGADDRCONF is not set
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# CONFIG_NET_IGMP is not set
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CONFIG_NET_STATISTICS=y
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CONFIG_NET_RECEIVE_WINDOW=562
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# CONFIG_NET_RECEIVE_WINDOW=562
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CONFIG_NET_ARPTAB_SIZE=16
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CONFIG_NET_ARP_IPIN=y
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@ -382,7 +382,7 @@ CONFIG_NET_BUFSIZE=650
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CONFIG_NET_TCP=y
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CONFIG_NET_TCP_CONNS=40
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CONFIG_NET_MAX_LISTENPORTS=40
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CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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# CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
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CONFIG_NET_NTCP_READAHEAD_BUFFERS=16
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CONFIG_NET_TCP_RECVDELAY=0
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CONFIG_NET_TCPBACKLOG=y
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@ -395,7 +395,7 @@ CONFIG_NET_ICMP_PING=y
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# CONFIG_NET_PINGADDRCONF is not set
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# CONFIG_NET_IGMP is not set
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CONFIG_NET_STATISTICS=y
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CONFIG_NET_RECEIVE_WINDOW=562
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# CONFIG_NET_RECEIVE_WINDOW=562
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CONFIG_NET_ARPTAB_SIZE=16
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CONFIG_NET_ARP_IPIN=y
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