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SAMv71-XULT: Fix MRF24J40 interrupt GPIO number.

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This commit is contained in:
Gregory Nutt 2017-08-15 11:43:31 -06:00
parent b274a97840
commit 8033f8ae5b
5 changed files with 12 additions and 13 deletions
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4
configs/samv71-xult/README.txt
View File

@ -1483,13 +1483,13 @@ Click Shield
AD7 PC12 *** Not used ***
D0 PD28 (both) HDR_RX PD28 URXD3 GPIO_UART3_RXD
D1 PD30 (both) HDR_TX PD30 UTXD3 GPIO_UART3_TXD_1
D2 PA5 microBUS1 GPIO interrupt input PA5
D2 PA0 microBUS1 GPIO interrupt input PA0
D3 PA6 microBUS2 GPIO interrupt input PA6
D4 PD27 *** Not used ***
D5 PD11 microBUS2 PWMB PD11 PWMC0_H0
D6 PC19 microBUS1 PWMA PC19 PWMC0_H2
D7 PA2 *** Not used ***
D8 PA17 *** Not used ***
D8 PA5 *** Not used ***
D9 PC9 microBUS2 CS GPIO output PC9
D10 PD25 microBUS1 CS GPIO output PD25 SPI0_NPCS1
D11 PD21 (both) SPI-MOSI PD21 SPI0_MOSI GPIO_SPI0_MOSI

1
configs/samv71-xult/mrf24j40-starhub/defconfig
View File

@ -80,7 +80,6 @@ CONFIG_NETDEV_STATISTICS=y
CONFIG_NETDEV_WIRELESS_IOCTL=y
CONFIG_NETUTILS_TELNETC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8

2
configs/samv71-xult/src/sam_mrf24j40.c
View File

@ -271,7 +271,7 @@ static int sam_mrf24j40_devsetup(FAR struct sam_priv_s *priv)
#ifdef CONFIG_IEEE802154_NETDEV
/* Use the IEEE802.15.4 MAC interface instance to create a 6LoWPAN
* network interface by wrapping the MAC intrface instance in a
* network interface by wrapping the MAC interface instance in a
* network device driver via mac802154dev_register().
*/

8
configs/samv71-xult/src/samv71-xult.h
View File

@ -573,13 +573,13 @@
* AD7 PC12 *** Not used ***
* D0 PD28 (both) HDR_RX PD28 URXD3 GPIO_UART3_RXD
* D1 PD30 (both) HDR_TX PD30 UTXD3 GPIO_UART3_TXD_1
* D2 PA5 microBUS1 GPIO interrupt input PA5
* D2 PA0 microBUS1 GPIO interrupt input PA0
* D3 PA6 microBUS2 GPIO interrupt input PA6
* D4 PD27 *** Not used ***
* D5 PD11 microBUS2 PWMB PD11 PWMC0_H0
* D6 PC19 microBUS1 PWMA PC19 PWMC0_H2
* D7 PA2 *** Not used ***
* D8 PA17 *** Not used ***
* D8 PA5 *** Not used ***
* D9 PC9 microBUS2 CS GPIO output PC9
* D10 PD25 microBUS1 CS GPIO output PD25 SPI0_NPCS1
* D11 PD21 (both) SPI-MOSI PD21 SPI0_MOSI GPIO_SPI0_MOSI
@ -597,11 +597,11 @@
/* Interrupts. No pull-ups on the BEE; assumig active low. */
#define CLICK_MB1_INTR (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \
GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN5)
GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN0)
#define CLICK_MB2_INTR (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \
GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN6)
#define IRQ_MB1 SAM_IRQ_PA5
#define IRQ_MB1 SAM_IRQ_PA0
#define IRQ_MB2 SAM_IRQ_PA6
/* SP chip selects */