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SAML21: Add some parameter checking for FDPLL96M

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This commit is contained in:
Gregory Nutt 2015-05-20 13:51:40 -06:00
parent 0a8633f53b
commit 8042d2e412
2 changed files with 25 additions and 0 deletions
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17
arch/arm/src/samdl/saml_clockconfig.c
View File

@ -73,6 +73,23 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Force enabling of the FDPLL reference clock */
#ifdef BOARD_FDPLL96M_ENABLE
# if BOARD_FDPLL96M_REFCLK == OSCCTRL_DPLLCTRLB_REFLCK_XOSC && \
!defined(BOARD_XOSC_ENABLE)
# warning Forcing BOARD_XOSC_ENABLE for FDPLL96M
# define BOARD_XOSC_ENABLE 1
# elif BOARD_FDPLL96M_REFCLK == OSCCTRL_DPLLCTRLB_REFLCK_XOSCK32K && \
!defined(BOARD_XOSC32K_ENABLE)
# warning Forcing BOARD_XOSC32K_ENABLE for FDPLL96M
# define BOARD_XOSC32K_ENABLE 1
# elif BOARD_FDPLL96M_REFCLK == OSCCTRL_DPLLCTRLB_REFLCK_GLCK && \
!defined(BOARD_GCLK_ENABLE)
# warning Forcing BOARD_GCLK_ENABLE for FDPLL96M
# define BOARD_GCLK_ENABLE 1
# endif
#endif
/****************************************************************************
* Private Types

8
configs/saml21-xplained/include/board.h
View File

@ -226,6 +226,14 @@
#define BOARD_DFLL48M_FREQUENCY (48000000)
/* Fractional Digital Phase Locked Loop configuration.
*
* BOARD_FDPLL96M_REFCLK - See OSCCTRL_DPLLCTRLB_REFLCK_* definitions
*/
#undef BOARD_FDPLL96M_ENABLE
#define BOARD_FDPLL96M_REFCLK OSCCTRL_DPLLCTRLB_REFLCK_XOSC
/* GCLK Configuration
*
* Global enable/disable.