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Add support for the KL25Z64. The KL25Z64 is a lower memory variant of the KL25Z128 and is used on the Teensy LC. From Michael as SourceForge patch 50.

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This commit is contained in:
Gregory Nutt 2015-05-07 06:47:17 -06:00
parent afafe84050
commit 8062555384
3 changed files with 48 additions and 6 deletions
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40
arch/arm/include/kl/chip.h
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@ -48,7 +48,45 @@
/* Get customizations for each supported chip */
#if defined(CONFIG_ARCH_CHIP_MKL25Z128)
#if defined(CONFIG_ARCH_CHIP_MKL25Z64)
# define KL_Z64 1 /* Kinetics KL25Z128 family */
# define KL_FLASH_SIZE (64*1024) /* 64Kb */
# define KL_SRAM_SIZE (8*1024) /* 8Kb */
# undef KL_MPU /* No memory protection unit */
# undef KL_EXTBUS /* No external bus interface */
# define KL_NDMACH 4 /* Up to 4 DMA channels */
# undef KL_NENET /* No Ethernet controller */
# define KL_NUSBHOST 1 /* One USB host controller */
# define KL_NUSBOTG 1 /* With USB OTG controller */
# define KL_NUSBDEV 1 /* One USB device controller */
# undef KL_NSDHC /* No SD host controller */
# define KL_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
# define KL_NI2C 2 /* Two I2C modules */
# define KL_NUART 3 /* Three UARTs */
# define KL_NSPI 2 /* Two SPI modules */
# undef KL_NCAN /* No CAN in 64-pin chips */
# define KL_NI2S 1 /* One I2S module */
# undef KL_NSLCD /* One segment LCD interface (up to 25x8/29x4) */
# define KL_NADC16 1 /* One 16-bit ADC */
# undef KL_NADC12 /* No 12-channel ADC */
# undef KL_NADC13 /* No 13-channel ADC */
# undef KL_NADC15 /* No 15-channel ADC */
# undef KL_NADC18 /* No 18-channel ADC */
# undef KL_NPGA /* No Programmable Gain Amplifiers */
# define KL_NCMP 1 /* One analog comparator */
# define KL_NDAC6 1 /* Three 6-bit DAC */
# define KL_NDAC12 1 /* Two 12-bit DAC */
# define KL_NVREF 1 /* Voltage reference */
# define KL_NTIMERS6 1 /* One 6 channel timer */
# undef KL_NTIMERS2 2 /* Two 2 channel timers */
# undef KL_NRNG /* No random number generator */
# define KL_NRTC 1 /* Real time clock */
# undef KL_NMMCAU /* No hardware encryption */
# undef KL_NTAMPER /* No tamper detect */
# undef KL_NCRC /* No CRC */
#elif defined(CONFIG_ARCH_CHIP_MKL25Z128)
# define KL_Z128 1 /* Kinetics KL25Z128 family */
# define KL_FLASH_SIZE (128*1024) /* 64Kb */

2
arch/arm/include/kl/irq.h
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@ -79,7 +79,7 @@
* K40P144M100SF2RM
*/
#if defined(CONFIG_ARCH_CHIP_MKL25Z128)
#if defined(CONFIG_ARCH_CHIP_MKL25Z128) || defined(CONFIG_ARCH_CHIP_MKL25Z64)
# define KL_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
# define KL_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */

12
arch/arm/src/kl/Kconfig
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@ -10,6 +10,10 @@ choice
default ARCH_CHIP_MKL25Z128
depends on ARCH_CHIP_KL
config ARCH_CHIP_MKL25Z64
bool "MKL25Z64"
select ARCH_FAMILY_KL2X
config ARCH_CHIP_MKL25Z128
bool "MKL25Z128"
select ARCH_FAMILY_KL2X
@ -309,8 +313,8 @@ config KL_TPM1_PWM
config KL_TPM1_CHANNEL
int "TPM1 PWM Output Channel"
default 0
range 0 1 if ARCH_CHIP_MKL25Z128 || ARCH_CHIP_MKL26Z128
range 0 5 if !ARCH_CHIP_MKL25Z128 && !ARCH_CHIP_MKL26Z128
range 0 1 if ARCH_CHIP_MKL25Z64 || ARCH_CHIP_MKL25Z128 || ARCH_CHIP_MKL26Z128
range 0 5 if !ARCH_CHIP_MKL25Z64 && !ARCH_CHIP_MKL25Z128 && !ARCH_CHIP_MKL26Z128
depends on KL_TPM1_PWM
---help---
If TIM1 is enabled for PWM usage, you also need specifies the timer output
@ -331,8 +335,8 @@ config KL_TPM2_PWM
config KL_TPM2_CHANNEL
int "TPM2 PWM Output Channel"
default 0
range 0 1 if ARCH_CHIP_MKL25Z128 || ARCH_CHIP_MKL26Z128
range 0 5 if !ARCH_CHIP_MKL25Z128 && !ARCH_CHIP_MKL26Z128
range 0 1 if ARCH_CHIP_MKL25Z64 || ARCH_CHIP_MKL25Z128 || ARCH_CHIP_MKL26Z128
range 0 5 if !ARCH_CHIP_MKL25Z64 && !ARCH_CHIP_MKL25Z128 && !ARCH_CHIP_MKL26Z128
depends on KL_TPM2_PWM
---help---
If TIM2 is enabled for PWM usage, you also need specifies the timer output