arch/arm/src/cxd56xx/cxd56_sdhci.c: Fix syslog formats
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a4fb295a0f
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809f5efb1c
@ -41,6 +41,7 @@
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#include <nuttx/config.h>
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#include <inttypes.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdbool.h>
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@ -1137,8 +1138,9 @@ static int cxd56_interrupt(int irq, FAR void *context, FAR void *arg)
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regval = getreg32(CXD56_SDHCI_IRQSIGEN);
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enabled = getreg32(CXD56_SDHCI_IRQSTAT) & regval;
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mcinfo("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
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getreg32(CXD56_SDHCI_IRQSTAT), regval, enabled);
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mcinfo("IRQSTAT: %08" PRIx32 " IRQSIGEN %08" PRIx32
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" enabled: %08" PRIx32 "\n",
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getreg32(CXD56_SDHCI_IRQSTAT), regval, enabled);
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/* Disable card interrupts to clear the card interrupt to the host
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* system.
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@ -1218,7 +1220,7 @@ static int cxd56_interrupt(int irq, FAR void *context, FAR void *arg)
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{
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/* Clear error interrupts */
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mcerr("ERROR: Occur error interrupts: %08x\n", enabled);
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mcerr("ERROR: Occur error interrupts: %08" PRIx32 "\n", enabled);
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putreg32(enabled & SDHCI_EINT_MASK, CXD56_SDHCI_IRQSTAT);
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}
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@ -1347,9 +1349,10 @@ static void cxd56_sdio_sdhci_reset(FAR struct sdio_dev_s *dev)
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putreg32(SDHCI_INT_ALL & (~SDHCI_INT_CINT), CXD56_SDHCI_IRQSTATEN);
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mcinfo("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
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getreg32(CXD56_SDHCI_SYSCTL), getreg32(CXD56_SDHCI_PRSSTAT),
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getreg32(CXD56_SDHCI_IRQSTATEN));
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mcinfo("SYSCTL: %08" PRIx32 " PRSSTAT: %08" PRIx32
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" IRQSTATEN: %08" PRIx32 "\n",
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getreg32(CXD56_SDHCI_SYSCTL), getreg32(CXD56_SDHCI_PRSSTAT),
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getreg32(CXD56_SDHCI_IRQSTATEN));
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/* Initialize the SDHC slot structure data structure */
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@ -1546,7 +1549,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
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regval = getreg32(CXD56_SDHCI_SYSCTL);
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regval &= ~SDHCI_SYSCTL_SDCLKEN;
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putreg32(regval, CXD56_SDHCI_SYSCTL);
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mcinfo("SYSCTRL: %08x\n", getreg32(CXD56_SDHCI_SYSCTL));
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mcinfo("SYSCTRL: %08" PRIx32 "\n", getreg32(CXD56_SDHCI_SYSCTL));
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/* sel_ttclk bit[16] */
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@ -1593,7 +1596,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
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regval &= ~(SDHCI_SYSCTL_SDCLKFS_MASK | SDHCI_SYSCTL_SDCLKFSUP_MASK);
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putreg32(regval, CXD56_SDHCI_SYSCTL);
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cxd56_sdio_frequency(CONFIG_CXD56_IDMODE_FREQ);
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mcinfo("SYSCTRL: %08x\n", getreg32(CXD56_SDHCI_SYSCTL));
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mcinfo("SYSCTRL: %08" PRIx32 "\n", getreg32(CXD56_SDHCI_SYSCTL));
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return;
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}
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@ -1635,7 +1638,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
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putreg32(regval | SDHCI_SYSCTL_SDCLKEN, CXD56_SDHCI_SYSCTL);
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}
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while ((getreg32(CXD56_SDHCI_SYSCTL) & SDHCI_SYSCTL_SDCLKEN) == 0);
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mcinfo("SYSCTRL: %08x\n", getreg32(CXD56_SDHCI_SYSCTL));
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mcinfo("SYSCTRL: %08" PRIx32 "\n", getreg32(CXD56_SDHCI_SYSCTL));
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}
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/****************************************************************************
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@ -1821,7 +1824,8 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
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/* Other bits? What about CMDTYP? */
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mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
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mcinfo("cmd: %08" PRIx32 " arg: %08" PRIx32 " regval: %08" PRIx32 "\n",
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cmd, arg, regval);
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/* The Command Inhibit (CIHB) bit is set in the PRSSTAT bit immediately
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* after the transfer type register is written. This bit is cleared when
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@ -1837,8 +1841,8 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
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{
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if (--timeout <= 0)
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{
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mcerr("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
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cmd, getreg32(CXD56_SDHCI_PRSSTAT));
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mcerr("ERROR: Timeout cmd: %08" PRIx32 " PRSSTAT: %08" PRIx32 "\n",
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cmd, getreg32(CXD56_SDHCI_PRSSTAT));
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return -EBUSY;
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}
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@ -1851,8 +1855,9 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
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{
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if (--timeout <= 0)
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{
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mcerr("ERROR: Timeout cmd data: %08x PRSSTAT: %08x\n",
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cmd, getreg32(CXD56_SDHCI_PRSSTAT));
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mcerr("ERROR: Timeout cmd data: %08" PRIx32
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" PRSSTAT: %08" PRIx32 "\n",
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cmd, getreg32(CXD56_SDHCI_PRSSTAT));
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return -EBUSY;
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}
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@ -2185,7 +2190,7 @@ static int cxd56_sdio_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
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timeout -= 1;
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if (timeout <= 0)
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{
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mcerr("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
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mcerr("ERROR: Timeout cmd: %08" PRIx32 " IRQSTAT: %08" PRIx32 "\n",
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cmd, getreg32(CXD56_SDHCI_IRQSTAT));
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putreg32(0, CXD56_SDHCI_IRQSIGEN);
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@ -2197,8 +2202,9 @@ static int cxd56_sdio_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
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if ((getreg32(CXD56_SDHCI_IRQSTAT) & errors) != 0)
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{
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mcerr("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
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cmd, errors, getreg32(CXD56_SDHCI_IRQSTAT));
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mcerr("ERROR: cmd: %08" PRIx32 " errors: %08" PRIx32
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" IRQSTAT: %08" PRIx32 "\n",
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cmd, errors, getreg32(CXD56_SDHCI_IRQSTAT));
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ret = -EIO;
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}
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@ -2295,7 +2301,7 @@ static int cxd56_sdio_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
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(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
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(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
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{
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mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
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mcerr("ERROR: Wrong response CMD=%08" PRIx32 "\n", cmd);
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ret = -EINVAL;
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}
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else
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@ -2306,12 +2312,12 @@ static int cxd56_sdio_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
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regval = getreg32(CXD56_SDHCI_IRQSTAT);
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if ((regval & SDHCI_INT_CTOE) != 0)
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{
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mcerr("ERROR: Command timeout: %08x\n", regval);
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mcerr("ERROR: Command timeout: %08" PRIx32 "\n", regval);
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ret = -ETIMEDOUT;
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}
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else if ((regval & SDHCI_INT_CCE) != 0)
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{
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mcerr("ERROR: CRC failure: %08x\n", regval);
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mcerr("ERROR: CRC failure: %08" PRIx32 "\n", regval);
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ret = -EIO;
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}
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}
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@ -2354,7 +2360,7 @@ static int cxd56_sdio_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
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if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
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{
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mcerr("ERROR: Wrong response CMD=%08x\n", cmd);
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mcerr("ERROR: Wrong response CMD=%08" PRIx32 "\n", cmd);
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ret = -EINVAL;
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}
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else
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@ -2365,12 +2371,12 @@ static int cxd56_sdio_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
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regval = getreg32(CXD56_SDHCI_IRQSTAT);
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if (regval & SDHCI_INT_CTOE)
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{
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mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval);
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mcerr("ERROR: Timeout IRQSTAT: %08" PRIx32 "\n", regval);
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ret = -ETIMEDOUT;
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}
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else if (regval & SDHCI_INT_CCE)
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{
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mcerr("ERROR: CRC fail IRQSTAT: %08x\n", regval);
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mcerr("ERROR: CRC fail IRQSTAT: %08" PRIx32 "\n", regval);
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ret = -EIO;
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}
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}
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@ -2465,7 +2471,7 @@ static int cxd56_sdio_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd,
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regval = getreg32(CXD56_SDHCI_IRQSTAT);
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if (regval & SDHCI_INT_CTOE)
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{
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mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval);
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mcerr("ERROR: Timeout IRQSTAT: %08" PRIx32 "\n", regval);
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ret = -ETIMEDOUT;
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}
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}
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