i.MX6: Add incomplete GPT header file
This commit is contained in:
Gregory Nutt
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613786ff3d
commit
80dce6dba1
@ -54,7 +54,7 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* GIC Register Offsets *****************************************************/
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/* GTM Register Offsets *****************************************************/
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#define GTM_COUNT0_OFFSET 0x0000 /* Global Timer Counter Register 0 */
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#define GTM_COUNT1_OFFSET 0x0004 /* Global Timer Counter Register 1 */
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@ -64,7 +64,7 @@
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#define GTM_COMP1_OFFSET 0x0014 /* Comparator Value Register 1 */
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#define GTM_AUTO_OFFSET 0x0018 /* Auto-increment Register */
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/* GIC Register Addresses ***************************************************/
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/* GTM Register Addresses ***************************************************/
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#define GTM_COUNT0 (MPCORE_GTM_VBASE+GTM_COUNT0_OFFSET)
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#define GTM_COUNT1 (MPCORE_GTM_VBASE+GTM_COUNT1_OFFSET)
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@ -74,7 +74,7 @@
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#define GTM_COMP1 (MPCORE_GTM_VBASE+COMPARE1_OFFSET)
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#define GTM_AUTO (MPCORE_GTM_VBASE+AUTO_OFFSET)
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/* GIC Register Bit Definitions *********************************************/
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/* GTM Register Bit Definitions *********************************************/
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/* Global Timer Counter Register 0/1 -- 64-bit timer counter value */
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@ -139,5 +139,5 @@ extern "C"
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_ARMV7A_HAVE_GIC */
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#endif /* CONFIG_ARMV7A_HAVE_GTM */
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#endif /* __ARCH_ARM_SRC_ARMV7_A_GTM_H */
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103
arch/arm/src/imx6/chip/imx_gpt.h
Normal file
103
arch/arm/src/imx6/chip/imx_gpt.h
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@ -0,0 +1,103 @@
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/************************************************************************************
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* arch/arm/src/imx6/imx_gpt.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Reference:
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* "i.MX 6Dual/6Quad ApplicationsProcessor Reference Manual," Document Number
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* IMX6DQRM, Rev. 3, 07/2015, FreeScale.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_IMX6_CHIP_IMX_GPT_H
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#define __ARCH_ARM_SRC_IMX6_CHIP_IMX_GPT_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <chip/imx_memorymap.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* GPT Register Offsets ************************************************************/
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#define IMX_GPT_CR_OFFSET 0x0000 /* GPT Control Register */
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#define IMX_GPT_PR_OFFSET 0x0004 /* GPT Prescaler Register */
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#define IMX_GPT_SR_OFFSET 0x0008 /* GPT Status Register */
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#define IMX_GPT_IR_OFFSET 0x000c /* GPT Interrupt Register */
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#define IMX_GPT_OCR1_OFFSET 0x0010 /* GPT Output Compare Register 1 */
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#define IMX_GPT_OCR2_OFFSET 0x0014 /* GPT Output Compare Register 2 */
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#define IMX_GPT_OCR3_OFFSET 0x0018 /* GPT Output Compare Register 3 */
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#define IMX_GPT_ICR1_OFFSET 0x001c /* GPT Input Capture Register 1 */
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#define IMX_GPT_ICR2_OFFSET 0x0020 /* GPT Input Capture Register 2 */
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#define IMX_GPT_CNT_OFFSET 0x0024 /* GPT Counter Register */
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/* GPT Register Addresses **********************************************************/
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#define IMX_GPT_CR (IMX_GPT_VBASE+IMX_GPT_CR_OFFSET)
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#define IMX_GPT_PR (IMX_GPT_VBASE+IMX_GPT_PR_OFFSET)
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#define IMX_GPT_SR (IMX_GPT_VBASE+IMX_GPT_SR_OFFSET)
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#define IMX_GPT_IR (IMX_GPT_VBASE+IMX_GPT_IR_OFFSET)
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#define IMX_GPT_OCR1 (IMX_GPT_VBASE+IMX_GPT_OCR1_OFFSET)
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#define IMX_GPT_OCR2 (IMX_GPT_VBASE+IMX_GPT_OCR2_OFFSET)
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#define IMX_GPT_OCR3 (IMX_GPT_VBASE+IMX_GPT_OCR3_OFFSET)
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#define IMX_GPT_ICR1 (IMX_GPT_VBASE+IMX_GPT_ICR1_OFFSET)
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#define IMX_GPT_ICR2 (IMX_GPT_VBASE+IMX_GPT_ICR2_OFFSET)
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#define IMX_GPT_CNT (IMX_GPT_VBASE+IMX_GPT_CNT_OFFSET)
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/* GPT Register Bit Definitions ****************************************************/
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/* GPT Control Register */
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#define GPT_CR_
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/* GPT Prescaler Register */
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#define GPT_PR_
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/* GPT Status Register */
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#define GPT_SR_
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/* GPT Interrupt Register */
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#define GPT_IR_
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/* GPT Output Compare Register 1 */
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#define GPT_OCR1_
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/* GPT Output Compare Register 2 */
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#define GPT_OCR2_
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/* GPT Output Compare Register 3 */
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#define GPT_OCR3_
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/* GPT Input Capture Register 1 */
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#define GPT_ICR1_
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/* GPT Input Capture Register 2 */
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#define GPT_ICR2_
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/* GPT Counter Register */
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#define GPT_CNT_
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#endif /* __ARCH_ARM_SRC_IMX6_CHIP_IMX_GPT_H */
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