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PIC32MZ: Fix some configuration settings and POSC mode should be external clock

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This commit is contained in:
Gregory Nutt 2015-02-28 11:54:47 -06:00
parent 6f6d73d757
commit 80f298ebf7
3 changed files with 25 additions and 10 deletions
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2
arch/mips/src/pic32mz/chip/pic32mzec-features.h
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@ -439,6 +439,8 @@
#define DEVCFG1_DMTCNT_SHIFT (26) /* Bits 26-30: Deadman Timer Count Select bits */
#define DEVCFG1_DMTCNT_MASK (31 << DEVCFG1_DMTCNT_SHIFT)
# define DEVCFG1_DMTCNT(n) ((uint32_t)((n)-8) << DEVCFG1_DMTCNT_SHIFT) /* 2**n, n=8..31 */
# define DEVCFG1_DMTCNT_MIN (0 << DEVCFG1_DMTCNT_SHIFT) /* 2**8 (256) */
# define DEVCFG1_DMTCNT_MAX (12 << DEVCFG1_DMTCNT_SHIFT) /* 2**318 (2147483648) */
#define DEVCFG1_FDMTEN (1 << 31) /* Bit 31: Deadman Timer enable bit */
#define DEVCFG1_RWO 0x00003800 /* Bits 11-13: Reserved, write as one */

10
arch/mips/src/pic32mz/pic32mz-config.h
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@ -211,13 +211,13 @@
#if (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 5000000
# error BOARD_PLL_INPUT / BOARD_PLL_IDIV too low
# define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_BYPASS /* < 5 MHz */
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 9000000
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 8000000
# define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_5_10MHZ /* 5-10 MHz */
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 14500000
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 13000000
# define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_8_16MHZ /* 8-16 MHz */
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 23500000
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 210000000
# define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_13_26MHZ /* 13-26 MHz */
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 39000000
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 36000000
# define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_21_42MHZ /* 21-42 MHz */
#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 64000000
# define CONFIG_PIC32MZ_FPLLRNG DEVCFG2_FPLLRNG_34_64MHZ /* 36-64 MHz */
@ -393,7 +393,7 @@
#define CONFIG_PIC32MZ_WDTSPGM DEVCFG1_WDTSPGM_STOP
#define CONFIG_PIC32MZ_WINDIS DEVCFG1_WDT_NORMAL
#define CONFIG_PIC32MZ_FWDTWINSZ DEVCFG1_FWDTWINSZ_25
#define CONFIG_PIC32MZ_DMTCNT DEVCFG1_DMTCNT_MASK
#define CONFIG_PIC32MZ_DMTCNT DEVCFG1_DMTCNT_MAX
#define CONFIG_PIC32MZ_FDMTEN 0
/* DEVCFG0 */

23
configs/pic32mz-starterkit/include/board.h
View File

@ -52,15 +52,28 @@
/* Configuration ************************************************************/
/* Clocking *****************************************************************/
/* Crystal frequencies */
/* Crystal frequencies
*
* - A 24 MHz oscillator circuit (Y4) is connected to the on-board
* microcontroller. This oscillator circuit functions as the controller’s
* primary oscillator. Depending on which is populated on the starter kit
* board, a 24 MHz crystal (Y1) may be used instead of Y4.
* - The starter kit also has provisions for an external secondary 32 kHz
* oscillator (Y2); however, this is not populated.
*/
#define BOARD_POSC_FREQ 24000000 /* Primary OSC XTAL frequency (24MHz) */
#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */
#define BOARD_POSC_FREQ 24000000 /* Primary OSC XTAL frequency (Y4, 24MHz) */
#define BOARD_SOSC_FREQ 32000 /* Secondary OSC XTAL frequency (Y2, 32KHz) */
/* Oscillator modes */
/* Oscillator modes.
*
* - BOARD_POSC_ECMODE: An external oscillator is connected to OSC1/OSC2
* - BOARD_POSC_HSMODE: An external crystal or resonator is connected to
* OSC1/OSC2
*/
#define BOARD_FNOSC_SPLL 1 /* Use system PLL */
#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */
#define BOARD_POSC_ECMODE 1 /* External clock (EC) mode */
#define BOARD_POSC_SWITCH 1 /* Enable clock switching */
#undef BOARD_POSC_FSCM /* Disable clock monitoring */